Tcwg-commits August 2015

tcwg-commits@lists.linaro.org

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602 discussions

[gcc] branch master updated (6c46cb3 -> b79ac70)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from 6c46cb3 * ChangeLog: Fix corrupted entry. new 31015b0 Make the stack non-executable in GNAT tools new b79ac70 [AArch64] Cleanup whitespace in aarch64.c The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/ChangeLog | 13 +++++++++++++ gcc/ada/prj-proc.adb | 4 ++-- gcc/ada/prj.adb | 6 +++--- gcc/config/aarch64/aarch64.c | 12 ++++++------ 4 files changed, 24 insertions(+), 11 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

9 years, 3 months

[gcc] branch hjl/pr67215/master updated (4c61614 -> 9795398)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch hjl/pr67215/master in repository gcc. discards 4c61614 Properly handle -fno-plt in ix86_expand_call new 9795398 Properly handle -fno-plt in ix86_expand_call This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (4c61614) \ N -- N -- N refs/heads/hjl/pr67215/master (9795398) You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: -- To stop receiving notification emails like this one, please contact the administrator of this repository.

9 years, 3 months

[gcc] 01/01: Properly handle -fno-plt in ix86_expand_call

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This is an automated email from the git hooks/post-receive script. unknown user pushed a commit to branch hjl/pr67215/master in repository gcc. commit 97953988030f937d04a6aaa18ad2bda837079cd2 Author: H.J. Lu <hjl.tools(a)gmail.com> Date: Sun Aug 16 04:46:20 2015 -0700 Properly handle -fno-plt in ix86_expand_call It boils down to that -fno-plt should convert calling an external function, foo, from call foo@PLT to call *foo@GOT to avoid one extra direct branch to PLT. The proper place for this is in backend during expanding a function call. The backend already takes of many details for calling an external function, like setting up a PIC register. Using the GOT slot instead of PLT slot, just one of those details. For x86, it should be done in ix86_expand_call, not prepare_call_address and hope for the best, which doesn't always happen. Also non-PIC case can only be handled in backend. This patch reverts -fno-plt in prepare_call_address and handles it in ix86_expand_call. Other backends may need similar changes to support -fno-plt. Alternately, we can introduce a target hook to indicate whether an external function should be called via register for -fno-plt so that i386 backend can disable it in prepare_call_address. sibcall_memory_operand is also updated to accept the GOT slot so that call *foo@GOT(%reg) can be generated by ix86_expand_call for 32-bit and 64-bit large model. gcc/ PR target/67215 * calls.c (prepare_call_address): Don't handle -fno-plt here. * config/i386/i386.c (ix86_expand_call): Generate indirect call via GOT for -fno-plt. Support indirect call via GOT for x32. * config/i386/predicates.md (sibcall_memory_operand): Allow GOT memory operand. gcc/testsuite/ PR target/67215 * gcc.target/i386/pr67215-1.c: New test. * gcc.target/i386/pr67215-2.c: Likewise. * gcc.target/i386/pr67215-3.c: Likewise. --- gcc/calls.c | 12 ------ gcc/config/i386/i386.c | 71 ++++++++++++++++++++++++------- gcc/config/i386/predicates.md | 7 ++- gcc/testsuite/gcc.target/i386/pr67215-1.c | 20 +++++++++ gcc/testsuite/gcc.target/i386/pr67215-2.c | 20 +++++++++ gcc/testsuite/gcc.target/i386/pr67215-3.c | 12 ++++++ 6 files changed, 113 insertions(+), 29 deletions(-) diff --git a/gcc/calls.c b/gcc/calls.c index 5636725..7cce9be 100644 --- a/gcc/calls.c +++ b/gcc/calls.c @@ -203,18 +203,6 @@ prepare_call_address (tree fndecl_or_type, rtx funexp, rtx sta [...] && targetm.small_register_classes_for_mode_p (FUNCTION_MODE)) ? force_not_mem (memory_address (FUNCTION_MODE, funexp)) : memory_address (FUNCTION_MODE, funexp)); - else if (flag_pic - && fndecl_or_type - && TREE_CODE (fndecl_or_type) == FUNCTION_DECL - && (!flag_plt - || lookup_attribute ("noplt", DECL_ATTRIBUTES (fndecl_or_type))) - && !targetm.binds_local_p (fndecl_or_type)) - { - /* This is done only for PIC code. There is no easy interface to force the - function address into GOT for non-PIC case. non-PIC case needs to be - handled specially by the backend. */ - funexp = force_reg (Pmode, funexp); - } else if (! sibcallp) { if (!NO_FUNCTION_CSE && optimize && ! flag_no_function_cse) diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 05fa5e1..ac9a6c4 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -25649,21 +25649,54 @@ ix86_expand_call (rtx retval, rtx fnaddr, rtx callarg1, /* Static functions and indirect calls don't need the pic register. Also, check if PLT was explicitly avoided via no-plt or "noplt" attribute, making it an indirect call. */ + rtx addr = XEXP (fnaddr, 0); if (flag_pic - && (!TARGET_64BIT - || (ix86_cmodel == CM_LARGE_PIC - && DEFAULT_ABI != MS_ABI)) - && GET_CODE (XEXP (fnaddr, 0)) == SYMBOL_REF - && !SYMBOL_REF_LOCAL_P (XEXP (fnaddr, 0)) - && flag_plt - && (SYMBOL_REF_DECL ((XEXP (fnaddr, 0))) == NULL_TREE - || !lookup_attribute ("noplt", - DECL_ATTRIBUTES (SYMBOL_REF_DECL (XEXP (fnaddr, 0)))))) + && GET_CODE (addr) == SYMBOL_REF + && !SYMBOL_REF_LOCAL_P (addr)) { - use_reg (&use, gen_rtx_REG (Pmode, REAL_PIC_OFFSET_TABLE_REGNUM)); - if (ix86_use_pseudo_pic_reg ()) - emit_move_insn (gen_rtx_REG (Pmode, REAL_PIC_OFFSET_TABLE_REGNUM), - pic_offset_table_rtx); + if (flag_plt + && (SYMBOL_REF_DECL (addr) == NULL_TREE + || !lookup_attribute ("noplt", + DECL_ATTRIBUTES (SYMBOL_REF_DECL (addr))))) + { + if (!TARGET_64BIT + || (ix86_cmodel == CM_LARGE_PIC + && DEFAULT_ABI != MS_ABI)) + { + use_reg (&use, gen_rtx_REG (Pmode, + REAL_PIC_OFFSET_TABLE_REGNUM)); + if (ix86_use_pseudo_pic_reg ()) + emit_move_insn (gen_rtx_REG (Pmode, + REAL_PIC_OFFSET_TABLE_REGNUM), + pic_offset_table_rtx); + } + } + else if (!TARGET_PECOFF && !TARGET_MACHO) + { + if (TARGET_64BIT) + { + fnaddr = gen_rtx_UNSPEC (Pmode, + gen_rtvec (1, addr), + UNSPEC_GOTPCREL); + fnaddr = gen_rtx_CONST (Pmode, fnaddr); + } + else + { + fnaddr = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), + UNSPEC_GOT); + fnaddr = gen_rtx_CONST (Pmode, fnaddr); + fnaddr = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, + fnaddr); + } + fnaddr = gen_const_mem (Pmode, fnaddr); + /* Pmode may not be the same as word_mode for x32, which + doesn't support indirect branch via 32-bit memory slot. + Since x32 GOT slot is 64 bit with zero upper 32 bits, + indirect branch via x32 GOT slot is OK. */ + if (GET_MODE (fnaddr) != word_mode) + fnaddr = gen_rtx_ZERO_EXTEND (word_mode, fnaddr); + fnaddr = gen_rtx_MEM (QImode, fnaddr); + } } } @@ -25685,9 +25718,15 @@ ix86_expand_call (rtx retval, rtx fnaddr, rtx callarg1, && GET_CODE (XEXP (fnaddr, 0)) == SYMBOL_REF && !local_symbolic_operand (XEXP (fnaddr, 0), VOIDmode)) fnaddr = gen_rtx_MEM (QImode, construct_plt_address (XEXP (fnaddr, 0))); - else if (sibcall - ? !sibcall_insn_operand (XEXP (fnaddr, 0), word_mode) - : !call_insn_operand (XEXP (fnaddr, 0), word_mode)) + /* Since x32 GOT slot is 64 bit with zero upper 32 bits, indirect + branch via x32 GOT slot is OK. */ + else if (!(TARGET_X32 + && MEM_P (fnaddr) + && GET_CODE (XEXP (fnaddr, 0)) == ZERO_EXTEND + && GOT_memory_operand (XEXP (XEXP (fnaddr, 0), 0), Pmode)) + && (sibcall + ? !sibcall_insn_operand (XEXP (fnaddr, 0), word_mode) + : !call_insn_operand (XEXP (fnaddr, 0), word_mode))) { fnaddr = convert_to_mode (word_mode, XEXP (fnaddr, 0), 1); fnaddr = gen_rtx_MEM (QImode, copy_to_mode_reg (word_mode, fnaddr)); diff --git a/gcc/config/i386/predicates.md b/gcc/config/i386/predicates.md index a9c8623..be2df76 100644 --- a/gcc/config/i386/predicates.md +++ b/gcc/config/i386/predicates.md @@ -593,7 +593,12 @@ ;; Return true if OP is a memory operands that can be used in sibcalls. (define_predicate "sibcall_memory_operand" (and (match_operand 0 "memory_operand") - (match_test "CONSTANT_P (XEXP (op, 0))"))) + (match_test "CONSTANT_P (XEXP (op, 0)) + || (GET_CODE (XEXP (op, 0)) == PLUS + && REG_P (XEXP (XEXP (op, 0), 0)) + && GET_CODE (XEXP (XEXP (op, 0), 1)) == CONST + && GET_CODE (XEXP (XEXP (XEXP (op, 0), 1), 0)) == UNSPEC + && XINT (XEXP (XEXP (XEXP (op, 0), 1), 0), 1) == UNSPEC_GOT)"))) ;; Test for a valid operand for a call instruction. ;; Allow constant call address operands in Pmode only. diff --git a/gcc/testsuite/gcc.target/i386/pr67215-1.c b/gcc/testsuite/gcc.target/i [...] new file mode 100644 index 0000000..fd37f8e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr67215-1.c @@ -0,0 +1,20 @@ +/* { dg-do compile { target *-*-linux* } } */ +/* { dg-options "-O2 -fpic -fno-plt" } */ + +extern char* bar (int); +extern char* arr[32]; + +void +foo (void) +{ + int i; + + for (i = 0; i < 32; i++) + arr[i] = bar (128); +} + +/* { dg-final { scan-assembler "call\[ \t\]*.bar@GOTPCREL" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "call\[ \t\]*.bar@GOT\\(" { target ia32 } } } */ +/* { dg-final { scan-assembler-not "mov(l|q)\[ \t\]*.bar@GOTPCREL" { target { ! ia [...] +/* { dg-final { scan-assembler-not "movl\[ \t\]*.bar@GOT\\(" { target ia32 } } } */ +/* { dg-final { scan-assembler-not "call\[ \t\]*.bar@PLT" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr67215-2.c b/gcc/testsuite/gcc.target/i [...] new file mode 100644 index 0000000..ebf2919 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr67215-2.c @@ -0,0 +1,20 @@ +/* { dg-do compile { target *-*-linux* } } */ +/* { dg-options "-O2 -fpic" } */ + +extern char* bar (int) __attribute__ ((noplt)); +extern char* arr[32]; + +void +foo (void) +{ + int i; + + for (i = 0; i < 32; i++) + arr[i] = bar (128); +} + +/* { dg-final { scan-assembler "call\[ \t\]*.bar@GOTPCREL" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "call\[ \t\]*.bar@GOT\\(" { target ia32 } } } */ +/* { dg-final { scan-assembler-not "mov(l|q)\[ \t\]*.bar@GOTPCREL" { target { ! ia [...] +/* { dg-final { scan-assembler-not "movl\[ \t\]*.bar@GOT\\(" { target ia32 } } } */ +/* { dg-final { scan-assembler-not "call\[ \t\]*.bar@PLT" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr67215-3.c b/gcc/testsuite/gcc.target/i [...] new file mode 100644 index 0000000..dbd9a2f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr67215-3.c @@ -0,0 +1,12 @@ +/* { dg-do compile { target *-*-linux* } } */ +/* { dg-options "-O2 -fpic -fno-plt -fdump-rtl-expand" } */ + +extern int bar (void); + +int +foo (void) +{ + return bar (); +} + +/* { dg-final { scan-rtl-dump "\\(call \\(mem:QI \\(mem/u/c:" "expand" } } */ -- To stop receiving notification emails like this one, please contact the administrator of this repository.

9 years, 3 months

[gcc] branch hjl/pr67215/master updated (8ade193 -> 4c61614)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch hjl/pr67215/master in repository gcc. omits 8ade193 Properly handle -fno-plt in ix86_expand_call adds 35ed5ce [MIPS] Fix register renaming in the interrupt handlers. adds 6189000 PR middle-end/67222 * gimple-low.c (lower_stmt): Don't lowe [...] adds a03a71a c-family/ 2015-08-18 Paolo Carlini <paolo.carlini(a)oracle.com> adds 6e5ffd4 * gcc.target/aarch64/atomic-comp-swap-release-acquire.c: Adj [...] adds 1dae3b7 PR libstdc++/67066 * doc/xml/manual/configure.xml (manual.i [...] adds 5ed72ca * include/bits/ptr_traits.h: Include <bits/move.h> for addressof. adds bf62f7a PR c++/67216 * testsuite/tr1/2_general_utilities/shared_ptr [...] adds 1abbc4f gcc/ PR rtl-optimization/67218 * simplify-rtx.c (exact_int_ [...] adds 1090262 PR middle-end/36757 adds 02981e5 DR 1155 * pt.c (convert_nontype_argument): Allow internal l [...] adds d919063 PR c++/66919 * g++.dg/cpp1y/auto-fn27.C: New. adds 650b325 * print-tree.c (print_node): Handle TREE_BINFO. adds a9c1772 [gcc] adds bce8408 Daily bump. adds df8eb49 remove useless typedefs adds 6dc5038 remove more useless typedefs adds 9354b69 [ARM] Use %wd format for lane printing in bounds_check adds 6c46cb3 * ChangeLog: Fix corrupted entry. new 4c61614 Properly handle -fno-plt in ix86_expand_call This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (8ade193) \ N -- N -- N refs/heads/hjl/pr67215/master (4c61614) You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/ChangeLog | 87 ++++++++++- gcc/DATESTAMP | 2 +- gcc/bb-reorder.c | 4 +- gcc/bt-load.c | 4 +- gcc/builtins.c | 14 +- gcc/builtins.def | 2 +- gcc/c-family/ChangeLog | 17 +++ gcc/c-family/c-ada-spec.h | 4 +- gcc/c-family/c-common.c | 5 +- gcc/c-family/c-common.h | 9 +- gcc/c-family/c-cppbuiltin.c | 12 +- gcc/c-family/c-format.c | 16 +- gcc/c-family/c-format.h | 28 ++-- gcc/c-family/c-objc.h | 4 +- gcc/c-family/c-ppoutput.c | 4 +- gcc/c-family/c-pragma.c | 20 +-- gcc/c-family/c-pragma.h | 11 +- gcc/c/ChangeLog | 4 + gcc/c/c-aux-info.c | 3 +- gcc/c/c-parser.c | 16 +- gcc/c/c-tree.h | 4 +- gcc/cfgloop.h | 2 +- gcc/cgraph.h | 4 +- gcc/collect2.c | 8 +- gcc/combine.c | 4 +- gcc/config/arm/arm.c | 4 +- gcc/config/mips/mips-protos.h | 1 + gcc/config/mips/mips.c | 30 ++++ gcc/config/mips/mips.h | 3 + gcc/config/rs6000/altivec.h | 5 + gcc/config/rs6000/rs6000-builtin.def | 5 + gcc/config/rs6000/rs6000-c.c | 72 ++++++++- gcc/cp/ChangeLog | 12 ++ gcc/cp/call.c | 12 +- gcc/cp/class.c | 12 +- gcc/cp/cp-tree.h | 97 ++++++------- gcc/cp/decl.c | 12 +- gcc/cp/except.c | 4 +- gcc/cp/mangle.c | 4 +- gcc/cp/method.c | 2 - gcc/cp/name-lookup.h | 20 +-- gcc/cp/parser.c | 28 ++-- gcc/cp/parser.h | 36 +++-- gcc/cp/pt.c | 8 +- gcc/cp/rtti.c | 8 +- gcc/cp/semantics.c | 4 +- gcc/cp/typeck2.c | 2 +- gcc/doc/extend.texi | 2 +- gcc/dse.c | 4 +- gcc/dwarf2cfi.c | 20 +-- gcc/dwarf2out.c | 5 +- gcc/dwarf2out.h | 4 +- gcc/final.c | 4 +- gcc/fortran/ChangeLog | 5 + gcc/fortran/dependency.c | 5 +- gcc/fortran/dependency.h | 5 +- gcc/fortran/gfortran.h | 161 ++++++++------------- gcc/fortran/io.c | 5 +- gcc/fortran/module.c | 10 +- gcc/fortran/parse.h | 5 +- gcc/fortran/resolve.c | 15 +- gcc/fortran/trans-types.h | 4 +- gcc/fortran/trans.h | 10 +- gcc/function.c | 8 +- gcc/gcse-common.h | 4 +- gcc/genopinit.c | 8 +- gcc/ggc-page.c | 8 +- gcc/gimple-low.c | 3 +- gcc/graphite-scop-detection.c | 8 +- gcc/haifa-sched.c | 2 +- gcc/ipa-devirt.c | 4 +- gcc/ipa-split.c | 8 +- gcc/lto/ChangeLog | 4 + gcc/lto/lto.h | 4 +- gcc/machmode.h | 4 +- gcc/mcf.c | 24 +-- gcc/modulo-sched.c | 4 - gcc/objc/ChangeLog | 5 + gcc/objc/objc-act.h | 10 +- gcc/objc/objc-next-runtime-abi-02.c | 16 +- gcc/objc/objc-runtime-hooks.h | 4 +- gcc/omp-low.c | 4 +- gcc/print-tree.c | 11 ++ gcc/read-rtl.c | 6 - gcc/recog.c | 4 +- gcc/ree.c | 8 +- gcc/sched-rgn.c | 15 +- gcc/signop.h | 4 +- gcc/simplify-rtx.c | 38 +++-- gcc/stmt.c | 1 - gcc/testsuite/ChangeLog | 59 ++++++++ gcc/testsuite/g++.dg/cpp0x/nontype1.C | 9 ++ gcc/testsuite/g++.dg/cpp1y/auto-fn27.C | 42 ++++++ gcc/testsuite/g++.dg/cpp1z/feat-cxx1z.C | 8 + gcc/testsuite/g++.old-deja/g++.oliva/template4.C | 2 +- gcc/testsuite/gcc.c-torture/execute/ieee/pr67218.c | 15 ++ gcc/testsuite/gcc.dg/builtins-error.c | 3 + gcc/testsuite/gcc.dg/tg-tests.h | 26 +++- gcc/testsuite/gcc.dg/torture/pr67222.c | 19 +++ .../aarch64/atomic-comp-swap-release-acquire.c | 2 +- .../gcc.target/aarch64/atomic-op-acq_rel.c | 2 +- .../gcc.target/aarch64/atomic-op-acquire.c | 2 +- gcc/testsuite/gcc.target/aarch64/atomic-op-char.c | 2 +- .../gcc.target/aarch64/atomic-op-consume.c | 2 +- gcc/testsuite/gcc.target/aarch64/atomic-op-imm.c | 2 +- gcc/testsuite/gcc.target/aarch64/atomic-op-int.c | 2 +- gcc/testsuite/gcc.target/aarch64/atomic-op-long.c | 2 +- .../gcc.target/aarch64/atomic-op-relaxed.c | 2 +- .../gcc.target/aarch64/atomic-op-release.c | 2 +- .../gcc.target/aarch64/atomic-op-seq_cst.c | 2 +- gcc/testsuite/gcc.target/aarch64/atomic-op-short.c | 2 +- .../gcc.target/aarch64/fcvt_int_float_double1.c | 10 ++ .../gcc.target/aarch64/fcvt_int_float_double2.c | 11 ++ .../gcc.target/aarch64/fcvt_int_float_double3.c | 10 ++ .../gcc.target/aarch64/fcvt_int_float_double4.c | 11 ++ .../gcc.target/aarch64/fcvt_uint_float_double1.c | 10 ++ .../gcc.target/aarch64/fcvt_uint_float_double2.c | 11 ++ .../gcc.target/aarch64/fcvt_uint_float_double3.c | 10 ++ .../gcc.target/aarch64/fcvt_uint_float_double4.c | 11 ++ gcc/testsuite/gcc.target/aarch64/sync-comp-swap.c | 2 +- gcc/testsuite/gcc.target/aarch64/sync-op-acquire.c | 2 +- gcc/testsuite/gcc.target/aarch64/sync-op-full.c | 2 +- gcc/testsuite/gcc.target/aarch64/sync-op-release.c | 2 +- .../gcc.target/mips/interrupt_handler-bug-1.c | 11 ++ gcc/testsuite/gcc.target/powerpc/altivec-35.c | 16 ++ .../gcc.target/powerpc/p8vector-builtin-8.c | 62 ++++++++ gcc/testsuite/gcc.target/powerpc/vsx-vector-7.c | 36 +++++ gcc/tree-call-cdce.c | 4 +- gcc/tree-data-ref.c | 4 +- gcc/tree-dfa.c | 3 +- gcc/tree-diagnostic.c | 4 +- gcc/tree-inline.h | 4 +- gcc/tree-scalar-evolution.c | 4 +- gcc/tree-ssa-address.c | 4 +- gcc/tree-ssa-alias.c | 6 +- gcc/tree-ssa-dom.c | 4 +- gcc/tree-ssa-loop-ivopts.c | 4 +- gcc/tree-ssa-loop-niter.c | 4 +- gcc/tree-ssa-loop.h | 2 +- gcc/tree-ssa-pre.c | 4 +- gcc/tree-ssa-reassoc.c | 4 +- gcc/tree-ssa-sccvn.h | 2 +- gcc/tree-ssa-structalias.c | 2 +- gcc/tree-ssa-uninit.c | 4 +- gcc/tree-ssa.h | 3 +- gcc/tree-vect-loop-manip.c | 4 +- gcc/tree-vectorizer.h | 4 +- gcc/tree-vrp.c | 4 +- gcc/var-tracking.c | 28 ++-- gcc/varasm.c | 12 +- libstdc++-v3/ChangeLog | 18 +++ libstdc++-v3/doc/html/manual/concept_checking.html | 5 +- libstdc++-v3/doc/html/manual/configure.html | 8 +- libstdc++-v3/doc/html/manual/status.html | 2 +- libstdc++-v3/doc/xml/manual/configure.xml | 8 +- libstdc++-v3/doc/xml/manual/diagnostics.xml | 5 +- libstdc++-v3/include/bits/ptr_traits.h | 2 +- libstdc++-v3/include/bits/stl_deque.h | 2 + libstdc++-v3/include/bits/stl_stack.h | 2 + libstdc++-v3/include/bits/stl_vector.h | 2 + .../shared_ptr/observers/bool_conv.cc | 4 +- 161 files changed, 1184 insertions(+), 568 deletions(-) create mode 100644 gcc/testsuite/g++.dg/cpp0x/nontype1.C create mode 100644 gcc/testsuite/g++.dg/cpp1y/auto-fn27.C create mode 100644 gcc/testsuite/g++.dg/cpp1z/feat-cxx1z.C create mode 100644 gcc/testsuite/gcc.c-torture/execute/ieee/pr67218.c create mode 100644 gcc/testsuite/gcc.dg/torture/pr67222.c create mode 100644 gcc/testsuite/gcc.target/aarch64/fcvt_int_float_double1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/fcvt_int_float_double2.c create mode 100644 gcc/testsuite/gcc.target/aarch64/fcvt_int_float_double3.c create mode 100644 gcc/testsuite/gcc.target/aarch64/fcvt_int_float_double4.c create mode 100644 gcc/testsuite/gcc.target/aarch64/fcvt_uint_float_double1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/fcvt_uint_float_double2.c create mode 100644 gcc/testsuite/gcc.target/aarch64/fcvt_uint_float_double3.c create mode 100644 gcc/testsuite/gcc.target/aarch64/fcvt_uint_float_double4.c create mode 100644 gcc/testsuite/gcc.target/mips/interrupt_handler-bug-1.c create mode 100644 gcc/testsuite/gcc.target/powerpc/altivec-35.c create mode 100644 gcc/testsuite/gcc.target/powerpc/p8vector-builtin-8.c create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-vector-7.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

9 years, 3 months

[gcc] 01/01: Properly handle -fno-plt in ix86_expand_call

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This is an automated email from the git hooks/post-receive script. unknown user pushed a commit to branch hjl/pr67215/master in repository gcc. commit 4c61614a0d10356a53d3dddd0bd4d87dccdde7ce Author: H.J. Lu <hjl.tools(a)gmail.com> Date: Sun Aug 16 04:46:20 2015 -0700 Properly handle -fno-plt in ix86_expand_call prepare_call_address in calls.c is the wrong place to handle -fno-plt. We shoudn't force function address into register and hope that load function address via GOT and indirect call via register will be folded into indirect call via GOT, which doesn't always happen. Also non-PIC case can only be handled in backend. Instead, backend should expand external function call into indirect call via GOT for -fno-plt. This patch reverts -fno-plt in prepare_call_address and handles it in ix86_expand_call. Other backends may need similar changes to support -fno-plt. Alternately, we can introduce a target hook to indicate whether an external function should be called via register for -fno-plt so that i386 backend can disable it in prepare_call_address. gcc/ PR target/67215 * calls.c (prepare_call_address): Don't handle -fno-plt here. * config/i386/i386.c (ix86_expand_call): Generate indirect call via GOT for -fno-plt. Support indirect call via GOT for x32. * config/i386/predicates.md (sibcall_memory_operand): Allow GOT memory operand. gcc/testsuite/ PR target/67215 * gcc.target/i386/pr67215-1.c: New test. * gcc.target/i386/pr67215-2.c: Likewise. * gcc.target/i386/pr67215-3.c: Likewise. --- gcc/calls.c | 12 ------ gcc/config/i386/i386.c | 71 ++++++++++++++++++++++++------- gcc/config/i386/predicates.md | 7 ++- gcc/testsuite/gcc.target/i386/pr67215-1.c | 20 +++++++++ gcc/testsuite/gcc.target/i386/pr67215-2.c | 20 +++++++++ gcc/testsuite/gcc.target/i386/pr67215-3.c | 12 ++++++ 6 files changed, 113 insertions(+), 29 deletions(-) diff --git a/gcc/calls.c b/gcc/calls.c index 5636725..7cce9be 100644 --- a/gcc/calls.c +++ b/gcc/calls.c @@ -203,18 +203,6 @@ prepare_call_address (tree fndecl_or_type, rtx funexp, rtx sta [...] && targetm.small_register_classes_for_mode_p (FUNCTION_MODE)) ? force_not_mem (memory_address (FUNCTION_MODE, funexp)) : memory_address (FUNCTION_MODE, funexp)); - else if (flag_pic - && fndecl_or_type - && TREE_CODE (fndecl_or_type) == FUNCTION_DECL - && (!flag_plt - || lookup_attribute ("noplt", DECL_ATTRIBUTES (fndecl_or_type))) - && !targetm.binds_local_p (fndecl_or_type)) - { - /* This is done only for PIC code. There is no easy interface to force the - function address into GOT for non-PIC case. non-PIC case needs to be - handled specially by the backend. */ - funexp = force_reg (Pmode, funexp); - } else if (! sibcallp) { if (!NO_FUNCTION_CSE && optimize && ! flag_no_function_cse) diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 05fa5e1..ac9a6c4 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -25649,21 +25649,54 @@ ix86_expand_call (rtx retval, rtx fnaddr, rtx callarg1, /* Static functions and indirect calls don't need the pic register. Also, check if PLT was explicitly avoided via no-plt or "noplt" attribute, making it an indirect call. */ + rtx addr = XEXP (fnaddr, 0); if (flag_pic - && (!TARGET_64BIT - || (ix86_cmodel == CM_LARGE_PIC - && DEFAULT_ABI != MS_ABI)) - && GET_CODE (XEXP (fnaddr, 0)) == SYMBOL_REF - && !SYMBOL_REF_LOCAL_P (XEXP (fnaddr, 0)) - && flag_plt - && (SYMBOL_REF_DECL ((XEXP (fnaddr, 0))) == NULL_TREE - || !lookup_attribute ("noplt", - DECL_ATTRIBUTES (SYMBOL_REF_DECL (XEXP (fnaddr, 0)))))) + && GET_CODE (addr) == SYMBOL_REF + && !SYMBOL_REF_LOCAL_P (addr)) { - use_reg (&use, gen_rtx_REG (Pmode, REAL_PIC_OFFSET_TABLE_REGNUM)); - if (ix86_use_pseudo_pic_reg ()) - emit_move_insn (gen_rtx_REG (Pmode, REAL_PIC_OFFSET_TABLE_REGNUM), - pic_offset_table_rtx); + if (flag_plt + && (SYMBOL_REF_DECL (addr) == NULL_TREE + || !lookup_attribute ("noplt", + DECL_ATTRIBUTES (SYMBOL_REF_DECL (addr))))) + { + if (!TARGET_64BIT + || (ix86_cmodel == CM_LARGE_PIC + && DEFAULT_ABI != MS_ABI)) + { + use_reg (&use, gen_rtx_REG (Pmode, + REAL_PIC_OFFSET_TABLE_REGNUM)); + if (ix86_use_pseudo_pic_reg ()) + emit_move_insn (gen_rtx_REG (Pmode, + REAL_PIC_OFFSET_TABLE_REGNUM), + pic_offset_table_rtx); + } + } + else if (!TARGET_PECOFF && !TARGET_MACHO) + { + if (TARGET_64BIT) + { + fnaddr = gen_rtx_UNSPEC (Pmode, + gen_rtvec (1, addr), + UNSPEC_GOTPCREL); + fnaddr = gen_rtx_CONST (Pmode, fnaddr); + } + else + { + fnaddr = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), + UNSPEC_GOT); + fnaddr = gen_rtx_CONST (Pmode, fnaddr); + fnaddr = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, + fnaddr); + } + fnaddr = gen_const_mem (Pmode, fnaddr); + /* Pmode may not be the same as word_mode for x32, which + doesn't support indirect branch via 32-bit memory slot. + Since x32 GOT slot is 64 bit with zero upper 32 bits, + indirect branch via x32 GOT slot is OK. */ + if (GET_MODE (fnaddr) != word_mode) + fnaddr = gen_rtx_ZERO_EXTEND (word_mode, fnaddr); + fnaddr = gen_rtx_MEM (QImode, fnaddr); + } } } @@ -25685,9 +25718,15 @@ ix86_expand_call (rtx retval, rtx fnaddr, rtx callarg1, && GET_CODE (XEXP (fnaddr, 0)) == SYMBOL_REF && !local_symbolic_operand (XEXP (fnaddr, 0), VOIDmode)) fnaddr = gen_rtx_MEM (QImode, construct_plt_address (XEXP (fnaddr, 0))); - else if (sibcall - ? !sibcall_insn_operand (XEXP (fnaddr, 0), word_mode) - : !call_insn_operand (XEXP (fnaddr, 0), word_mode)) + /* Since x32 GOT slot is 64 bit with zero upper 32 bits, indirect + branch via x32 GOT slot is OK. */ + else if (!(TARGET_X32 + && MEM_P (fnaddr) + && GET_CODE (XEXP (fnaddr, 0)) == ZERO_EXTEND + && GOT_memory_operand (XEXP (XEXP (fnaddr, 0), 0), Pmode)) + && (sibcall + ? !sibcall_insn_operand (XEXP (fnaddr, 0), word_mode) + : !call_insn_operand (XEXP (fnaddr, 0), word_mode))) { fnaddr = convert_to_mode (word_mode, XEXP (fnaddr, 0), 1); fnaddr = gen_rtx_MEM (QImode, copy_to_mode_reg (word_mode, fnaddr)); diff --git a/gcc/config/i386/predicates.md b/gcc/config/i386/predicates.md index a9c8623..be2df76 100644 --- a/gcc/config/i386/predicates.md +++ b/gcc/config/i386/predicates.md @@ -593,7 +593,12 @@ ;; Return true if OP is a memory operands that can be used in sibcalls. (define_predicate "sibcall_memory_operand" (and (match_operand 0 "memory_operand") - (match_test "CONSTANT_P (XEXP (op, 0))"))) + (match_test "CONSTANT_P (XEXP (op, 0)) + || (GET_CODE (XEXP (op, 0)) == PLUS + && REG_P (XEXP (XEXP (op, 0), 0)) + && GET_CODE (XEXP (XEXP (op, 0), 1)) == CONST + && GET_CODE (XEXP (XEXP (XEXP (op, 0), 1), 0)) == UNSPEC + && XINT (XEXP (XEXP (XEXP (op, 0), 1), 0), 1) == UNSPEC_GOT)"))) ;; Test for a valid operand for a call instruction. ;; Allow constant call address operands in Pmode only. diff --git a/gcc/testsuite/gcc.target/i386/pr67215-1.c b/gcc/testsuite/gcc.target/i [...] new file mode 100644 index 0000000..fd37f8e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr67215-1.c @@ -0,0 +1,20 @@ +/* { dg-do compile { target *-*-linux* } } */ +/* { dg-options "-O2 -fpic -fno-plt" } */ + +extern char* bar (int); +extern char* arr[32]; + +void +foo (void) +{ + int i; + + for (i = 0; i < 32; i++) + arr[i] = bar (128); +} + +/* { dg-final { scan-assembler "call\[ \t\]*.bar@GOTPCREL" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "call\[ \t\]*.bar@GOT\\(" { target ia32 } } } */ +/* { dg-final { scan-assembler-not "mov(l|q)\[ \t\]*.bar@GOTPCREL" { target { ! ia [...] +/* { dg-final { scan-assembler-not "movl\[ \t\]*.bar@GOT\\(" { target ia32 } } } */ +/* { dg-final { scan-assembler-not "call\[ \t\]*.bar@PLT" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr67215-2.c b/gcc/testsuite/gcc.target/i [...] new file mode 100644 index 0000000..ebf2919 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr67215-2.c @@ -0,0 +1,20 @@ +/* { dg-do compile { target *-*-linux* } } */ +/* { dg-options "-O2 -fpic" } */ + +extern char* bar (int) __attribute__ ((noplt)); +extern char* arr[32]; + +void +foo (void) +{ + int i; + + for (i = 0; i < 32; i++) + arr[i] = bar (128); +} + +/* { dg-final { scan-assembler "call\[ \t\]*.bar@GOTPCREL" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "call\[ \t\]*.bar@GOT\\(" { target ia32 } } } */ +/* { dg-final { scan-assembler-not "mov(l|q)\[ \t\]*.bar@GOTPCREL" { target { ! ia [...] +/* { dg-final { scan-assembler-not "movl\[ \t\]*.bar@GOT\\(" { target ia32 } } } */ +/* { dg-final { scan-assembler-not "call\[ \t\]*.bar@PLT" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr67215-3.c b/gcc/testsuite/gcc.target/i [...] new file mode 100644 index 0000000..dbd9a2f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr67215-3.c @@ -0,0 +1,12 @@ +/* { dg-do compile { target *-*-linux* } } */ +/* { dg-options "-O2 -fpic -fno-plt -fdump-rtl-expand" } */ + +extern int bar (void); + +int +foo (void) +{ + return bar (); +} + +/* { dg-final { scan-rtl-dump "\\(call \\(mem:QI \\(mem/u/c:" "expand" } } */ -- To stop receiving notification emails like this one, please contact the administrator of this repository.

9 years, 3 months

[gcc] branch trunk updated (9354b69 -> 6c46cb3)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch trunk in repository gcc. from 9354b69 [ARM] Use %wd format for lane printing in bounds_check new 6c46cb3 * ChangeLog: Fix corrupted entry. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/ChangeLog | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

9 years, 3 months

[toolchain/abe] branch ryanarn/reduced_parallel updated: Re-enable -j #cpu for native builds.

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This is an automated email from the git hooks/post-receive script. yvan.roux pushed a commit to branch ryanarn/reduced_parallel in repository toolchain/abe. The following commit(s) were added to refs/heads/ryanarn/reduced_parallel by this push: new a2f1983 Re-enable -j #cpu for native builds. a2f1983 is described below commit a2f1983ccb8492e9377e1dd3497909d430e0365a Author: Yvan Roux <yvan.roux(a)linaro.org> Date: Wed Aug 19 11:14:24 2015 +0200 Re-enable -j #cpu for native builds. Change-Id: Ia6dbd750870ba31ff7860894cb8281ebb439db6c --- lib/make.sh | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/lib/make.sh b/lib/make.sh index 67a4198..ae255cb 100755 --- a/lib/make.sh +++ b/lib/make.sh @@ -737,10 +737,10 @@ make_check() if test x"${parallel}" = x"yes"; then local make_flags case "${target}" in - "$build"|*"-elf"*) make_flags="${make_flags} -j 1" ;; + "$build"|*"-elf"*) make_flags="${make_flags} -j ${cpus}" ;; # Try to find out which test is crashing the aarch64-linux-gnu # boards and x86_64 builders. - aarch64-linux-gnu|x86_64*) make_flags="${make_flags} -j 1" ;; + aarch64-linux-gnu) make_flags="${make_flags} -j 1" ;; # Double parallelization when running tests on remote boards # to avoid host idling when waiting for the board. *) make_flags="${make_flags} -j $((2*${cpus}))" ;; -- To stop receiving notification emails like this one, please contact the administrator of this repository.

9 years, 3 months

[gcc] branch trunk updated (6dc5038 -> 9354b69)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch trunk in repository gcc. from 6dc5038 remove more useless typedefs new 9354b69 [ARM] Use %wd format for lane printing in bounds_check The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/ChangeLog | 5 +++++ gcc/config/arm/arm.c | 4 ++-- 2 files changed, 7 insertions(+), 2 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

9 years, 3 months

[toolchain/abe] branch ryanarn/reduced_parallel updated: Yet another try to force dejagnu verbosity.

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This is an automated email from the git hooks/post-receive script. yvan.roux pushed a commit to branch ryanarn/reduced_parallel in repository toolchain/abe. The following commit(s) were added to refs/heads/ryanarn/reduced_parallel by this push: new a3e474f Yet another try to force dejagnu verbosity. a3e474f is described below commit a3e474f60066bac7bd28b25bb763ba9982209ec4 Author: Yvan Roux <yvan.roux(a)linaro.org> Date: Wed Aug 19 10:32:49 2015 +0200 Yet another try to force dejagnu verbosity. Change-Id: I23ebc49bd5b51918481f75b8810b447ea344a50d --- lib/make.sh | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/lib/make.sh b/lib/make.sh index 2a0966c..67a4198 100755 --- a/lib/make.sh +++ b/lib/make.sh @@ -755,7 +755,7 @@ make_check() if test x"${build}" = x"${target}" -a x"${tarbin}" != x"yes"; then # Overwrite ${checklog} in order to provide a clean log file # if make check has been run more than once on a build tree. - dryrun "make check RUNTESTFLAGS=\"${runtest_flags} --xml=${tool}.xml \" ${make_fl [...] + dryrun "make check RUNTESTFLAGS=\"${runtest_flags} --xml=${tool}.xml -v -v -v\" $ [...] if test $? -gt 0; then error "make check -C ${builddir} failed." return 1 @@ -827,7 +827,7 @@ make_check() for i in ${dirs}; do # Always append "tee -a" to the log when building components individually - dryrun "make ${check_targets} SYSROOT_UNDER_TEST=${sysroots} FLAGS_UND [...] + dryrun "make ${check_targets} SYSROOT_UNDER_TEST=${sysroots} FLAGS_UND [...] if test $? -gt 0; then error "make ${check_targets} -C ${builddir}$i failed." return 1 -- To stop receiving notification emails like this one, please contact the administrator of this repository.

9 years, 3 months

[toolchain/abe] branch ryanarn/reduced_parallel updated: Temporary fix RUNTESTFLAGS bad propagation.

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This is an automated email from the git hooks/post-receive script. yvan.roux pushed a commit to branch ryanarn/reduced_parallel in repository toolchain/abe. The following commit(s) were added to refs/heads/ryanarn/reduced_parallel by this push: new 6dbdc4f Temporary fix RUNTESTFLAGS bad propagation. 6dbdc4f is described below commit 6dbdc4f0f9082e91e0b6cc6b73ba710a306f5068 Author: Yvan Roux <yvan.roux(a)linaro.org> Date: Wed Aug 19 08:45:04 2015 +0200 Temporary fix RUNTESTFLAGS bad propagation. Change-Id: Ie59a4f7c4f0708e45aa0a9c012239e9368c6d773 --- config/gcc.conf | 2 +- jenkins.sh | 2 +- lib/make.sh | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/config/gcc.conf b/config/gcc.conf index 19c44ca..61b28b9 100644 --- a/config/gcc.conf +++ b/config/gcc.conf @@ -235,4 +235,4 @@ else fi # This is a list of default flags always supplied to "make check". -runtest_flags="" +runtest_flags="-v -v -v" diff --git a/jenkins.sh b/jenkins.sh index f786528..b2205f0 100755 --- a/jenkins.sh +++ b/jenkins.sh @@ -343,7 +343,7 @@ fi (cd $user_snapshots/gcc.git; git fetch origin '+refs/changes/*:refs/remotes/gerrit [...] # Turn on extra verbose dejagnu logging -export RUNTESTFLAGS="-v -v -v --debug" +export RUNTESTFLAGS="-v -v -v" # Now we build the cross compiler, for a native compiler this becomes # the stage2 bootstrap build. diff --git a/lib/make.sh b/lib/make.sh index eda3a7b..2a0966c 100755 --- a/lib/make.sh +++ b/lib/make.sh @@ -731,7 +731,7 @@ make_check() fi if test x"${override_runtestflags}" != x; then - local make_flags="${make_flags} RUNTESTFLAGS=\"${override_runtestflags} -v [...] + local make_flags="${make_flags} RUNTESTFLAGS=\"${override_runtestflags} -v [...] fi if test x"${parallel}" = x"yes"; then -- To stop receiving notification emails like this one, please contact the administrator of this repository.

9 years, 3 months

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