Add new feature checks related to crypto to the hwcap test.
The following is a log snippet from my local testing environment based on for-next/selftests: ~~~ TAP version 13 1..111 # AES present ok 1 cpuinfo_match_AES ok 2 sigill_AES ok 3 # SKIP sigbus_AES # CRC32 present ok 4 cpuinfo_match_CRC32 ok 5 sigill_CRC32 ok 6 # SKIP sigbus_CRC32 ok 7 cpuinfo_match_CSSC # sigill_reported for CSSC ok 8 # SKIP sigill_CSSC ok 9 # SKIP sigbus_CSSC # FP present ok 10 cpuinfo_match_FP ok 11 sigill_FP ok 12 # SKIP sigbus_FP # JSCVT present ok 13 cpuinfo_match_JSCVT ok 14 sigill_JSCVT ok 15 # SKIP sigbus_JSCVT # LRCPC present ok 16 cpuinfo_match_LRCPC ok 17 sigill_LRCPC ok 18 # SKIP sigbus_LRCPC # LRCPC2 present ok 19 cpuinfo_match_LRCPC2 ok 20 sigill_LRCPC2 ok 21 # SKIP sigbus_LRCPC2 # LSE present ok 22 cpuinfo_match_LSE ok 23 sigill_LSE ok 24 # SKIP sigbus_LSE # LSE2 present ok 25 cpuinfo_match_LSE2 ok 26 sigill_LSE2 ok 27 sigbus_LSE2 ok 28 cpuinfo_match_MOPS ok 29 sigill_MOPS ok 30 # SKIP sigbus_MOPS # RNG present ok 31 cpuinfo_match_RNG ok 32 sigill_RNG ok 33 # SKIP sigbus_RNG # PMULL present ok 34 cpuinfo_match_PMULL ok 35 sigill_PMULL ok 36 # SKIP sigbus_PMULL ok 37 cpuinfo_match_RPRFM ok 38 # SKIP sigill_RPRFM ok 39 # SKIP sigbus_RPRFM # SHA1 present ok 40 cpuinfo_match_SHA1 ok 41 sigill_SHA1 ok 42 # SKIP sigbus_SHA1 # SHA2 present ok 43 cpuinfo_match_SHA2 ok 44 sigill_SHA2 ok 45 # SKIP sigbus_SHA2 # SHA512 present ok 46 cpuinfo_match_SHA512 ok 47 sigill_SHA512 ok 48 # SKIP sigbus_SHA512 ok 49 cpuinfo_match_SME ok 50 sigill_SME ok 51 # SKIP sigbus_SME ok 52 cpuinfo_match_SME2 ok 53 sigill_SME2 ok 54 # SKIP sigbus_SME2 ok 55 cpuinfo_match_SME 2.1 # sigill_reported for SME 2.1 ok 56 # SKIP sigill_SME 2.1 ok 57 # SKIP sigbus_SME 2.1 ok 58 cpuinfo_match_SME I16I32 # sigill_reported for SME I16I32 ok 59 # SKIP sigill_SME I16I32 ok 60 # SKIP sigbus_SME I16I32 ok 61 cpuinfo_match_SME BI32I32 # sigill_reported for SME BI32I32 ok 62 # SKIP sigill_SME BI32I32 ok 63 # SKIP sigbus_SME BI32I32 ok 64 cpuinfo_match_SME B16B16 # sigill_reported for SME B16B16 ok 65 # SKIP sigill_SME B16B16 ok 66 # SKIP sigbus_SME B16B16 ok 67 cpuinfo_match_SME F16F16 # sigill_reported for SME F16F16 ok 68 # SKIP sigill_SME F16F16 ok 69 # SKIP sigbus_SME F16F16 # SVE present ok 70 cpuinfo_match_SVE ok 71 sigill_SVE ok 72 # SKIP sigbus_SVE ok 73 cpuinfo_match_SVE 2 # sigill_reported for SVE 2 ok 74 # SKIP sigill_SVE 2 ok 75 # SKIP sigbus_SVE 2 ok 76 cpuinfo_match_SVE 2.1 # sigill_reported for SVE 2.1 ok 77 # SKIP sigill_SVE 2.1 ok 78 # SKIP sigbus_SVE 2.1 ok 79 cpuinfo_match_SVE AES # sigill_reported for SVE AES ok 80 # SKIP sigill_SVE AES ok 81 # SKIP sigbus_SVE AES ok 82 cpuinfo_match_SVE2 PMULL # sigill_reported for SVE2 PMULL ok 83 # SKIP sigill_SVE2 PMULL ok 84 # SKIP sigbus_SVE2 PMULL ok 85 cpuinfo_match_SVE2 BITPERM # sigill_reported for SVE2 BITPERM ok 86 # SKIP sigill_SVE2 BITPERM ok 87 # SKIP sigbus_SVE2 BITPERM ok 88 cpuinfo_match_SVE2 SHA3 # sigill_reported for SVE2 SHA3 ok 89 # SKIP sigill_SVE2 SHA3 ok 90 # SKIP sigbus_SVE2 SHA3 ok 91 cpuinfo_match_SVE2 SM4 # sigill_reported for SVE2 SM4 ok 92 # SKIP sigill_SVE2 SM4 ok 93 # SKIP sigbus_SVE2 SM4 # SVE2 I8MM present ok 94 cpuinfo_match_SVE2 I8MM ok 95 sigill_SVE2 I8MM ok 96 # SKIP sigbus_SVE2 I8MM # SVE2 F32MM present ok 97 cpuinfo_match_SVE2 F32MM ok 98 sigill_SVE2 F32MM ok 99 # SKIP sigbus_SVE2 F32MM # SVE2 F64MM present ok 100 cpuinfo_match_SVE2 F64MM ok 101 sigill_SVE2 F64MM ok 102 # SKIP sigbus_SVE2 F64MM # SVE2 BF16 present ok 103 cpuinfo_match_SVE2 BF16 ok 104 sigill_SVE2 BF16 ok 105 # SKIP sigbus_SVE2 BF16 ok 106 cpuinfo_match_SVE2 EBF16 ok 107 # SKIP sigill_SVE2 EBF16 ok 108 # SKIP sigbus_SVE2 EBF16 ok 109 cpuinfo_match_HBC ok 110 sigill_HBC ok 111 # SKIP sigbus_HBC # Totals: pass:60 fail:0 xfail:0 xpass:0 skip:51 error:0 ~~~
Zeng Heng (4): kselftest/arm64: add SHA1 and related features to hwcap test kselftest/arm64: add AES feature check to hwcap test kselftest/arm64: add pmull feature to hwcap test kselftest/arm64: add jscvt feature to hwcap test
tools/testing/selftests/arm64/abi/hwcap.c | 77 +++++++++++++++++++++++ 1 file changed, 77 insertions(+)
-- 2.25.1
Add the SHA1 and related features check in the set of hwcap tests.
Signed-off-by: Zeng Heng zengheng4@huawei.com --- tools/testing/selftests/arm64/abi/hwcap.c | 39 +++++++++++++++++++++++ 1 file changed, 39 insertions(+)
diff --git a/tools/testing/selftests/arm64/abi/hwcap.c b/tools/testing/selftests/arm64/abi/hwcap.c index af5490cae09b..c87a2e167ee8 100644 --- a/tools/testing/selftests/arm64/abi/hwcap.c +++ b/tools/testing/selftests/arm64/abi/hwcap.c @@ -87,6 +87,24 @@ static void rng_sigill(void) asm volatile("mrs x0, S3_3_C2_C4_0" : : : "x0"); }
+static void sha1_sigill(void) +{ + /* SHA1H S0, S0 */ + asm volatile(".inst 0x5e280800" : : : ); +} + +static void sha2_sigill(void) +{ + /* SHA256H Q0, Q0, V0.4S */ + asm volatile(".inst 0x5e004000" : : : ); +} + +static void sha512_sigill(void) +{ + /* SHA512H Q0, Q0, V0.2D */ + asm volatile(".inst 0xce608000" : : : ); +} + static void sme_sigill(void) { /* RDSVL x0, #0 */ @@ -334,6 +352,27 @@ static const struct hwcap_data { .hwcap_bit = HWCAP2_RPRFM, .cpuinfo = "rprfm", }, + { + .name = "SHA1", + .at_hwcap = AT_HWCAP, + .hwcap_bit = HWCAP_SHA1, + .cpuinfo = "sha1", + .sigill_fn = sha1_sigill, + }, + { + .name = "SHA2", + .at_hwcap = AT_HWCAP, + .hwcap_bit = HWCAP_SHA2, + .cpuinfo = "sha2", + .sigill_fn = sha2_sigill, + }, + { + .name = "SHA512", + .at_hwcap = AT_HWCAP, + .hwcap_bit = HWCAP_SHA512, + .cpuinfo = "sha512", + .sigill_fn = sha512_sigill, + }, { .name = "SME", .at_hwcap = AT_HWCAP2,
Add the AES feature check in the set of hwcap tests.
Signed-off-by: Zeng Heng zengheng4@huawei.com --- tools/testing/selftests/arm64/abi/hwcap.c | 13 +++++++++++++ 1 file changed, 13 insertions(+)
diff --git a/tools/testing/selftests/arm64/abi/hwcap.c b/tools/testing/selftests/arm64/abi/hwcap.c index c87a2e167ee8..d9a49b1467ac 100644 --- a/tools/testing/selftests/arm64/abi/hwcap.c +++ b/tools/testing/selftests/arm64/abi/hwcap.c @@ -34,6 +34,12 @@ */ typedef void (*sig_fn)(void);
+static void aes_sigill(void) +{ + /* AESE V0.16B, V0.16B */ + asm volatile(".inst 0x4e284800" : : : ); +} + static void atomics_sigill(void) { /* STADD W0, [SP] */ @@ -280,6 +286,13 @@ static const struct hwcap_data { sig_fn sigbus_fn; bool sigbus_reliable; } hwcaps[] = { + { + .name = "AES", + .at_hwcap = AT_HWCAP, + .hwcap_bit = HWCAP_AES, + .cpuinfo = "aes", + .sigill_fn = aes_sigill, + }, { .name = "CRC32", .at_hwcap = AT_HWCAP,
Add the pmull feature check in the set of hwcap tests.
Signed-off-by: Zeng Heng zengheng4@huawei.com --- tools/testing/selftests/arm64/abi/hwcap.c | 13 +++++++++++++ 1 file changed, 13 insertions(+)
diff --git a/tools/testing/selftests/arm64/abi/hwcap.c b/tools/testing/selftests/arm64/abi/hwcap.c index d9a49b1467ac..df7a62659aa2 100644 --- a/tools/testing/selftests/arm64/abi/hwcap.c +++ b/tools/testing/selftests/arm64/abi/hwcap.c @@ -88,6 +88,12 @@ static void mops_sigill(void) : "cc", "memory"); }
+static void pmull_sigill(void) +{ + /* PMULL V0.1Q, V0.1D, V0.1D */ + asm volatile(".inst 0x0ee0e000" : : : ); +} + static void rng_sigill(void) { asm volatile("mrs x0, S3_3_C2_C4_0" : : : "x0"); @@ -352,6 +358,13 @@ static const struct hwcap_data { .sigill_fn = mops_sigill, .sigill_reliable = true, }, + { + .name = "PMULL", + .at_hwcap = AT_HWCAP, + .hwcap_bit = HWCAP_PMULL, + .cpuinfo = "pmull", + .sigill_fn = pmull_sigill, + }, { .name = "RNG", .at_hwcap = AT_HWCAP2,
Add the jscvt feature check in the set of hwcap tests.
Due to the requirement of jscvt feature, a compiler configuration of v8.3 or above is needed to support assembly. Therefore, hand encode is used here instead.
Signed-off-by: Zeng Heng zengheng4@huawei.com --- tools/testing/selftests/arm64/abi/hwcap.c | 13 +++++++++++++ 1 file changed, 13 insertions(+)
diff --git a/tools/testing/selftests/arm64/abi/hwcap.c b/tools/testing/selftests/arm64/abi/hwcap.c index df7a62659aa2..2683d0deb4c3 100644 --- a/tools/testing/selftests/arm64/abi/hwcap.c +++ b/tools/testing/selftests/arm64/abi/hwcap.c @@ -68,6 +68,12 @@ static void ilrcpc_sigill(void) asm volatile(".inst 0x994083e0" : : : ); }
+static void jscvt_sigill(void) +{ + /* FJCVTZS W0, D0 */ + asm volatile(".inst 0x1e7e0000" : : : ); +} + static void lrcpc_sigill(void) { /* LDAPR W0, [SP, #0] */ @@ -320,6 +326,13 @@ static const struct hwcap_data { .cpuinfo = "fp", .sigill_fn = fp_sigill, }, + { + .name = "JSCVT", + .at_hwcap = AT_HWCAP, + .hwcap_bit = HWCAP_JSCVT, + .cpuinfo = "jscvt", + .sigill_fn = jscvt_sigill, + }, { .name = "LRCPC", .at_hwcap = AT_HWCAP,
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