This series contains a bit of a grab bag of improvements to the floating point tests, mainly fp-ptrace. Globally over all the tests we start using defines from the generated sysregs (following the example of the KVM selftests) for SVCR, stop being quite so wasteful with registers when calling into the assembler code then expand the coverage of both ZA writes and FPMR (which was not there since fp-ptrace and the 2023 dpISA extensions were on the list at the same time).
Signed-off-by: Mark Brown broonie@kernel.org --- Mark Brown (4): kselftets/arm64: Use flag bits for features in fp-ptrace assembler code kselftest/arm64: Use a define for SVCR kselftest/arm64: Expand the set of ZA writes fp-ptrace does kselftest/arm64: Add FPMR coverage to fp-ptrace
tools/testing/selftests/arm64/fp/Makefile | 20 ++- tools/testing/selftests/arm64/fp/fp-ptrace-asm.S | 52 +++++--- tools/testing/selftests/arm64/fp/fp-ptrace.c | 155 +++++++++++++++++++++-- tools/testing/selftests/arm64/fp/fp-ptrace.h | 16 ++- tools/testing/selftests/arm64/fp/sve-test.S | 5 +- tools/testing/selftests/arm64/fp/za-fork-asm.S | 3 +- tools/testing/selftests/arm64/fp/za-test.S | 6 +- tools/testing/selftests/arm64/fp/zt-test.S | 5 +- 8 files changed, 213 insertions(+), 49 deletions(-) --- base-commit: 8e929cb546ee42c9a61d24fae60605e9e3192354 change-id: 20241105-arm64-fp-ptrace-fpmr-ff061facd3da
Best regards,
The assembler portions of fp-ptrace are passed feature flags by the C code indicating which architectural features are supported. Currently these use an entire register for each flag which is wasteful and gets cumbersome as new flags are added. Switch to using flag bits in a single register to make things easier to maintain.
No functional change.
Signed-off-by: Mark Brown broonie@kernel.org --- tools/testing/selftests/arm64/fp/fp-ptrace-asm.S | 32 +++++++++++++----------- tools/testing/selftests/arm64/fp/fp-ptrace.c | 17 ++++++++++--- tools/testing/selftests/arm64/fp/fp-ptrace.h | 10 ++++++++ 3 files changed, 41 insertions(+), 18 deletions(-)
diff --git a/tools/testing/selftests/arm64/fp/fp-ptrace-asm.S b/tools/testing/selftests/arm64/fp/fp-ptrace-asm.S index 7ad59d92d02b28e4a6b328fde96039329ea8862a..5e7e9c878f2ce797e3ba5f4033a42526830393e6 100644 --- a/tools/testing/selftests/arm64/fp/fp-ptrace-asm.S +++ b/tools/testing/selftests/arm64/fp/fp-ptrace-asm.S @@ -15,10 +15,7 @@
// Load and save register values with pauses for ptrace // -// x0 - SVE in use -// x1 - SME in use -// x2 - SME2 in use -// x3 - FA64 supported +// x0 - HAVE_ flags indicating which features are in use
.globl load_and_save load_and_save: @@ -44,7 +41,7 @@ load_and_save: ldp q30, q31, [x7, #16 * 30]
// SME? - cbz x1, check_sve_in + tbz x0, #HAVE_SME_SHIFT, check_sve_in
adrp x7, svcr_in ldr x7, [x7, :lo12:svcr_in] @@ -64,7 +61,7 @@ load_and_save: bne 1b
// ZT? - cbz x2, check_sm_in + tbz x0, #HAVE_SME2_SHIFT, check_sm_in adrp x6, zt_in add x6, x6, :lo12:zt_in _ldr_zt 6 @@ -72,12 +69,16 @@ load_and_save: // In streaming mode? check_sm_in: tbz x7, #SVCR_SM_SHIFT, check_sve_in - mov x4, x3 // Load FFR if we have FA64 + + // Load FFR if we have FA64 + mov x4, #0 + tbz x0, #HAVE_FA64_SHIFT, load_sve + mov x4, #1 b load_sve
// SVE? check_sve_in: - cbz x0, wait_for_writes + tbz x0, #HAVE_SVE_SHIFT, wait_for_writes mov x4, #1
load_sve: @@ -165,8 +166,7 @@ wait_for_writes: stp q28, q29, [x7, #16 * 28] stp q30, q31, [x7, #16 * 30]
- // SME? - cbz x1, check_sve_out + tbz x0, #HAVE_SME_SHIFT, check_sve_out
rdsvl 11, 1 adrp x6, sme_vl_out @@ -187,7 +187,7 @@ wait_for_writes: bne 1b
// ZT? - cbz x2, check_sm_out + tbz x0, #HAVE_SME2_SHIFT, check_sm_out adrp x6, zt_out add x6, x6, :lo12:zt_out _str_zt 6 @@ -195,12 +195,16 @@ wait_for_writes: // In streaming mode? check_sm_out: tbz x7, #SVCR_SM_SHIFT, check_sve_out - mov x4, x3 // FFR? + + // Do we have FA64 and FFR? + mov x4, #0 + tbz x0, #HAVE_FA64_SHIFT, read_sve + mov x4, #1 b read_sve
// SVE? check_sve_out: - cbz x0, wait_for_reads + tbz x0, #HAVE_SVE_SHIFT, wait_for_reads mov x4, #1
rdvl x7, #1 @@ -271,7 +275,7 @@ wait_for_reads: brk #0
// Ensure we don't leave ourselves in streaming mode - cbz x1, out + tbz x0, #HAVE_SME_SHIFT, out msr S3_3_C4_C2_2, xzr
out: diff --git a/tools/testing/selftests/arm64/fp/fp-ptrace.c b/tools/testing/selftests/arm64/fp/fp-ptrace.c index c7ceafe5f4712b2c93823c1025f3a23ac0594325..d96af27487fa642e94ecc971f53cb78c233e7b44 100644 --- a/tools/testing/selftests/arm64/fp/fp-ptrace.c +++ b/tools/testing/selftests/arm64/fp/fp-ptrace.c @@ -82,7 +82,7 @@ uint64_t sve_vl_out; uint64_t sme_vl_out; uint64_t svcr_in, svcr_expected, svcr_out;
-void load_and_save(int sve, int sme, int sme2, int fa64); +void load_and_save(int flags);
static bool got_alarm;
@@ -198,7 +198,7 @@ static int vl_expected(struct test_config *config)
static void run_child(struct test_config *config) { - int ret; + int ret, flags;
/* Let the parent attach to us */ ret = ptrace(PTRACE_TRACEME, 0, 0, 0); @@ -224,8 +224,17 @@ static void run_child(struct test_config *config) }
/* Load values and wait for the parent */ - load_and_save(sve_supported(), sme_supported(), - sme2_supported(), fa64_supported()); + flags = 0; + if (sve_supported()) + flags |= HAVE_SVE; + if (sme_supported()) + flags |= HAVE_SME; + if (sme2_supported()) + flags |= HAVE_SME2; + if (fa64_supported()) + flags |= HAVE_FA64; + + load_and_save(flags);
exit(0); } diff --git a/tools/testing/selftests/arm64/fp/fp-ptrace.h b/tools/testing/selftests/arm64/fp/fp-ptrace.h index db4f2c4d750c5c04e3d257e37a1966296ca74956..36ca627e1980f6a384d9ed0f2e9d4bd32d90f893 100644 --- a/tools/testing/selftests/arm64/fp/fp-ptrace.h +++ b/tools/testing/selftests/arm64/fp/fp-ptrace.h @@ -10,4 +10,14 @@ #define SVCR_SM (1 << SVCR_SM_SHIFT) #define SVCR_ZA (1 << SVCR_ZA_SHIFT)
+#define HAVE_SVE_SHIFT 0 +#define HAVE_SME_SHIFT 1 +#define HAVE_SME2_SHIFT 2 +#define HAVE_FA64_SHIFT 3 + +#define HAVE_SVE (1 << HAVE_SVE_SHIFT) +#define HAVE_SME (1 << HAVE_SME_SHIFT) +#define HAVE_SME2 (1 << HAVE_SME2_SHIFT) +#define HAVE_FA64 (1 << HAVE_FA64_SHIFT) + #endif
For some reason when we're accessing SVCR in the FP tests we use the raw numerical version of the register name rather than hiding that behind a preprocessor macro for readability. Since we already use the generated defines for sysreg bitfields in other the KVM selftests let's do the same thing here, also replacing the defines for the SVCR bitfields which we have.
The build setup for fp-ptrace is a little fun so we have to manually define __ASSEMBLY__ in the source code for that.
Signed-off-by: Mark Brown broonie@kernel.org --- tools/testing/selftests/arm64/fp/Makefile | 20 +++++++++++++------- tools/testing/selftests/arm64/fp/fp-ptrace-asm.S | 11 ++++++++--- tools/testing/selftests/arm64/fp/fp-ptrace.c | 2 ++ tools/testing/selftests/arm64/fp/fp-ptrace.h | 6 +----- tools/testing/selftests/arm64/fp/sve-test.S | 5 +++-- tools/testing/selftests/arm64/fp/za-fork-asm.S | 3 ++- tools/testing/selftests/arm64/fp/za-test.S | 6 ++++-- tools/testing/selftests/arm64/fp/zt-test.S | 5 +++-- 8 files changed, 36 insertions(+), 22 deletions(-)
diff --git a/tools/testing/selftests/arm64/fp/Makefile b/tools/testing/selftests/arm64/fp/Makefile index d171021e4cdd1a880f842c7d58b1b149e79e4794..da808074e6ca9388c0ab7a716632742d1a8acbf4 100644 --- a/tools/testing/selftests/arm64/fp/Makefile +++ b/tools/testing/selftests/arm64/fp/Makefile @@ -3,7 +3,13 @@ # A proper top_srcdir is needed by KSFT(lib.mk) top_srcdir = $(realpath ../../../../../)
-CFLAGS += $(KHDR_INCLUDES) +ARCH_TOOLS_INCLUDES=\ + -I${top_srcdir}/tools/include \ + -I${top_srcdir}/tools/arch/arm64/include \ + -I${top_srcdir}/tools/arch/arm64/include/generated + +CFLAGS += $(KHDR_INCLUDES) $(ARCH_TOOLS_INCLUDES) +ASFLAGS += -D__ASSEMBLY__ $(ARCH_TOOLS_INCLUDES)
TEST_GEN_PROGS := \ fp-ptrace \ @@ -26,18 +32,18 @@ EXTRA_CLEAN += $(OUTPUT)/asm-utils.o $(OUTPUT)/rdvl.o $(OUTPUT)/za-fork-asm.o
# Build with nolibc to avoid effects due to libc's clone() support $(OUTPUT)/fp-pidbench: fp-pidbench.S $(OUTPUT)/asm-utils.o - $(CC) -nostdlib $^ -o $@ + $(CC) $(ASFLAGS) -nostdlib $^ -o $@ $(OUTPUT)/fp-ptrace: fp-ptrace.c fp-ptrace-asm.S $(OUTPUT)/fpsimd-test: fpsimd-test.S $(OUTPUT)/asm-utils.o - $(CC) -nostdlib $^ -o $@ + $(CC) $(ASFLAGS) -nostdlib $^ -o $@ $(OUTPUT)/rdvl-sve: rdvl-sve.c $(OUTPUT)/rdvl.o $(OUTPUT)/rdvl-sme: rdvl-sme.c $(OUTPUT)/rdvl.o $(OUTPUT)/sve-ptrace: sve-ptrace.c $(OUTPUT)/sve-probe-vls: sve-probe-vls.c $(OUTPUT)/rdvl.o $(OUTPUT)/sve-test: sve-test.S $(OUTPUT)/asm-utils.o - $(CC) -nostdlib $^ -o $@ + $(CC) $(ASFLAGS) -nostdlib $^ -o $@ $(OUTPUT)/ssve-test: sve-test.S $(OUTPUT)/asm-utils.o - $(CC) -DSSVE -nostdlib $^ -o $@ + $(CC) -DSSVE $(ASFLAGS) -nostdlib $^ -o $@ $(OUTPUT)/vec-syscfg: vec-syscfg.c $(OUTPUT)/rdvl.o $(OUTPUT)/vlset: vlset.c $(OUTPUT)/za-fork: za-fork.c $(OUTPUT)/za-fork-asm.o @@ -46,9 +52,9 @@ $(OUTPUT)/za-fork: za-fork.c $(OUTPUT)/za-fork-asm.o -static -ffreestanding -Wall $^ -o $@ $(OUTPUT)/za-ptrace: za-ptrace.c $(OUTPUT)/za-test: za-test.S $(OUTPUT)/asm-utils.o - $(CC) -nostdlib $^ -o $@ + $(CC) $(ASFLAGS) -nostdlib $^ -o $@ $(OUTPUT)/zt-ptrace: zt-ptrace.c $(OUTPUT)/zt-test: zt-test.S $(OUTPUT)/asm-utils.o - $(CC) -nostdlib $^ -o $@ + $(CC) $(ASFLAGS) -nostdlib $^ -o $@
include ../../lib.mk diff --git a/tools/testing/selftests/arm64/fp/fp-ptrace-asm.S b/tools/testing/selftests/arm64/fp/fp-ptrace-asm.S index 5e7e9c878f2ce797e3ba5f4033a42526830393e6..4a9242296ef75cf1a83ec561cda11a31e9f69bd4 100644 --- a/tools/testing/selftests/arm64/fp/fp-ptrace-asm.S +++ b/tools/testing/selftests/arm64/fp/fp-ptrace-asm.S @@ -8,6 +8,11 @@ // break on a further breakpoint //
+/* The build system is dumb and doesn't do this for us */ +#define __ASSEMBLY__ + +#include <asm/sysreg.h> + #include "fp-ptrace.h" #include "sme-inst.h"
@@ -47,7 +52,7 @@ load_and_save: ldr x7, [x7, :lo12:svcr_in] // SVCR is 0 by default, avoid triggering SME if not in use cbz x7, check_sve_in - msr S3_3_C4_C2_2, x7 + msr REG_SVCR, x7
// ZA? tbz x7, #SVCR_ZA_SHIFT, check_sm_in @@ -172,7 +177,7 @@ wait_for_writes: adrp x6, sme_vl_out str x11, [x6, :lo12:sme_vl_out]
- mrs x7, S3_3_C4_C2_2 + mrs x7, REG_SVCR adrp x6, svcr_out str x7, [x6, :lo12:svcr_out]
@@ -276,7 +281,7 @@ wait_for_reads:
// Ensure we don't leave ourselves in streaming mode tbz x0, #HAVE_SME_SHIFT, out - msr S3_3_C4_C2_2, xzr + msr REG_SVCR, xzr
out: ldp x11, x12, [sp, #-0x10] diff --git a/tools/testing/selftests/arm64/fp/fp-ptrace.c b/tools/testing/selftests/arm64/fp/fp-ptrace.c index d96af27487fa642e94ecc971f53cb78c233e7b44..22d52a75ac9687673c4354f66abcf7204ce17875 100644 --- a/tools/testing/selftests/arm64/fp/fp-ptrace.c +++ b/tools/testing/selftests/arm64/fp/fp-ptrace.c @@ -27,6 +27,8 @@ #include <asm/sve_context.h> #include <asm/ptrace.h>
+#include <asm/sysreg.h> + #include "../../kselftest.h"
#include "fp-ptrace.h" diff --git a/tools/testing/selftests/arm64/fp/fp-ptrace.h b/tools/testing/selftests/arm64/fp/fp-ptrace.h index 36ca627e1980f6a384d9ed0f2e9d4bd32d90f893..a3849817cf4ee23879da835cb7f66821b5e09bd0 100644 --- a/tools/testing/selftests/arm64/fp/fp-ptrace.h +++ b/tools/testing/selftests/arm64/fp/fp-ptrace.h @@ -4,11 +4,7 @@ #ifndef FP_PTRACE_H #define FP_PTRACE_H
-#define SVCR_SM_SHIFT 0 -#define SVCR_ZA_SHIFT 1 - -#define SVCR_SM (1 << SVCR_SM_SHIFT) -#define SVCR_ZA (1 << SVCR_ZA_SHIFT) +#include <asm/sysreg.h>
#define HAVE_SVE_SHIFT 0 #define HAVE_SME_SHIFT 1 diff --git a/tools/testing/selftests/arm64/fp/sve-test.S b/tools/testing/selftests/arm64/fp/sve-test.S index fff60e2a25addfd4850ef71aa3cf6535ac880ffd..20da6398f98afaa410d81b2d776643b4d7716f35 100644 --- a/tools/testing/selftests/arm64/fp/sve-test.S +++ b/tools/testing/selftests/arm64/fp/sve-test.S @@ -10,6 +10,7 @@ // (leave it running for as long as you want...) // kill $pids
+#include <asm/sysreg.h> #include <asm/unistd.h> #include "assembler.h" #include "asm-offsets.h" @@ -474,7 +475,7 @@ function _start // svc #0
#ifdef SSVE - mrs x0, S3_3_C4_C2_2 // SVCR should have ZA=0,SM=1 + mrs x0, REG_SVCR // SVCR should have ZA=0,SM=1 and x1, x0, #3 cmp x1, #1 b.ne svcr_barf @@ -516,7 +517,7 @@ function barf mov x12, x2 // data size
#ifdef SSVE - mrs x13, S3_3_C4_C2_2 + mrs x13, REG_SVCR #endif
puts "Mismatch: PID=" diff --git a/tools/testing/selftests/arm64/fp/za-fork-asm.S b/tools/testing/selftests/arm64/fp/za-fork-asm.S index 2fafadd491c326a31d6193551d6b26835ac7ade0..13d882ec40f2f5ab9fb6ab776e9a3e498594680d 100644 --- a/tools/testing/selftests/arm64/fp/za-fork-asm.S +++ b/tools/testing/selftests/arm64/fp/za-fork-asm.S @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-only // Copyright (C) 2021 ARM Limited.
+#include <asm/sysreg.h> #include "sme-inst.h"
.arch_extension sve @@ -35,7 +36,7 @@ fork_test: .globl verify_fork verify_fork: // SVCR should have ZA=1, SM=0 - mrs x0, S3_3_C4_C2_2 + mrs x0, REG_SVCR and x1, x0, #3 cmp x1, #2 beq 1f diff --git a/tools/testing/selftests/arm64/fp/za-test.S b/tools/testing/selftests/arm64/fp/za-test.S index 095b45531640966e685408057c08ada67e68998b..fc8e1f47d6463efd8e59221b14b2502e960e64c4 100644 --- a/tools/testing/selftests/arm64/fp/za-test.S +++ b/tools/testing/selftests/arm64/fp/za-test.S @@ -10,6 +10,8 @@ // (leave it running for as long as you want...) // kill $pids
+ +#include <asm/sysreg.h> #include <asm/unistd.h> #include "assembler.h" #include "asm-offsets.h" @@ -305,7 +307,7 @@ function _start 1: svc #0
- mrs x0, S3_3_C4_C2_2 // SVCR should have ZA=1,SM=0 + mrs x0, REG_SVCR // SVCR should have ZA=1,SM=0 and x1, x0, #3 cmp x1, #2 b.ne svcr_barf @@ -334,7 +336,7 @@ function barf // svc #0 // end hack
- mrs x13, S3_3_C4_C2_2 + mrs x13, REG_SVCR
smstop mov x10, x0 // expected data diff --git a/tools/testing/selftests/arm64/fp/zt-test.S b/tools/testing/selftests/arm64/fp/zt-test.S index b5c81e81a37946c1bffe810568855939e9ceb08e..0066ba3d5818beda9901bead8725d3909714ddeb 100644 --- a/tools/testing/selftests/arm64/fp/zt-test.S +++ b/tools/testing/selftests/arm64/fp/zt-test.S @@ -6,6 +6,7 @@ // Repeatedly writes unique test patterns into ZT0 // and reads them back to verify integrity.
+#include <asm/sysreg.h> #include <asm/unistd.h> #include "assembler.h" #include "asm-offsets.h" @@ -244,7 +245,7 @@ function _start mov x8, #__NR_sched_yield // Encourage preemption svc #0
- mrs x0, S3_3_C4_C2_2 // SVCR should have ZA=1,SM=0 + mrs x0, REG_SVCR // SVCR should have ZA=1,SM=0 and x1, x0, #3 cmp x1, #2 b.ne svcr_barf @@ -268,7 +269,7 @@ function barf // svc #0 // end hack
- mrs x13, S3_3_C4_C2_2 + mrs x13, REG_SVCR smstop mov x10, x0 // expected data mov x11, x1 // actual data
On Thu, Nov 07, 2024 at 01:38:05AM +0000, Mark Brown wrote:
For some reason when we're accessing SVCR in the FP tests we use the raw numerical version of the register name rather than hiding that behind a preprocessor macro for readability. Since we already use the generated defines for sysreg bitfields in other the KVM selftests let's do the same thing here, also replacing the defines for the SVCR bitfields which we have.
The build setup for fp-ptrace is a little fun so we have to manually define __ASSEMBLY__ in the source code for that.
Signed-off-by: Mark Brown broonie@kernel.org
I get an error when trying to build this out of tree:
/home/cmarinas/work/linux/tools/testing/selftests/../../../tools/arch/arm64/include/asm/sysreg.h:132:10: fatal error: asm/sysreg-defs.h: No such file or directory 132 | #include "asm/sysreg-defs.h" | ^~~~~~~~~~~~~~~~~~~
Probably sysreg-defs.h has not been generated yet. Too late to figure it out now.
On Mon, Nov 11, 2024 at 11:34:02PM +0000, Catalin Marinas wrote:
I get an error when trying to build this out of tree:
/home/cmarinas/work/linux/tools/testing/selftests/../../../tools/arch/arm64/include/asm/sysreg.h:132:10: fatal error: asm/sysreg-defs.h: No such file or directory 132 | #include "asm/sysreg-defs.h" | ^~~~~~~~~~~~~~~~~~~
Probably sysreg-defs.h has not been generated yet. Too late to figure it out now.
We can just drop this from the series and replace it with dropping the FPMR define that we did this for into the patch that uses it, it's just mildly annoying.
Currently our test for implementable ZA writes is written in a bit of a convoluted fashion which excludes all changes where we clear SVCR.SM even though we can actually support that since changing the vector length resets SVCR. Make the logic more direct, enabling us to actually run these cases.
Signed-off-by: Mark Brown broonie@kernel.org --- tools/testing/selftests/arm64/fp/fp-ptrace.c | 18 ++++++++---------- 1 file changed, 8 insertions(+), 10 deletions(-)
diff --git a/tools/testing/selftests/arm64/fp/fp-ptrace.c b/tools/testing/selftests/arm64/fp/fp-ptrace.c index 22d52a75ac9687673c4354f66abcf7204ce17875..a35dc6d8f82af47bf6adedba7e69a6577ee9f7de 100644 --- a/tools/testing/selftests/arm64/fp/fp-ptrace.c +++ b/tools/testing/selftests/arm64/fp/fp-ptrace.c @@ -1080,21 +1080,19 @@ static void sve_write(pid_t child, struct test_config *config)
static bool za_write_supported(struct test_config *config) { - if (config->svcr_expected & SVCR_SM) { - if (!(config->svcr_in & SVCR_SM)) + if (config->sme_vl_in != config->sme_vl_expected) { + /* Changing the SME VL exits streaming mode. */ + if (config->svcr_expected & SVCR_SM) { return false; - - /* Changing the SME VL exits streaming mode */ - if (config->sme_vl_in != config->sme_vl_expected) { + } + } else { + /* Otherwise we can't change streaming mode */ + if ((config->svcr_in & SVCR_SM) != + (config->svcr_expected & SVCR_SM)) { return false; } }
- /* Can't disable SM outside a VL change */ - if ((config->svcr_in & SVCR_SM) && - !(config->svcr_expected & SVCR_SM)) - return false; - return true; }
Add coverage for FPMR to fp-ptrace. FPMR can be available independently of SVE and SME, if SME is supported then FPMR is cleared by entering and exiting streaming mode. As with other registers we generate random values to load into the register, we restrict these to bitfields which are always defined. We also leave bitfields where the valid values are affected by the set of supported FP8 formats zero to reduce complexity, it is unlikely that specific bitfields will be affected by ptrace issues.
Signed-off-by: Mark Brown broonie@kernel.org --- tools/testing/selftests/arm64/fp/fp-ptrace-asm.S | 23 +++-- tools/testing/selftests/arm64/fp/fp-ptrace.c | 118 +++++++++++++++++++++++ tools/testing/selftests/arm64/fp/fp-ptrace.h | 2 + 3 files changed, 136 insertions(+), 7 deletions(-)
diff --git a/tools/testing/selftests/arm64/fp/fp-ptrace-asm.S b/tools/testing/selftests/arm64/fp/fp-ptrace-asm.S index 4a9242296ef75cf1a83ec561cda11a31e9f69bd4..5c4cf6da2a79702f424f4beaf2f91b2ee6067eff 100644 --- a/tools/testing/selftests/arm64/fp/fp-ptrace-asm.S +++ b/tools/testing/selftests/arm64/fp/fp-ptrace-asm.S @@ -76,14 +76,12 @@ check_sm_in: tbz x7, #SVCR_SM_SHIFT, check_sve_in
// Load FFR if we have FA64 - mov x4, #0 - tbz x0, #HAVE_FA64_SHIFT, load_sve - mov x4, #1 + ubfx x4, x0, #HAVE_FA64_SHIFT, #1 b load_sve
// SVE? check_sve_in: - tbz x0, #HAVE_SVE_SHIFT, wait_for_writes + tbz x0, #HAVE_SVE_SHIFT, check_fpmr_in mov x4, #1
load_sve: @@ -148,6 +146,13 @@ load_sve: ldr p14, [x7, #14, MUL VL] ldr p15, [x7, #15, MUL VL]
+ // This has to come after we set PSTATE.SM +check_fpmr_in: + tbz x0, #HAVE_FPMR_SHIFT, wait_for_writes + adrp x7, fpmr_in + ldr x7, [x7, :lo12:fpmr_in] + msr FPMR, x7 + wait_for_writes: // Wait for the parent brk #0 @@ -171,6 +176,12 @@ wait_for_writes: stp q28, q29, [x7, #16 * 28] stp q30, q31, [x7, #16 * 30]
+ tbz x0, #HAVE_FPMR_SHIFT, check_sme_out + mrs x7, REG_FPMR + adrp x6, fpmr_out + str x7, [x6, :lo12:fpmr_out] + +check_sme_out: tbz x0, #HAVE_SME_SHIFT, check_sve_out
rdsvl 11, 1 @@ -202,9 +213,7 @@ check_sm_out: tbz x7, #SVCR_SM_SHIFT, check_sve_out
// Do we have FA64 and FFR? - mov x4, #0 - tbz x0, #HAVE_FA64_SHIFT, read_sve - mov x4, #1 + ubfx x4, x0, #HAVE_FA64_SHIFT, #1 b read_sve
// SVE? diff --git a/tools/testing/selftests/arm64/fp/fp-ptrace.c b/tools/testing/selftests/arm64/fp/fp-ptrace.c index a35dc6d8f82af47bf6adedba7e69a6577ee9f7de..14e88f867fb02784afe61a01873ae2676c869e8a 100644 --- a/tools/testing/selftests/arm64/fp/fp-ptrace.c +++ b/tools/testing/selftests/arm64/fp/fp-ptrace.c @@ -50,11 +50,22 @@ #define NT_ARM_ZT 0x40d #endif
+#ifndef NT_ARM_FPMR +#define NT_ARM_FPMR 0x40e +#endif + #define ARCH_VQ_MAX 256
/* VL 128..2048 in powers of 2 */ #define MAX_NUM_VLS 5
+/* + * FPMR bits we can set without doing feature checks to see if values + * are valid. + */ +#define FPMR_SAFE_BITS (FPMR_LSCALE2_MASK | FPMR_NSCALE_MASK | \ + FPMR_LSCALE_MASK | FPMR_OSC_MASK | FPMR_OSM_MASK) + #define NUM_FPR 32 __uint128_t v_in[NUM_FPR]; __uint128_t v_expected[NUM_FPR]; @@ -80,6 +91,8 @@ char zt_in[ZT_SIG_REG_BYTES]; char zt_expected[ZT_SIG_REG_BYTES]; char zt_out[ZT_SIG_REG_BYTES];
+uint64_t fpmr_in, fpmr_expected, fpmr_out; + uint64_t sve_vl_out; uint64_t sme_vl_out; uint64_t svcr_in, svcr_expected, svcr_out; @@ -130,6 +143,11 @@ static bool fa64_supported(void) return getauxval(AT_HWCAP2) & HWCAP2_SME_FA64; }
+static bool fpmr_supported(void) +{ + return getauxval(AT_HWCAP2) & HWCAP2_FPMR; +} + static bool compare_buffer(const char *name, void *out, void *expected, size_t size) { @@ -235,6 +253,8 @@ static void run_child(struct test_config *config) flags |= HAVE_SME2; if (fa64_supported()) flags |= HAVE_FA64; + if (fpmr_supported()) + flags |= HAVE_FPMR;
load_and_save(flags);
@@ -323,6 +343,14 @@ static void read_child_regs(pid_t child) iov_child.iov_len = sizeof(zt_out); read_one_child_regs(child, "ZT", &iov_parent, &iov_child); } + + if (fpmr_supported()) { + iov_parent.iov_base = &fpmr_out; + iov_parent.iov_len = sizeof(fpmr_out); + iov_child.iov_base = &fpmr_out; + iov_child.iov_len = sizeof(fpmr_out); + read_one_child_regs(child, "FPMR", &iov_parent, &iov_child); + } }
static bool continue_breakpoint(pid_t child, @@ -597,6 +625,26 @@ static bool check_ptrace_values_zt(pid_t child, struct test_config *config) return compare_buffer("initial ZT", buf, zt_in, ZT_SIG_REG_BYTES); }
+static bool check_ptrace_values_fpmr(pid_t child, struct test_config *config) +{ + uint64_t val; + struct iovec iov; + int ret; + + if (!fpmr_supported()) + return true; + + iov.iov_base = &val; + iov.iov_len = sizeof(val); + ret = ptrace(PTRACE_GETREGSET, child, NT_ARM_FPMR, &iov); + if (ret != 0) { + ksft_print_msg("Failed to read initial FPMR: %s (%d)\n", + strerror(errno), errno); + return false; + } + + return compare_buffer("initial FPMR", &val, &fpmr_in, sizeof(val)); +}
static bool check_ptrace_values(pid_t child, struct test_config *config) { @@ -631,6 +679,9 @@ static bool check_ptrace_values(pid_t child, struct test_config *config) if (!check_ptrace_values_zt(child, config)) pass = false;
+ if (!check_ptrace_values_fpmr(child, config)) + pass = false; + return pass; }
@@ -834,11 +885,18 @@ static void set_initial_values(struct test_config *config) { int vq = __sve_vq_from_vl(vl_in(config)); int sme_vq = __sve_vq_from_vl(config->sme_vl_in); + bool sm_change;
svcr_in = config->svcr_in; svcr_expected = config->svcr_expected; svcr_out = 0;
+ if (sme_supported() && + (svcr_in & SVCR_SM) != (svcr_expected & SVCR_SM)) + sm_change = true; + else + sm_change = false; + fill_random(&v_in, sizeof(v_in)); memcpy(v_expected, v_in, sizeof(v_in)); memset(v_out, 0, sizeof(v_out)); @@ -885,6 +943,21 @@ static void set_initial_values(struct test_config *config) memset(zt_expected, 0, ZT_SIG_REG_BYTES); memset(zt_out, 0, sizeof(zt_out)); } + + if (fpmr_supported()) { + fill_random(&fpmr_in, sizeof(fpmr_in)); + fpmr_in &= FPMR_SAFE_BITS; + + /* Entering or exiting streaming mode clears FPMR */ + if (sm_change) + fpmr_expected = 0; + else + fpmr_expected = fpmr_in; + } else { + fpmr_in = 0; + fpmr_expected = 0; + fpmr_out = 0; + } }
static bool check_memory_values(struct test_config *config) @@ -935,6 +1008,12 @@ static bool check_memory_values(struct test_config *config) if (!compare_buffer("saved ZT", zt_out, zt_expected, ZT_SIG_REG_BYTES)) pass = false;
+ if (fpmr_out != fpmr_expected) { + ksft_print_msg("Mismatch in saved FPMR: %lx != %lx\n", + fpmr_out, fpmr_expected); + pass = false; + } + return pass; }
@@ -1012,6 +1091,36 @@ static void fpsimd_write(pid_t child, struct test_config *test_config) strerror(errno), errno); }
+static bool fpmr_write_supported(struct test_config *config) +{ + if (!fpmr_supported()) + return false; + + if (!sve_sme_same(config)) + return false; + + return true; +} + +static void fpmr_write_expected(struct test_config *config) +{ + fill_random(&fpmr_expected, sizeof(fpmr_expected)); + fpmr_expected &= FPMR_SAFE_BITS; +} + +static void fpmr_write(pid_t child, struct test_config *config) +{ + struct iovec iov; + int ret; + + iov.iov_len = sizeof(fpmr_expected); + iov.iov_base = &fpmr_expected; + ret = ptrace(PTRACE_SETREGSET, child, NT_ARM_FPMR, &iov); + if (ret != 0) + ksft_print_msg("Failed to write FPMR: %s (%d)\n", + strerror(errno), errno); +} + static void sve_write_expected(struct test_config *config) { int vl = vl_expected(config); @@ -1268,6 +1377,12 @@ static struct test_definition base_test_defs[] = { .set_expected_values = fpsimd_write_expected, .modify_values = fpsimd_write, }, + { + .name = "FPMR write", + .supported = fpmr_write_supported, + .set_expected_values = fpmr_write_expected, + .modify_values = fpmr_write, + }, };
static struct test_definition sve_test_defs[] = { @@ -1477,6 +1592,9 @@ int main(void) if (fa64_supported()) ksft_print_msg("FA64 supported\n");
+ if (fpmr_supported()) + ksft_print_msg("FPMR supported\n"); + ksft_set_plan(tests);
/* Get signal handers ready before we start any children */ diff --git a/tools/testing/selftests/arm64/fp/fp-ptrace.h b/tools/testing/selftests/arm64/fp/fp-ptrace.h index a3849817cf4ee23879da835cb7f66821b5e09bd0..1234394841303affd9aaba5cfcba0fcef2b5d30e 100644 --- a/tools/testing/selftests/arm64/fp/fp-ptrace.h +++ b/tools/testing/selftests/arm64/fp/fp-ptrace.h @@ -10,10 +10,12 @@ #define HAVE_SME_SHIFT 1 #define HAVE_SME2_SHIFT 2 #define HAVE_FA64_SHIFT 3 +#define HAVE_FPMR_SHIFT 4
#define HAVE_SVE (1 << HAVE_SVE_SHIFT) #define HAVE_SME (1 << HAVE_SME_SHIFT) #define HAVE_SME2 (1 << HAVE_SME2_SHIFT) #define HAVE_FA64 (1 << HAVE_FA64_SHIFT) +#define HAVE_FPMR (1 << HAVE_FPMR_SHIFT)
#endif
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