The Linaro Toolchain Working Group (TCWG) is pleased to announce the 2015.09 snapshot of the Linaro GCC 5 source package.

This monthly snapshot[1] is based on FSF GCC 5.2+svn227732 and includes performance improvements and bug fixes backported from mainline GCC. This snapshot contents will be part of the 2015.11 stable [1] quarterly release.

This snapshot tarball is available on: http://snapshots.linaro.org/components/toolchain/gcc-linaro/

Interesting changes in this GCC source package snapshot include:

* Updates to GCC 5.2+svn227732 * Backport of [Bugfix] [AArch32] PR target/26702 * Backport of [Bugfix] [AArch32] PR target/26702 * Backport of [Bugfix] [AArch32] PR rtl-optimization/34503 * Backport of [Bugfix] [AArch32] PR target/64208 iwmmxt pattern * Backport of [Bugfix] [AArch32] PR target/65924 * Backport of [Bugfix] [AArch64] PR 65770 vstN_lane on bigendian * Backport of [Bugfix] [AArch64] PR 65375 Fix RTX cost for vector SET * Backport of [Bugfix] [AArch64] PR target/65491: Classify V1TF vectors as AAPCS64 short vectors rather than composite types * Backport of [Bugfix] [AArch64] PR target/66049 * Backport of [Bugfix] [AArch64] PR 63949 * Backport of [Bugfix] PR rtl-optimization/64616 Move insns without introducing new temporaries in loop2_invariant * Backport of [Bugfix] PR rtl-optimization/66076 * Backport of [Bugfix] PR tree-optimization/65447 * Backport of [AArch32] Add cpu_defines.h for ARM * Backport of [AArch32] Additional bics patterns * Backport of [AArch32] Add support for CFI directives in fp emulation routines for ARM * Backport of [AArch32] Add support for crtfastmath * Backport of [AArch32] Apply arm.h change for previous commit * Backport of [AArch32] (*arm_subsi3_insn): Fixed redundant alternatives * Backport of [AArch32] Fix up bootstrap and fix typo in related changelog entry * Backport of [AArch32] Handle UNSPEC_VOLATILE in rtx costs and don't recurse inside the unspec * Backport of [AArch32] insns attributes and alternative cleanups * Backport of [AArch32] Make tune params tables more self-documenting * Backport of [AArch32] Remove vec_shr and vec_shr optabs * Backport of [AArch32] Use uppercase for code iterator names * Backport of [AArch64] Add alternative 'extr' pattern, calculate rtx cost properly * Backport of [AArch64] Add branch-cost to cpu tuning information * Backport of [AArch64] Add __extension__ and __always_inline__ to crypto intrinsics * Backport of [AArch64] Add vcond(u?)didi pattern * Backport of [AArch64] Fix aarch64_rtx_costs of PLUS/MINUS * Backport of [AArch64] Fix Cortex-A53 shift costs * Backport of [AArch64] Fix geniterators.sh to use standard BRE syntax in sed * Backport of [AArch64] Fix up new line in previous commit * Backport of [AArch64] Handle FLOAT and UNSIGNED_FLOAT in rtx costs * Backport of [AArch64] Idiomatic 64x1 comparisons in arm_neon.h * Backport of [AArch64] Implement -m{cpu,tune,arch}=native using only /proc/cpuinfo * Backport of [AArch64] In aarch64_class_max_nregs use UNITS_PER_VREG and UNITS_PER_WORD * Backport of [AArch64] Make aarch64_min_divisions_for_recip_mul configurable * Backport of [AArch64] Properly cost FABD pattern * Backport of [AArch64] Properly cost MNEG/[SU]MNEGL patterns * Backport of [AArch64] Properly handle mvn-register and add EON+shift pattern and cost appropriately * Backport of [AArch64] Properly handle SHIFT ops and EXTEND in aarch64_rtx_mult_cost * Backport of [AArch64] Remember to cost operand 0 in FP compare-with-0.0 case * Backport of [AArch64] Use extend_arith rtx cost appropriately * Backport of [AArch64] Use mov for add with large immediate * Backport of [AArch64] Fix a couple of bugs regarding loop invariant motion discovered by spec2k6 on aarch64 * Backport of [Musl libc] Add musl support to GCC * Backport of [Musl libc] libitm fixes for musl support * Backport of [Musl libc] musl libc config * Backport of [Musl libc] mips musl support * Backport of [Musl libc] unwind fix for musl * Backport of [Musl libc] libstdc++, libgfortran gthr workaround for musl * Backport of [Musl libc] fixincludes update for musl support * Backport of [Musl libc] [AArch32] [4/13] arm musl support * Backport of [Musl libc] [AArch64] [3/13] aarch64 musl support * Backport of [Testsuite] [AArch32] advsimd-intrinsics.exp: dg-do-what=compile if HW does not have Neon * Backport of [Testsuite] [AArch32] Fix test for pr64616 * Backport of [Testsuite] [AArch32] Require Thumb2 effective target * Backport of [Testsuite] [AArch32] Fix r222371 (PR target/26702) * Backport of [Testsuite] Cleanup advsimd-intrinsics.exp, removing unnecessary loop * Backport of [Testsuite] don't clobber dg-do-what-default in advsimd-intrinsics.exp * Backport of [Testsuite] don't try to execute simd.exp tests on targets without NEON * Backport of [Testsuite] move check-gcc parallelize value into C front end * Backport of [Testsuite] new vqmovn test * Backport of [Testsuite] new vqmovun test * Backport of [Testsuite] new vqrdmulh_lane test * Backport of [Testsuite] new vqrdmulh_n test * Backport of [Testsuite] new vqrdmulh test * Backport of [Testsuite] new vqrshl test * Backport of [Testsuite] new vqrshn_n test * Backport of [Testsuite] new vqrshun_n test * Backport of [Testsuite] new vqshl_n test * Backport of [Testsuite] new vqshl test * Backport of [Testsuite] new vqshlu_n test * Backport of [Testsuite] new vqshrn_n test * Backport of [Testsuite] new vqshrun_n test * Backport of [Testsuite] Reinstate torture-init and torture-finalize in advsimd-intrinsics.exp * Backport of [Misc] Try REG_EQUAL for nonzero_bits * Backport of [Misc] Don't reset ssa_name infor in struct iv * Backport of [Misc] make clean' fix * Backport of [Misc] Make vector_compare_rtx cope with VOID mode constants * Backport of [Misc] set_nonzero_bits_and_sign_copies/combine.c * Backport of [Misc] Expand pow (x, CONST) using square roots when possible * Backport of [Doc] [AArch32] (ARM Options, mtune): add missing entries * Backport of [Doc] Add missing jit and lto info..... * Backport of [Doc] Declaring Attributes of Functions/split by target * Backport of [Doc] reorganize (Type Attributes) and (Variable Attributes) * Backport of [Doc] Update __atomic builtins documentation * Backport of [Doc] Update definition location of attribute_spec in documentation

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[1]. Stable source package releases are defined as releases where the full Linaro Toolchain validation plan is executed.

[2]. Source package snapshots are defined when the compiler is only put through unit-testing and full validation is not performed.