== Progress == * PR88834: * Have a patch for ivopt and backend that generates the required addressing mode and code. Still need cleanup and some improvements.

* PR88836 Made the required changes to the backend. CSE is still not happening. Looked at CSE in detail and made few changes but still need more work. The issues are: - Parallel rtx with one setting a register and other using it will be immediately invalidated as the invalidation happens after processing both. - If CSE is such that one instruction is with one constant operand and other with constant in a register, it will not be detected - VEC_DUPLICATE is not handled. - Not sure any other pass like GCSE is a better option

== Plan == * Complete above PRs * Look at GDB BZ #21221 - gdb hangs while stepping an empty loop