[Code size investigation] Results (clang 2% larger than gcc) replicated on cortex-m0 and cortex-m4 on Zephyr. - Clang optimisation to use BLX rather than BL when same function called multiple times is a pessimisation on Zephyr, especially on M0. - GCC register allocation seems to result in fewer spills TODO: Get an estimate of how much code-size difference is down to different inlining decisions. On CMSIS DSP cortex-m4f clang appears to be producing smaller than GCC, not measured averages yet.

[LLD] - Quite a few upstream reviews, PRs and investigations surrounding them. - Likely that LLD will be converting to the new variable naming convention. - Received a request to add cortex-a8 erratum fix for Google Android team.

[Linaro Connect] Registered and contacted travel. Drafted a submission for presentation, will submit next week.

Planned Absences: On holiday Wednesday, Thursday, Friday next week