Continued work on 64-bit shifts in core registers. This has now been posted to gcc-patches, and is awaiting review.

64-bit shifts in NEON are also working correctly, but the register allocator chooses not to use them most of the time. I've begun trying to work out why, but it's quite involved in ira-costs.c and will take some unpicking, I think.

Attempted to create a Linaro GCC 4.7 branch, but my test build failed, so that'll have to wait until it's stabilized a little.