Progress:

[VIRT-214 # SVE System Registers ]

Posted v2 patch set for eliminating redundancy between feature bits and id registers.

[VIRT-249 # SVE System Mode ]

Posted v2 patch set, without the system registers included.

[Upstream]

First 3.1 tcg-next pull request.

Spent a day working on Emilo's suggestion to out-line the entire softmmu load/store operation. I've placed a shed load of small code segments within the tcg "prologue", which is within a direct call of the entire code_gen_buffer. Emilio got some performance numbers from that which look promising. Need to clean up the patch to work with 32-bit and win64.

[GCC]

V1 of my SUSE+ARM inspired -matomic-ool patch set posted. Includes some significant improvements to atomic operations in the aarch64 backend. Got some good feedback and am working my way through those.

r~