Identified regression caused by *gcc:392aa7d7adfbd84253121d2ef779bf3c627e8d0b*: commit 392aa7d7adfbd84253121d2ef779bf3c627e8d0b Author: Jeff Law law@torsion.usersys.redhat.com

Fix some testsuite failures for H8/SX multilibs where short branches where used when long branches were necessary.

Results regressed to (for first_bad == 392aa7d7adfbd84253121d2ef779bf3c627e8d0b) # reset_artifacts: -10 # build_abe binutils: -9 # build_abe stage1 -- --set gcc_override_configure=--disable-libsanitizer: -8 # build_abe linux: -7 # build_abe glibc: -6 # build_abe stage2 -- --set gcc_override_configure=--disable-libsanitizer: -5 # true: 0 # benchmark -- -O3_LTO artifacts/build-392aa7d7adfbd84253121d2ef779bf3c627e8d0b/results_id: 1 # 456.hmmer,hmmer_base.default regressed by 104

from (for last_good == c7137fcc7cbc1f1f14f9fed75adcc6bd8f1d418c) # reset_artifacts: -10 # build_abe binutils: -9 # build_abe stage1 -- --set gcc_override_configure=--disable-libsanitizer: -8 # build_abe linux: -7 # build_abe glibc: -6 # build_abe stage2 -- --set gcc_override_configure=--disable-libsanitizer: -5 # true: 0 # benchmark -- -O3_LTO artifacts/build-c7137fcc7cbc1f1f14f9fed75adcc6bd8f1d418c/results_id: 1

This commit has regressed these CI configurations: - tcwg_bmk_gnu_tx1/gnu-release-aarch64-spec2k6-O3_LTO

Artifacts of last_good build: https://ci.linaro.org/job/tcwg_bmk_ci_gnu-bisect-tcwg_bmk_tx1-gnu-release-aa... Artifacts of first_bad build: https://ci.linaro.org/job/tcwg_bmk_ci_gnu-bisect-tcwg_bmk_tx1-gnu-release-aa... Even more details: https://ci.linaro.org/job/tcwg_bmk_ci_gnu-bisect-tcwg_bmk_tx1-gnu-release-aa...

Reproduce builds: <cut> mkdir investigate-gcc-392aa7d7adfbd84253121d2ef779bf3c627e8d0b cd investigate-gcc-392aa7d7adfbd84253121d2ef779bf3c627e8d0b

# Fetch scripts git clone https://git.linaro.org/toolchain/jenkins-scripts

# Fetch manifests and test.sh script mkdir -p artifacts/manifests curl -o artifacts/manifests/build-baseline.sh https://ci.linaro.org/job/tcwg_bmk_ci_gnu-bisect-tcwg_bmk_tx1-gnu-release-aa... --fail curl -o artifacts/manifests/build-parameters.sh https://ci.linaro.org/job/tcwg_bmk_ci_gnu-bisect-tcwg_bmk_tx1-gnu-release-aa... --fail curl -o artifacts/test.sh https://ci.linaro.org/job/tcwg_bmk_ci_gnu-bisect-tcwg_bmk_tx1-gnu-release-aa... --fail chmod +x artifacts/test.sh

# Reproduce the baseline build (build all pre-requisites) ./jenkins-scripts/tcwg_bmk-build.sh @@ artifacts/manifests/build-baseline.sh

# Save baseline build state (which is then restored in artifacts/test.sh) mkdir -p ./bisect rsync -a --del --delete-excluded --exclude /bisect/ --exclude /artifacts/ --exclude /gcc/ ./ ./bisect/baseline/

cd gcc

# Reproduce first_bad build git checkout --detach 392aa7d7adfbd84253121d2ef779bf3c627e8d0b ../artifacts/test.sh

# Reproduce last_good build git checkout --detach c7137fcc7cbc1f1f14f9fed75adcc6bd8f1d418c ../artifacts/test.sh

cd .. </cut>

Full commit (up to 1000 lines): <cut> commit 392aa7d7adfbd84253121d2ef779bf3c627e8d0b Author: Jeff Law law@torsion.usersys.redhat.com Date: Wed Apr 29 10:19:22 2020 -0400

Fix some testsuite failures for H8/SX multilibs where short branches where used when long branches were necessary.

* config/h8300/h8300.md (H8/SX div patterns): All H8/SX specific division instructions are 4 bytes long. --- gcc/ChangeLog | 5 +++++ gcc/config/h8300/h8300.md | 4 ++-- 2 files changed, 7 insertions(+), 2 deletions(-)

diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 80064da83ce..a2d4a1b82f4 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2020-04-29 Jeff Law law@redhat.com + + * config/h8300/h8300.md (H8/SX div patterns): All H8/SX specific + division instructions are 4 bytes long. + 2020-04-29 Jakub Jelinek jakub@redhat.com

PR target/94826 diff --git a/gcc/config/h8300/h8300.md b/gcc/config/h8300/h8300.md index 3e5cdbeeebe..a86b8ea2074 100644 --- a/gcc/config/h8300/h8300.md +++ b/gcc/config/h8300/h8300.md @@ -1218,7 +1218,7 @@ (match_operand:HSI 2 "reg_or_nibble_operand" "r IP4>X")))] "TARGET_H8300SX" { return <MODE>mode == HImode ? "divu.w\t%T2,%T0" : "divu.l\t%S2,%S0"; } - [(set_attr "length" "2")]) + [(set_attr "length" "4")])

(define_insn "div<mode>3" [(set (match_operand:HSI 0 "register_operand" "=r") @@ -1226,7 +1226,7 @@ (match_operand:HSI 2 "reg_or_nibble_operand" "r IP4>X")))] "TARGET_H8300SX" { return <MODE>mode == HImode ? "divs.w\t%T2,%T0" : "divs.l\t%S2,%S0"; } - [(set_attr "length" "2")]) + [(set_attr "length" "4")])

(define_insn "udivmodqi4" [(set (match_operand:QI 0 "register_operand" "=r") </cut>