== Progress == * Upstream GCC (7/10) - Rebased and posted/prepared patches for gcc stage1 for the following - TCWG-780 - Improve register allocation for aarch64_*_sisd_or_int<mode>3 patterns - TCWG-779 - Improve codegen for vld2q_f32 and vst2q_f32 - TCWG-486 - Optimize Constant Uses in Loops - Zero/sign extension elimination with vrp - Vector rtx costs for AArch64

* Misc (1/10) - gcc-patches, gcc-bugs list - Meetings

== Plan == Continue with gcc stage1 activities