Michael Hope wrote:

On 29 June 2012 15:13, Xiao Jiang jgq516@gmail.com wrote:

...

Hello,

I tried codesourcy arm-2012.03-57-arm-none-linux-gnueabi-i686-pc-linux-gnu.tar.bz2, and get below err infos.

Error: selected processor does not support ARM mode `sdiv R2,R0,R1' Error: selected processor does not support ARM mode `udiv R2,R0,R1'

Does it mean this toolchain version don't support both instructions? and which toolchain can support them?

Hi Michael,

Hi Xaio. I can't speak for the CodeSourcery toolchain, but these instructions first appeared for Thumb-2 mode in binutils 2.20 and ARM mode in binutils 2.21. You can check the version you have with 'arm-none-linux-gnueabi-as --version'. We ship binutils 2.22 with the Linaro Toolchain Binaries which is available at:

Thanks for your quick reply :). I got the version as follows, seems it's version can support it.

$ arm-2012.03/bin/arm-none-linux-gnueabi-as --version GNU assembler (Sourcery CodeBench Lite 2012.03-57) 2.21.53.20110905 Copyright 2011 Free Software Foundation, Inc. This program is free software; you may redistribute it under the terms of the GNU General Public License version 3 or later. This program has absolutely no warranty. This assembler was configured for a target of `arm-none-linux-gnueabi'.

I need to build for Cortex-A15, and a silly question, how can I test toolchain support for the instructions? I test it via below simple assemble code.

$ cat DIV.s LDR R0, =300 MOV R1, #5 SDIV R2, R0, R1 UDIV R2, R0, R1 $ arm-2012.03/bin/arm-none-linux-gnueabi-gcc -g -c -o DIV.o DIV.s DIV.s: Assembler messages: DIV.s:3: Error: selected processor does not support ARM mode `sdiv R2,R0,R1' DIV.s:4: Error: selected processor does not support ARM mode `udiv R2,R0,R1'

Thanks again! Xiao

https://launchpad.net/linaro-toolchain-binaries

Check which CPU you're building for. The Thumb-2 instructions are present on the Cortex-M series, Cortex-R series, Cortex-A7, and Cortex-A15. The ARM versions are present on the Cortex-A7 and Cortex-A15 only. You might be building for something earlier like the ARMv5T.

-- Michael

Michael Hope wrote:

This works for me:

    .syntax unified
    .text
    .cpu cortex-a15

Got it, I need specified cpu mode here :)

Many thanks!

Xiao

    .type   divit, %function

divit: sdiv r0, r0, r1 bx lr

-- Michael