- Tracked the problematic file which contains the loop that causing
bootstrap failure with SMS flags on ARM machine. It is not caused by
SMS but rather due to doloop optimization which is applied when SMS
flags are set. Now working on locating the exact loop and producing a
testcase to reproduce the error.
- Looking into Spec2006/libquantum benchmark - it has hot loop with
conditional store which suppress SMS as it is only applied on single
basic-block loops. If-conversion can not be done (replacing the store
with conditional move and then a store) because in order to do that we
need to prove that there is a store to the same location in each
iteration of the loop; and it is not the case in this loop.
Apparently, when running with crotex-a8 flag cond_exe statement is
generated for the store but that's happening only after register
allocation pass which is applied after SMS (IIUC,moving the generation
of cond_exe before RA is not trivial
http://gcc.gnu.org/ml/gcc/2000-05/msg00079.html)
So, I'm looking into teaching SMS to handle conditional statements
based on technique presented in [1]. This change is not trivial so I'm
going to estimate the potential of applying SMS on the loop at first
stage.
[1] M. Lam, "Software pipelining: an effective scheduling technique
for VLIW machines"
== GDB ==
* Tested GDB 7.2.91 prerelease on ARM; everything looking good.
* Created a set of patches to prepare for Linaro GDB 7.3 series;
verified release process on top of a current 7.3 snapshot.
* Committed three mainline patches to fix shared library remote
test problems (#804387).
* Reviewed Yao's latest Thumb-2 displaced stepping patch.
Mit freundlichen Gruessen / Best Regards
Ulrich Weigand
--
Dr. Ulrich Weigand | Phone: +49-7031/16-3727
STSM, GNU compiler and toolchain for Linux on System z and Cell/B.E.
IBM Deutschland Research & Development GmbH
Vorsitzender des Aufsichtsrats: Martin Jetter | Geschäftsführung: Dirk
Wittkopp
Sitz der Gesellschaft: Böblingen | Registergericht: Amtsgericht
Stuttgart, HRB 243294
== String routines ==
* Sent a patch to libc-ports with modified configure scripts to add
subdirectories
for architecture specific ARM code, and the memchr.S from cortex-strings.
== 64 bit atomics ==
* Working through comments on my patches and the set of discussions about the
kernel interface for the helper case - not really sure which way
that's going to go.
== QEmu ==
* Looking at how tracing works, considering adding tracing to sd
card code to help
track down some of the sd card issues.
Dave
== This week ==
* Fixed the unnecessary union initialisers that were causing ICEs
with -g. This turned out to be a lot more work than Richard's
one-liner suggested. :-)
* Backported Chung-Lin's arm_legitimize_reload_address patch to 4.5.
* Backported the smallest_mode_for_size patch to 4.5 and 4.6.
* Patch review.
* Found an off-by-one error in the vectoriser that caused it to think
that contiguous memory regions overlapped. Unfortunately, this meant
that a lot of my microbenchmarks were using the fallback ARM code
instead of the nice-looking NEON code that I could see in the asm.
* A bit more work on auto inc/dec. It tested regression-free for all
default languages. Ran some more benchmarks and posted the results.
== Next week ==
* Bugs and auto inc/dec.
Richard
Hi,
* analyzed/tested toolchain issues the Linaro Android folks are facing
* libquadmath disabled due to configure test fail of the target
libiberty (#809435)
* fix will be in 11.07 release
* ICE when building bionic's libm (#809768)
* not reproducible with a "plain" Linaro GCC
* non upstreamable workaround in place
(prevents the ICE but degrades the DWARF quality)
* binary toolchain at http://people.linaro.org/~kwerner/
* libunwind
* localunwrework branch now on git.linaro.org
Note: I'll take two days off at the end of next week (21-22).
Regards
Ken
Achieved:
* Set up networking on the Panda board, ssh to the board from my laptop
works fine.
* Downloaded the benchmarks (SPEC2000 and EEMBC) and built them for x86. I
now have a basic understanding of what the benchmarks do and how to run
them.
* For EEMBC I used the -m32 flag for building on my 64 bit installation.
* For the SPEC2000 I used the Linaro configuration file and enabled the
portability flags for a 64-bit host. Played around with different "runspec"
actions and options. Building and running individual test cases as well as
the full test suites. Finally I did a reportable run for all benchmarks. It
took several hours and in the end I got a result for my laptop.
Next step:
* Cross-compile EEMBC and SPEC2000. I will try linaro-gcc and the cross
compiler that comes with Natty.
Best Regards
Åsa
Hi,
- merged over-widened multiply patch to gcc-linaro-4.6 (now vectorized
rgbyiqv should be about as good as its scalar version)
- continued working on over-widened shifts and bit operations
Ira
Hi,
I used Linaro cross-toolchain version 4.5
(gcc-4.5-arm-linux-gnueabi) to compile linux-linaro-11.05 for beagle
board,
but got the following error messages:
----
AS arch/arm/boot/compressed/head.o
arch/arm/boot/compressed/head.S: Assembler messages:
arch/arm/boot/compressed/head.S:127: Error: selected processor does not
support requested special purpose register -- `mrs r2,cpsr'
arch/arm/boot/compressed/head.S:134: Error: selected processor does not
support requested special purpose register -- `mrs r2,cpsr'
arch/arm/boot/compressed/head.S:136: Error: selected processor does not
support requested special purpose register -- `msr cpsr_c,r2'
make[2]: *** [arch/arm/boot/compressed/head.o] Error 1
make[1]: *** [arch/arm/boot/compressed/vmlinux] Error 2
make: *** [uImage] Error 2
----
The .config file I used for kernel build is
"config-2.6.38-1003-linaro-omap" which is from
hwpack_linaro-omap3-x11-base_20110526-5_armel_supported.tar.gz
My host development platform is 64-bit Ubuntu 10.04.2 LTS (Linux
ubuntu 2.6.32-32-generic #62-Ubuntu SMP Wed Apr 20 21:52:38 UTC 2011
x86_64 GNU/Linux).
Is this a known bug, or did I miss anything else ?
Thanks.
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== GCC ==
=== Progress ===
* Panda board up again with apparently no change with software on it.
Not sure what caused the difference today ! Now chugging along with
SPEC2k.
* Back on to BRANCH_COST . SPEC2k now running fully whence panda
board was restored.
* Submitted cleaned up neon shift immediates patch for merging.
* On merge request review in Linaro this week.
* Backported arith_shiftsi patch to 4.6 branch upstream. (done)
* Identified particular patterns that have issues with scheduler
descriptions in A8 and A9 . Working on fixes.
=== Plans ===
* Submit one_cmpldi2 patch for neon upstream.
* Finish the scheduler patches.
* Investigate A8 vs A9 regressions.
* Look at EPILOGUE_USES and coremark . not sure why it regresses in
performance yet.
Meetings:
* 1-1s
* TCWG calls
Absences.
* 1st Aug - 5th August - Linaro sprint.
* 8th - 9th August - Internal training.
* 29th Aug - Sept. 2 - Vacation.