* TSAN support for Aarch64 (5/10)
Working on memory map layout for TSAN in Aarch64 (TCWG-581) .
* Emails, meetings. (3/10)
* 1-1 with maxim, linaro status call.
* internal AMD meetings, 1-1 with AMD manager.
* GCC mailing list.
Leave on 26-Jan-2014 (India Holiday) (2/10)
Planned Leave on 04-Feb-2014
== Plan ==
* TSAN support for Aarch64 work on memory layout.
== This week ==
* Backports (10/10)
- 216734 - Temporarily remove aarch64_gimple_fold_builtin code for
reduction operations
- 216736 - [Vectorizer] Make REDUC_xxx_EXPR tree codes produce a
scalar result
- 216737 - Add new optabs for reducing vectors to scalars
- 216738 - Use new reduc_plus_scal optabs, inc. for __builtins
- 216741 - Use new reduc_[us](min|max)_scal optabs, inc. for builtins
- 216742 - Restore gimple_folding of reduction intrinsics
- 216779 - Remove VEC_LSHIFT_EXPR and vec_shl_optab
- 217331 - Fix checking on MAX_PENDING_LIST_LENGTH
- 217430 - Fix typo in *<arith_shift_insn>_shiftsi
- 217431 - Let LR register allocable
- 217533 - Pair load store instructions using a generic scheduling
fusion pass
- 219717 - PR rtl-optimization/64011
- 219718 - Improve warning message
== Next week ==
- Prepare for release by creating "dummy" release
- Work on bug fixes
Hi,
We've noticed that in the 14.11 toolchain binary release that the .asc files
contain md5sums instead of PGP signatures. Would it be possible to either
switch these files to contain signatures or change the filename to indicate
that they contain md5sums?
I also noticed that an md5sum is missing:
http://releases.linaro.org/14.11/components/toolchain/binaries/armeb-linux-…
Finally, there appears to be some inconsistent usage of tuples in the download
directories. Would it be possible to use the same tuple for a particular
toolchain everywhere that tuple is used? For example, for the arm-none-eabi
toolchain, the directory is "arm-none-eabi", but the compiler tarball has only
"arm-eabi".
Thanks,
Chris
--
Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
== Progress ==
* Automation Framework (CARD-1378 1/10)
- Setting up new box
* Release 3.6 (CARD-1431 5/10)
- Looking for the patch that introduced a major NEON regression since December
* Background (4/10)
- Code review, meetings, discussions, etc.
- More Jira farming...
- Some EuroLLVM paper reviews
- LLVM/Android planning
== Plan ==
* Keep trying to find the bug in release 3.6
* Try to have some time to fix the NEON unwinder issue
* Preparing for Connect
== Issues ==
I cocked up the LLVM 3.6 ARM release last December when I
inadvertently ignored a bug report about clang not self-hosting on
NEON machines. To make matters worse, I was the one that decided to
move *all* our buildbots to non-NEON machines, expecting that the
test-suite on a Chromebook would catch all NEON problems.
There are limits to human intelligence, not human stupidity.
== Progress ==
* LLD (1/10, TCWG-561, TCWG-563, TCWG-570)
- Updated and added more cards, adding more detail and loose priorities
- Rebased, fixed up and resubmitted relocation test patch
* AArch64 ILP32 toolchain (4/10)
- Attempted various SPEC2k runs and fixed issues found
* Submitted patch for AArch64 -Bsymbolic ld issue (1/10)
* Connect slides (2/10)
* Other stuff (1/10)
- Email, meetings, etc.
* Tuesday looking after sick child
== Issues ==
* Juno access has been patchy
== Plan ==
* Get SPEC2k running ok on Juno and with ILP32
* Push remaining LLD patches
--
Will Newton
Toolchain Working Group, Linaro
