The Linaro Toolchain Working Group (TCWG) is pleased to announce the 2017.05
snapshot of Linaro GCC 5, 6 and 7 source packages.
o The GCC 7 series introduced an ABI change for ARM targets by fixing a bug
(present since GCC 5, see link below) that affects conformance to the procedure
call standard (AAPCS). The bug affects some C++ code where class objects are
passed by value to functions and could result in incorrect or inconsistent code
being generated. If the option -Wpsabi is enabled (on by default) the compiler
will emit a diagnostic note for code that might be affected by this ABI change.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77728
For an explanation of the changes please see the following website:
https://gcc.gnu.org/gcc-7/changes.html
o Linaro GCC 7 monthly snapshot[1] is based on FSF GCC 7.1+svn247824 and
includes performance improvements and bug fixes backported from mainline GCC.
The contents of this snapshot will be used for the first stable[2] quarterly
release in the GCC 7 series.
This snapshot tarball is available on:
http://snapshots.linaro.org/components/toolchain/gcc-linaro/7.1-2017.05/
Interesting changes in this GCC source package snapshot include:
* Updates to GCC 7.1+svn247824
* Backport of [AArch32] Allow combination of aprofile and rmprofile multilibs
* Backport of [AArch32] Define TM_MULTILIB_CONFIG for ARM multilib
* Backport of [AArch32] Rename FPSCR builtins to correct names
* Backport of [AArch32] Set mode for success result of atomic compare and swap
* Backport of [AArch64] Enable AUTOPREFETCHER_WEAK with -mcpu=generic
* Backport of [AArch64] Improve address cost for -mcpu=generic
* Backport of [AArch64] Update alignment for -mcpu=generic
* Backport of [Testsuite] Require c99_runtime for pr78622.c
o Linaro GCC 6 monthly snapshot[1] is based on FSF GCC 6.3+svn247789 and
includes performance improvements and bug fixes backported from mainline GCC.
This snapshot contents will be part of the 2017.08 stable[2] quarterly release.
This snapshot tarball is available on:
http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.3-2017.05/
Interesting changes in this GCC source package snapshot include:
* Updates to GCC 6.3+svn247789
* Backport of [Bugfix] [AArch32] PR target/71607: Fix ICE when loading constant
* Backport of [AArch32] Add support for -mpure-code option
* Backport of [AArch32] Enable Purecode for ARMv8-M Baseline
* Backport of [AArch32] Fix arm-netbsdelf bootstrap
* Backport of [AArch32] Fix pure-code test
* Backport of [AArch32] Fix testism with pure-code tests for non
Cortex-M targets
* Backport of [AArch32] Fix type for .init_array.* and .fini_array.* sections
* Backport of [AArch64] Fix type for 1-element load
* Backport of [AArch64] Model Cortex-A53 load forwarding
o Linaro GCC 5 monthly snapshot[1] is based on FSF GCC 5.4+svn247822 and
includes performance improvements and bug fixes backported from mainline GCC.
This snapshot contents will be part of the next maintenance release.
This snapshot tarball is available on:
http://snapshots.linaro.org/components/toolchain/gcc-linaro/5.4-2017.05/
Interesting changes in this GCC source package snapshot include:
* Updates to GCC 5.4+svn247822
o Subscribe to the important Linaro mailing lists and join our IRC channels to
stay on top of Linaro development.
** Linaro Toolchain Development "mailing list":
http://lists.linaro.org/mailman/listinfo/linaro-toolchain
** Linaro Toolchain IRC channel on irc.freenode.net at @#linaro-tcwg@
Achievements:
Spent all week on investigating a potential problem with the Gold
--fix-cortex-a53-843419 erratum fix (The ADRP on 0xff8/0xffc boundary)
- Managed to reproduce with a smaller example, although still using LTO
- Diagnosed the cause of object with errata stubs being relocated
after the stub table has been relocated
-- Most likely to hit LTO as the object from the LTO plugin will
always be last in the task queue, but the stub table is relocated when
the object that "owns" it is relocated, this is often not the LTO
object.
-- In theory it should be reproducible without LTO and a linker script
-- Workaround for LTO is to create an Output Section just for LTO (The
stub table is always owned by the LTO object)
Plans for next week:
- See if I can reproduce Gold errata problem without LTO
- Report Gold errata problem upstream
- Get back to LLD range thunk work
- Investigate SBREL32 relocation support in LLD, upstream PR32924
- Look at fixing missing Thumb2 modified immediate fixup PR28647
* Day off (2/10)
== Progress ==
o Linaro GCC/Validation (5/10)
* GCC 5, 6 and 7 2017.05 source snapshots:
- Completed backports
- Troubleshot GCC 5 and 5 branch merges regressions
* Re-working release automation job
o Misc (3/10)
* Various meetings and discussions.
== Plan ==
o Complete monthly snapshots and releases
o Continue release automation
Short week (1 day off)
== Progress ==
* Infrastructure:
- patch reviews
- worked around regression-detection failures caused by some tests
in tcwg-regression
- added job to check our gcc-7 toolchain when a component is updated
* Benchmarking:
- troubleshooting systems configs
- at last, first run on aarch64 triggered via jenkins
* Snaphots
- backports & reviews
* GCC:
- reported a few regressions upstream
* misc (conf-calls, meetings, emails, ....)
== Next ==
* benchmarking
== Progress ==
* Remove environment variables [TCWG-1114] [1/10]
- Committed
* [ARM GlobalISel] TableGen ISel for ADD/SUB [TCWG-1119] [5/10]
- Committed a change to the legalizer so that we widen narrow
operations (since we only have patterns for the 32-bit versions)
- Committed support for G_ANYEXT, which is introduced by the
legalizer while widening things and which we need to handle in the
rest of the pipeline
- Have a patch in upstream review fixing a TableGen bug
* [GlobalISel] AArch64 test-suite and self-host [TCWG-1074] [2/10]
- Ran the test-suite and self-host on AArch64 for GlobalISel -O0
- Committed a tiny fix for a test-suite application that was failing
because GlobalISel doesn't lower fabs to hardware operations, so we
had to link with -lm
* Misc [2/10]
- Buildbots (reverted stuff), meetings, mailing lists
- Helped organize another LLVM social in Stockholm; we got really
good feedback so far
== Plan ==
* [ARM GlobalISel] Add support for struct / array args [TCWG-1033]
* Other GlobalISel stuff
* Probably wrap up TCWG-1074, we're really close to making the switch
# Progress #
* GDB 8.0 release. TCWG-1050, [1/10]
Nothing new. Make sure Linaro GCC 7 release can pick up GDB 8.
* SVE GDB. TCWG-1040, [6/10]
** Finish sve gdb target description doc, and send it to Alan.
The work needed in GDB side becomes more and more clear, however,
it is still unclear in GDBserver side.
** Post my patches about unit test to value/register conversion
gdbarch hooks.
** Post my RFCs to make GDB target descriptions more flexible.
* Misc, [3/10]
** Learn C++ template.
** Some patches review upstream.
# Plan #
* Upstream my GDB disassembler patch, which unify the disassembler
selection in both gdb and objdump.
* Back to the work on handling function pointer assignment in thumb
mode. TCWG-333.
--
Yao Qi
* Day off (2/10)
== Progress ==
o Linaro GCC/Validation (5/10)
* Release Automation:
- 6.3 2017.05 RC1: Done
- Preparing Linaro GCC 7 snapshot and RC
* Backport for 2017.05 source snapshots
* Reviews...
o Misc (3/10)
* Various meetings and discussions.
== Plan ==
o Make 2017.05 snapshots (6 and 7)
o Continue release automation
Progress:
- Re-implemented range thunks based on recent upstream changes and
sent for review. No comments as yet.
This is likely to be an ongoing conversation with upstream that won't
take all my time up so I've been looking at some additional stuff
outside of range thunks.
- Looked at PR28647 in llvm-mc, preventing openssl from being compiled
with clang. Investigated to the point where I know what we should do
next to fix. Next steps will be implementation.
- Looked into a problem reported internally in ARM in gold's erratum
--fix-cortex-a53-843419 on a large program using LTO. The patch is not
being applied correctly leading to segfaults at run-time. This is
likely to take some time to pin down as simple attempts to reproduce
have failed. There is an upstream PR reporting a similar set of
symptoms that looks like it could be the same thing but there is no
useful information or investigation in it:
https://sourceware.org/bugzilla/show_bug.cgi?id=21062
- Looked into lld PR32924, someone asking for RWPI support in lld,
someone at least is keen to get embedded systems support into lld.
Plans:
- Continue looking into above PRs
== Progress ==
* Monday off [2/10]
* [ARM GlobalISel] Use TableGen for inst selector [TCWG-1037] [1/10]
- Committed upstream
* Remove environment variables [TCWG-1114] [1/10]
- Almost ready to send another patch for review
* Lund Linux Conference [6/10]
== Plan ==
* [ARM GlobalISel] Add support for struct / array args [TCWG-1033]
* Other GlobalISel stuff
