Progress:
* VIRT-65 [QEMU upstream maintainership]
- code review:
+ rth's pointer-auth emulation patchset
+ more devices for the microbit board model
+ support for u-boot "noload" image type
+ gdbstub multiprocess extension support for use when the board
model has multiple asymmetric clusters (like Xilinx Zynq boards)
- finished debugging patch for aarch64 host linux-user to distinguish
SEGV on read from SEGV on write by looking at the ESR context struct
from the kernel rather than by looking at the faulting insn; sent it.
- sent patch to fix linux-user pread64/pwrite64 with NULL buffer and 0 length
* VIRT-268 [QEMU support for dual-core Cortex-M Musca board]
- Sent out patchset fixing heterogenous CPU support (required a lot
of thought about what we might need to fix and not all that much
code, in the end)
- Started work on refactoring our IoTKit model to also support
the extra pieces required by the SSE-200 subsystem used in the Musca
thanks
-- PMM
Upstream Work ([VIRT-109])
==========================
- posted {PATCH v1 0/6} current fpu/next queue Message-Id:
<20190108162154.22259-1-alex.bennee(a)linaro.org>
- posted {PATCH v1 0/3} gitdm updates Message-Id:
<20190107111129.2087-2-alex.bennee(a)linaro.org>
- posted {PATCH v1 00/19} testing/next queue for travis and docker
Message-Id: <20190110174516.21586-1-alex.bennee(a)linaro.org>
- also managed to trigger two of the occasional Travis failures
locally
- one is a segfault in mcount (gprof/RCU related)
- the other seems to be a O_NONBLOCK/make interaction (using eBPF
to track it)
- did a little more on re-work of [system test and misc arch] tests
- will be useful for test cases for plugins
- respin {PATCH v3 0/5} support reading some CPUID/CNT registers from
user-space Message-Id:
<20180625160009.17437-1-alex.bennee(a)linaro.org> :todo
- in branch [v3 branch]
[VIRT-109] https://projects.linaro.org/browse/VIRT-109
[system test and misc arch]
https://github.com/stsquad/qemu/tree/testing/enable-system-tcg-tests-v2
[v3 branch]
https://github.com/stsquad/qemu/tree/misc/cnt-and-misc-reg-fixes-v3
Completed Reviews [2/2]
=======================
{PATCH v3 0/2} tests: Reorganize MIPS TCG directories and files
Message-Id: <1546621859-28227-1-git-send-email-aleksandar.markovic(a)rt-rk.com>
- CLOSING NOTE [2019-01-07 Mon 11:23]
A few notes about keeping makefile
{PATCH 00/13} Misc fixes / improvements for the docker and travis configs
Message-Id: <20190109163114.17010-1-berrange(a)redhat.com>
- CLOSING NOTE [2019-01-10 Thu 12:34]
Queued a chunk of these into testing/next
Absences
========
- Connect BKK19 (1-5th April 2019)
- holiday after Connect
Current Review Queue
====================
* {Qemu-devel} {PATCH 00/11} target/arm: Implement ARMv8.5-BTI
Message-Id: <20190110121736.23448-1-richard.henderson(a)linaro.org>
* {PATCH v9 00/21} Fixing record/replay and adding reverse debugging
Message-Id: <154703587757.13472.3898702635363120794.stgit@pasha-VirtualBox>
* {Qemu-devel} {PATCH 0/4} tcg: support heterogenous CPU clusters
Message-Id: <20190108163008.7006-1-peter.maydell(a)linaro.org>
* {Qemu-devel} {PATCH v3 00/31} target/arm: Implement ARMv8.3-PAuth
Message-Id: <20190108223129.5570-1-richard.henderson(a)linaro.org>
* {Qemu-arm} {PATCH 0/3} target/arm: Vector expansion improvments.
Message-Id: <20190106225035.5671-1-richard.henderson(a)linaro.org>
* {Qemu-devel} {PATCH} configure: Force the C standard to gnu11
Message-Id: <1546857926-5958-1-git-send-email-thuth(a)redhat.com>
--
Alex Bennée
== Progress ==
* FDPIC
- (GNU-499) GCC: wait for feedback on v4 patches, but GCC just entered
stage4, so it's probably too late for gcc-9 :-(
- (GNU-411) GDB: hacked to build gdbserver, but the resulting binary
does not start.
* GCC upstream validation:
- reported a few regressions
- dealing with some random results, still
- qemu-3.1.0-rc3, memory consumption: more experiments under LSF show
"random" reports for memory consumption. It seems qemu-3.1 consumes
more memory in some cases, though.
* GCC:
- (GNU-99) rebased ubsan / bare-metal patches. No progress.
* misc (conf-calls, meetings, emails, ....)
- reviewing/submitted infra script patches
- dealing with nasty ST-internal infrastructure problems
- (GNU-592): improved benchmarking scripts
- (TCWG-1501) looking at new build servers configs
== Next ==
FDPIC:
- GCC: handle feedback on v4 patches
- GDB: update patches
- uclibc-ng: look at how to test fdpic mode with openadk
Validation:
- isolate if/why qemu-3.1.0-rc3 consumes more memory than 2.11 for
aarch64-linux target
== Progress ==
* [ARM GlobalISel] Select complicated G_CONSTANT [LLVM-491]
- Negative constants in particular cause a lot of fallbacks in the
test-suite/selfhost
- Need to help TableGen produce code for MOVi32imm
- Ready to commit next week
- Looked a bit into enabling MVNi as well, but that seems to require
more effort
* Use new version of GCC on buildbots [LLVM-515]
- Talked to doko and got a different PPA
- Didn't get a chance to test it yet, will do next week
* Sanity checks for docker builbbot containers
- Sent a quick patch to check slavenames and compatibility between
slave and image when starting a bot container
* Investigated some buildbot failures
- Marked 2 sanitizer tests as unsupported on ARM
- Need to investigate further so we can re-enable them
- I've been emailing the author, hopefully he can help debug
== Plan ==
* More of the same
[VIRT-294 # ARMv8.3-PAuth, Pointer Authentication ]
Posted v3 based on feedback.
[VIRT-339 # ARMv8.5-BTI, Branch Target Identification ]
Posted "v1" to qemu-devel, rebased on v3 pauth
[VIRT-344 # ARMv8.5-MemTag, Memory Tagging Extension ]
Progressed to the "write a standalone test case" stage for linux-user. I'll
need to discuss address space stuff w/ PMM for system mode. Discovered while
writing a test case for this that my document and gas do not agree on the
instruction encodings. Putting this on hold until query about document
revision numbers is answered.
Posted pieces of this implementing TBI for aarch64-linux-user.
[VIRT-327 # Richard's upstream QEMU work ]
Fixed alpha-linux-user fpcr initialization.
Fixed alpha-softmmu double-increment of SIGILL address.
Sent v2 patchset for target/arm use of gvec minmax routines.
r~
The Linaro Binary Toolchain
============================
The Linaro GCC 6.5-2018.12 Release is now available.
The GCC 6 Release series has significant changes from the GCC 5
release series. For an explanation of the changes please see the
following website:
https://gcc.gnu.org/gcc-6/changes.html
For help in porting to GCC 6 please see the following explanation:
https://gcc.gnu.org/gcc-6/porting_to.html
Download release packages from:
(sources) http://releases.linaro.org/components/toolchain/gcc-linaro/6.5-2018.12/
(binaries) http://releases.linaro.org/components/toolchain/binaries/6.5-2018.12/
Previous snapshots and release-candidates are at:
http://snapshots.linaro.org/components/toolchain/binaries/
Previous releases are at:
http://releases.linaro.org/components/toolchain/binaries/
A description of the arm and AArch64 target triples can be found at:
https://collaborate.linaro.org/display/TCWGPUB/ARM+and+AArch64+Target+Tripl…
Host Requirements
==================
Linaro officially supports the current and previous Ubuntu LTS
releases (as of the time of this release). This does not mean that
the toolchain will not work on other/older Linux distributions. See
the following for the life-time of Ubuntu LTS releases.
https://wiki.ubuntu.com/Releases
The host system upon which the cross-compiler will run requires a
minimum of glibc 2.14, because of API changes to glibc's memcpy API.
https://bugs.linaro.org/show_bug.cgi?id=1869
Package Versions
=================
Linaro GCC 6.5-2018.12
http://releases.linaro.org/components/toolchain/gcc-linaro/6.5-2018.12/
Linaro glibc 2.23 (linaro/2.23/master)
https://lists.gnu.org/archive/html/info-gnu/2016-02/msg00009.html
Linaro newlib 2.4-2016.03 (linaro_2.4-branch)
https://sourceware.org/ml/newlib/2016/msg00370.html
Linaro binutils 2.27 (users/linaro/binutils-2_27-branch)
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;a=blob_plain;f=bin…
Linaro GDB 8.2 (gdb-8.2-branch)
https://lists.gnu.org/archive/html/info-gnu/2018-09/msg00001.html
Linaro toolchain package git branches are hosted at:
http://git.linaro.org/toolchain
NEWS for GCC 6 (as of Linaro GCC 6.5-2018.12)
==============================================
* Runtest and gdbserver are no longer installed in the toolchain bin/
directory. Binary releases no longer include runtest at all, and
gdbserver is a target tool; it is now shipped in the sysroot under
usr/bin/.
LDTS case #2211: gdbserver and runtest in GCC binary release are in
the wrong place or have the wrong name
* Gdbserver is no longer linked statically, because this is currently
unsupported.
Linaro bugzilla #3344: gdbserver broken in Linaro 2017.02
https://bugs.linaro.org/show_bug.cgi?id=3344
* Previous MinGW hosted version of Linaro GCC C preprocessor failed to
convert character set used for string, character constants, etc. This
is fixed in this release.
Linaro bugzilla #3040 : CC1 and cc1plus cannot convert UTF-8.
https://bugs.linaro.org/show_bug.cgi?id=3040
* The Linaro GCC 6.3-2017.05 snapshot added support for -mpure-code
option to ARMv7-M and ARMv8-M targets. This option ensures functions
are put into sections that contain only code and no data.
* The GDB version was upgraded from GDB 8.1 to 8.2.
* Previous versions of the Linaro GCC 6 toolchain, when -static
-E/—dynamic-list are passed to the linker, might create executables
with dynamic sections which aren’t supported by run-time. This was
exhibited in Perf Tools build system and has been fixed upstream and
backported into Linaro Binutils 2.27 branch.
Linaro bugzilla #2926 : Perf tools compiled statically for AArch64
with Linaro release 6.1 and later ones was not statically linked.
https://bugs.linaro.org/show_bug.cgi?id=2926
* The Linaro GCC 6.3-2017.03 snapshot fixed some ILP32 issues (TLS,
exception handling, …) and these have been incorporated into this
release.
* Previous versions of the Linaro GCC 6 toolchain were incorrectly
generating floating-point code for soft-float Linux targets
(arm-linux-gnueabi, and armeb-linux-gnueabi). This escaped detection
until recently because the soft-float targeted toolchains were
configured to use general-purpose registers for passing floating-point
values (which is what you would expect for soft-float toolchains) and
the intra-routine floating-code was not noticed.
The issue would only show up on targets that were run on hardware that
truly didn't have floating-point hardware where the kernel did not
trap and emulate floating-point routines. This has been solved in
Linaro GCC 6.3-2017.02-rc2 by configuring the toolchain (using
--with-float=soft) to generate code without any floating-point
instructions at all (-mfloat-abi=soft).
https://review.linaro.org/#/c/16968/2
This change should not break compatibility between existing binaries
compiled with these toolchains since the float-point parameter passing
ABI is still the same.
* A bug/regression in the compiler has been identified whereby the
target function that is invoked when calling a "weak" function
directly is the "strong" override, whereas when calling the function
via a pointer the "weak" implementation is used. This would be
noticed as inconsistent function invocation when invoking directly vs.
invoking via function pointer. This issue only affected 32-bit arm
targets. This regression has been fixed upstream and backported into
Linaro GCC 6.3-2017.02-rc2.
GCC PR target/78253: [5/6/7 Regression] [ARM] call weak function
instead of strong when called through pointer.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78253
Linaro bugzilla #2562: ARM GCC 5.2 call weak function instead of
strong when called through pointer
https://bugs.linaro.org/show_bug.cgi?id=2562
* MS Windows does not support symlinks and the MS Windows archive
extractor does not properly deep copy the symlink target
files/directories into the symlinked directory structure when
unpacking the toolchain archive. This causes problems with missing
dependencies when using the Linaro mingw toolchains, as identified in
the following bugs:
https://bugs.linaro.org/show_bug.cgi?id=2684https://bugs.linaro.org/show_bug.cgi?id=2192https://bugs.linaro.org/show_bug.cgi?id=2762
This has been solved by copying files rather than using symlinks when
the mingw targetted toolchain archives are created.
https://review.linaro.org/#/c/16415/
* Users of Linaro's toolchain have encountered problems when building
projects with Autotools (specifically libtool):
https://bugs.linaro.org/show_bug.cgi?id=2764
The Linaro binary toolchain release contained files with a .la suffix
as artifacts of the toolchain build process. These .la files are
helper files for libtool, but unlike a gcc install tree, they are not
position independent and contain full paths. Since these artifacts
contain absolute paths they can actually mislead user invocation of
libtool into not finding required libraries (because they reference
the build tree, not the install location) and hence breaking Autotools
builds. These *.la file artifacts have been removed from Linaro
toolchain binaries because they are unnecessary for users.
* The Linaro GCC 6.3-2017.01 snapshot added further enablement for
ARMv8-M and these have been incorporated into this release.
* Compiling and statically linking some SPEC2006int tests against
tcmalloc have been failing due to a problem with glibc's memory
allocator function overrides. This was fixed upstream:
https://sourceware.org/bugzilla/show_bug.cgi?id=20432
Backported into Linaro glibc 2.23:
commit 058b5a41d56b9a8860dede14d97dd443792d064b
Author: Florian Weimer <fweimer(a)redhat.com>
Date: Fri Aug 26 22:40:27 2016 +0200
malloc: Simplify static malloc interposition [BZ #20432]
* Host binaries for x86_64 linux hosts now have symbols and debug
information stripped in order to reduce the size of the toolchain
binary archives. This reduces the archive size from 1.5G to 600M for
aarch64-linux-gnu target with the gcc-6-branch.
* The GDB version was upgraded from GDB 7.11 in the Linaro GCC
6.1-2016.08 release to GDB 7.12 in the Linaro GCC 6.2-2016.11 release.
* The Linaro GCC 6.2-2016.10 snapshot added AArch32 support for ARMv8.2
and ARMv8m, as well as some AArch64 fixes for ARMv8.2, and bug fixes
merged from FSF GCC 6.2. This is available in the binary toolchain as
of Linaro GCC 6.2-2016.11.
* Basic tuning support for the Qualcomm qdf24xx was added to the Linaro
GCC 6.2-2016.10 snapshot and is available in the binary toolchain as
of Linaro GCC 6.2-2016.11.
* IFUNC was disabled for baremetal targets, as it was causing test-suite
failures, and is presently a Linux only feature.
* The gold linker was added to this binary release.
* Backported malloc_lock fix into Linaro newlib 2.4.
commit 2665915cfc46aa6403bb2efd473c523d3167e0cb
Author: Andre Vieira (lists) <Andre.SimoesDiasVieira(a)arm.com>
Date: Thu Jun 16 12:23:51 2016 +0100
Re-enable malloc_lock for newlib-nano
* Backported rawmemchr patch into Linaro newlib 2.4.
commit e7b1ee2ea6aa3ee1da41976407410e6202a098c5
Author: Wilco Dijkstra <Wilco.Dijkstra(a)arm.com>
Date: Thu May 12 16:16:58 2016 +0000
Add rawmemchr
* Backported strlen fix when using Thumb-2 and -Os -marm into Linaro
newlib 2.4.
commit 5c02bcc086a96b174e1b9e1445a4a1770070107a
Author: Thomas Preud'homme <thomas.preudhomme(a)arm.com>
Date: Wed May 11 17:18:48 2016 -0400
Fix strlen using Thumb-2 with -Os -marm
* Backported fix for semihosting ARM when heapinfo not provided by
debugger into Linaro newlib 2.4.
commit 5c9403eaf40951f8a4f55ed65f661b485ff44be7
Author: David Hoover <spm2(a)dangerous.li>
Date: Thu Apr 21 07:12:24 2016 +0200
Fixed semihosting for ARM when heapinfo not provided by debugger.
* Merged latest FSF glibc release/2.23/master into Linaro glibc 2.23.
* Backported __ASSUME_REQUEUE_PI check Linaro glibc 2.23 branch.
commit 2d20c3bf918cd94ebd4106693adb3a5c9272baba
Author: Adhemerval Zanella <adhemerval.zanella(a)linaro.org>
Date: Tue May 17 10:16:39 2016 -0300
Add runtime check for __ASSUME_REQUEUE_PI (BZ# 18463)
* Backported removal of __ASSUME_SET_ROBUST_LIST from Linaro glibc 2.23
branch.
commit bb8f09d72756186a3d82a1f7b2adcf8bc1fbaed1
Author: Adhemerval Zanella <adhemerval.zanella(a)linaro.org>
Date: Mon May 16 19:01:10 2016 -0300
Remove __ASSUME_SET_ROBUST_LIST
* Backported removal of __ASSUME_FUTEX_LOCK_PI from Linaro glibc 2.23
branch.
commit e48b4e7fed0de06dd7832ead48bea8ebc813a204
Author: Adhemerval Zanella <adhemerval.zanella(a)linaro.org>
Date: Mon May 16 10:35:25 2016 -0300
Remove __ASSUME_FUTEX_LOCK_PI
* Merged latest FSF binutils-2_27-branch into
linaro_binutils-2_27-branch.
* The libwinpthread DLL is now copied into the host bin directory to
satisfy mingw package dependencies.
* Backported GNU Linker fix.
commit fbc6c6763e70cb2376e2de990c7fc54c0ee44a59
Author: Nick Clifton <nickc(a)redhat.com>
Date: Tue Aug 23 09:45:11 2016 +0100
Fix seg-fault in ARM linker when trying to parse a binary file.
* Backported GNU Assembler fix for PR 20364
commit 5fe7ebe5ab43750abf8f490b785d99a1e598e7fd
Author: Nick Clifton <nickc(a)redhat.com>
Date: Fri Aug 5 10:37:57 2016 +0100
Fix the generation of alignment frags in code sections for AArch64.
https://sourceware.org/bugzilla/show_bug.cgi?id=20364
* Performance related backports from the following snapshots have been
included: Linaro GCC 6.1-2016.06, Linaro GCC 6.1-2016.07, Linaro GCC
6.1-2016.08, Linaro GCC 6.2-2016.09, Linaro GCC 6.2-2016.10, Linaro
GCC 6.2-2016.11, Linaro GCC 6.2-2016.12, Linaro GCC 6.3-2017.01,
Linaro GCC 6.3-2017.02, Linaro GCC 6.3-2017.03, Linaro GCC
6.3-2017.04, Linaro GCC 6.3-2017.05, Linaro GCC 6.3-2017.06, Linaro
GCC 6.4-2017.07, Linaro GCC 6.4-2017.08, Linaro GCC 6.4-2017.09,
Linaro GCC 6.4-2017.10, Linaro GCC 6.4-2018.04 and Linaro GCC
6.5-2018.11.
See the following Linaro GCC snapshots:
http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.1-2016.06/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.1-2016.07/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.1-2016.08/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.2-2016.09/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.2-2016.10/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.2-2016.11/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.2-2016.12/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.3-2017.01/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.3-2017.02/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.3-2017.03/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.3-2017.04/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.3-2017.05/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.3-2017.06/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.4-2017.07/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.4-2017.08/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.4-2017.09/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.4-2017.10/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.4-2018.04/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.5-2018.11/
Contact Linaro
===============
File bugs at http://bugs.linaro.org
For Linaro member support see http://support.linaro.org
For Linaro community support email linaro-toolchain(a)lists.linaro.org
This seems like a tricky extension to deploy to the operating system.
What is the proposed interface for setting GP on application pages? There are
several things that seem plausible to me, and I wondered how far planning has
gotten.
An mmap/mprotect flag?
An ELF program header PT_ARM_BTI (a-la PT_GNU_RELRO) to direct the loader to
set said flag when mapping binaries? Or equivalently, a PF_MASKOS bit that
could be set on the normal PT_LOAD header.
An ELF section flag set by the compiler for sections that use -mbti, which are
then collected into the PT_GNU_BTI segment by the linker?
That seems like the most plausible way to indicate on a per-binary basis that
it has been compiled with the BTI hints in place. But probably there are other
ways that make an equal amount of sense.
Is there any coordination going on with Intel wrt their similar gadget
protection scheme(s)?
r~
== This Week ==
* SVE ACLE (8/10)
- Addressing comments by Richard for svlsl_wide
- Created patch for svcls / svclz
* Validation (2/10)
- WIP hcqc wrapper script
== Next Week ==
- Continue ongoing tasks
