Progress:
* VIRT-65 [QEMU upstream maintainership]
- release work (we needed an rc4, and then an rc5 due to a
late-breaking security bug)
- wrote a patch which I hope will fix synchronization of system
register state to KVM for a case where QEMU code wants to change
the register values, which it does when QEMU is arranging to inject
an exception into the guest
- catching up on patch review and assembling target-arm.next
ready for when the tree reopens
- some simple patches fixing minor memory leaks spotted by clang LeakSanitizer
- sent a patch for a race condition that meant we would sometimes ignore
a guest-requested system reset or otherwise get confused by it
thanks
-- PMM
== Progress ==
# [LLVM-492] [Thumb GlobalISel] Lower parameters for Thumb functions
- Committed upstream
# [LLVM-500] [Thumb GlobalISel] Support G_ADD, G_SUB, G_MUL
- Started working on this but it became apparent that the existing
tests would be easier to reuse if we had support for G_LOAD first
# [LLVM-506] [Thumb GlobalISel] Support G_LOAD and G_STORE
- Investigated whether we could get TableGen to select G_LOADs and
G_STOREs by porting ComplexPattern
- Unfortunately that is not enough, and even AArch64 has
hand-written code for it in the instruction selector
- Will handle it the ugly way next week
== Plan ==
# LLVM-506, LLVM-500
Greetings,
I’m trying to have the Aarch64 gcc optimize a single function using the O3 optimization in this manner:
void __attribute__ ((optimize ("-O3", "-ftree-vectorize" )))
However, when examining the assembler code, there is no trace of any optimization beyond the project default.
The only way to successfully enforce the optimization is using -O3 in the gcc command line. Then the compiler produces ARM neon instructions.
Do you know any issues regarding function level optimizations and the Aarch64 gcc?
Regards
[Upstream]
Posted a patch set aimed at register allocation vs function calls. It does
reduce code size by a percent or two. Emilio did some benchmarking and found
that it does help a bit, but does not completely eliminate the effect of the
call+ret overhead on the most modern of x86 implementations.
Reviewed v2 of tcg/riscv. Still a lot of work to be done, I think.
Cleanup of all tcg backends vs re-translation, which is no longer a thing.
Cleanup of tcg/i386 vs scratch registers.
[Other]
Updated the mustang to ubuntu 18.10. I was seeing some weirdness
that I'm hoping I can blame on the bionic 4.15 kernel and will be
gone with the cosmic 4.18 kernel. Fingers crossed...
r~
o 4 days week.
o LLVM
* 7.0.1-rc2:
- Miscompare on AArch64:
No luck with Sanitizers enabled, still digging.
* Machine Outliner on ARM prototype:
- Fixed Pic code issue.
- llvm bootstrap in thumb mode gives 4% code size reduction.
- Investigating new issues
o Misc
* Various meetings and discussions.
=== Work done during the past 2 weeks ===
* GNU-296 (Fix stack protector on ARM): committed!
* LLVM-432 (Support arithmetic on FileCheck regex variable):
+ finished reworking parsing code to be separate from evaluation and support
more complex expression
+ fix compile errors and bugs found when running tests added to check feature
* Write patch to diagnose error when compiling Armv8-M Baseline CMSE
code with -mfpu
-> as unintended consequence, needs rewrite
* Wrote and committed patch to improve comments for some data structure in ld
* Misc:
+ various meeting about my departure from Arm & Linaro
=== Plan for week 49 ===
LLVM-432 (Support arithmetic on FileCheck regex variable):
+ extend testcase coverage (add tests for latest syntax change and
add more negative testing)
+ clean up the code
+ improve documentation
* Try to reproduce perf issue mentioned in week #30's weekly report on
latest perf
* Line management:
+ continue progress on rotations
== Progress ==
* FDPIC
- GCC: no feedback yet on v4 patches
- GDB: started looking at the patches, some parts are very similar to
FRV, maybe worth commonalization.
* GCC upstream validation:
- reported a few regressions, helped testing some patches
- dealing with some random results, still
- trying qemu-3.1.0-rc1, memory consumption problems with
aarch64-linux. Could not properly test cortex-m0 support yet, because
building gcc --with-cpu=cortex-m0 currently fails.
* GCC:
- bug report on aarch64 about misaligned accesses. I do not have
access to LHG gerrit, Maxim will look at isolating the problem.
- rebased ubsan / bare-metal patches. Really need to look at how to
merge them into LLVM
* misc (conf-calls, meetings, emails, ....)
- reviewing infra script patches
- ran Spec2006 on aarch64 using gcc-8.2 sysroot, results match the
previous ones, so the improvements are only imputable to the compiler.
Started the same experiment on aarch32
- some Jira/goals discussions
- dealing with nasty ST-internal infrastructure problems
== Next ==
FDPIC:
- GCC: handle feedback on v4 patches
- GDB: update patches
- uclibc-ng: look at how to test fdpic mode with openadk
Benchmarks:
- collect results
Validation:
- isolate why qemu-3.1.0-rc1 consumes much more memory for aarch64-linux target
Progress:
* VIRT-65 [QEMU upstream maintainership]
- release work (it is looking like we'll need an rc4 next week)
- worked out some patches which hopefully will fix running
QEMU on OSX Mojave (testing still required)
- code review
- sent a cleanup patchset that removes the load_image()
function (which is not possible to use safely and which we
marked as deprecated way back in 2008!)
* VIRT-268 [QEMU support for dual-core Cortex-M Musca board]
- implemented test case which demonstrates that we incorrectly share
translated code between heterogenous CPUs and behave wrongly as a
result (using the existing xlnx-zcu102 board)
thanks
-- PMM
[LLVM-493] LLD link failure on KASLR for AArch64 Linux kernel
The linux kernel can build in an ASLR mode that is currently causing LLD
some problems. There are a few oddities in the kernel that aren't quite
right but there are some problems in LLD that need resolving as well. has
been a couple of interesting days trying to work out why some strange
options have been used.
[LLVM-484] LLD combination of dynamic relocs into a single section
Committed upstream
[LLVM-486] Error if user code defines _GLOBAL_OFFSET_TABLE_
Committed upstream
[LLVM-489] Measure (cross) linking of performance of LLD on Chrome
Performance of linking AArch64 matches X86, roughly twice as fast as
ld.gold and five times faster than ld.bfd.
[TCWG-1492] Investigated why git-clone and git-fetch might hang/deadlock.
Back up might be to put a timeout/retry.
[Other]
Submitted LLVM team goals for the TCWG team
Wrote up how TCWG use Jenkins and CI, now in Confluence.
Planned Absences:
ARM internal Compiler conference 4th/5th December
Christmas holiday 17th December - 4th January
QEMU Tooling ([VIRT-252])
=========================
QEMU plugin support ([VIRT-280])
- reviewed Emilio's {RFC 00/48} Plugin support Message-Id:
<20181025172057.20414-1-cota(a)braap.org>
- looks like a good basis for going forward if we can work out the
kinks
- port my example tools to his framework :todo
[VIRT-280] https://projects.linaro.org/browse/VIRT-280
Upstream Work ([VIRT-109])
==========================
- did a quick pass at [enabling system tests in check-tcg]
- started reviewing {Qemu-devel} {PATCH for-4.0 v2 00/37} tcg:
Assorted cleanups Message-Id:
<20181123144558.5048-1-richard.henderson(a)linaro.org>
[VIRT-109] https://projects.linaro.org/browse/VIRT-109
[enabling system tests in check-tcg]
https://github.com/stsquad/qemu/tree/tests/enable-system-tests
Testing and CI
==============
[VIRT-2] https://projects.linaro.org/browse/VIRT-2
KVM CI Loop ([VIRT-2])
- The [LKFT team] are working with gregkh to ensure -stable is tested
for KVM regressions
- wrote up the State of testing for KVM Message-Id:
<874lc14194.fsf(a)linaro.org>
- look at example regression to see what would have caught the failure
:todo
- look at kselftest and understand it's place :todo
[VIRT-2] https://projects.linaro.org/browse/VIRT-2
[LKFT team] https://lkft.linaro.org/
Other Tasks
===========
- need to concluded actions from The QEMU initiative thread
Message-Id: <87wop4gezg.fsf(a)linaro.org> :todo
Completed Reviews [2/2]
=======================
{RFC 00/48} Plugin support
Message-Id: <20181025172057.20414-1-cota(a)braap.org>
- CLOSING NOTE [2018-11-28 Wed 14:13]
Hashed out a number of things. Emilio will look at a single-pass
option and it makes things easier or not. It was also suggested we
could move instruction fetch to helpers outside of the individual
front-ends to keep the plugin call points in the core translator and
avoid having to tweak each front-end for support. A number of
pre-requisites were discussed including some de-macrofication work
to make the code easier to follow and instrument.
{PATCH 0/4} xxhash patches for 4.0
Message-Id: <20181123230206.12629-1-cota(a)braap.org>
- CLOSING NOTE [2018-11-28 Wed 15:09]
Clean-up to xxhash to match original and handle expanded hashes
Absences
========
- Christmas Holidays
- Connect BKK19 (1-5th April 2019)
Current Review Queue
====================
* {Qemu-devel} {PATCH for-4.0 v2 00/37} tcg: Assorted cleanups
Message-Id: <20181123144558.5048-1-richard.henderson(a)linaro.org>
* {PATCH v6 00/13} hardfloat
Message-Id: <20181124235553.17371-1-cota(a)braap.org>
* {Qemu-arm} {PATCH v7 00/16} gdbstub: support for the multiprocess extension
Message-Id: <20181123091729.29921-1-luc.michel(a)greensocs.com>
* {Qemu-arm} {PATCH 00/13} Support disabling TCG on ARM
Message-Id: <20181113165247.4806-1-sameo(a)linux.intel.com>
* {PATCH 0/7} Acceptance Tests: basic architecture support
Message-Id: <20181004151429.7232-1-crosa(a)redhat.com>
* {PATCH v7 00/19} Fixing record/replay and adding reverse debugging
Message-Id: <20181010133333.24538.53169.stgit@pasha-VirtualBox>
--
Alex Bennée
