linaro-toolchain

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6 participants
5605 discussions

[ACTIVITY] 11 - 15 November 2019

by Diana Picus

== Progress == * Committed SVE-related fix for InstCombine * Started triaging check-lldb failures on AArch64 [LLVM-512] - Committed a trivial fix for one of the tests - Still looking into the other failures * Received and setup laptop for Morello work - Awaiting further instructions == Plan == * Start working on Morello * Keep triaging check-lldb failures * If time permits, look into SVE asserts some more

5 years, 7 months

[Activity] Oct 28th - Nov 6th 2019

by Luis Machado

# Progress # o Annual Review * Concluded o Upstream GDB * Patch reviews on gerrit and answering questions. * Fixed PR25124 - [ARM] regression: thumb-bx-pc.exp (https://sourceware.org/bugzilla/show_bug.cgi?id=25124) * Investigated an odd failure in gdb.base/step-over-syscall.exp and ended up finding some odd stepping behavior that may or may not be kernel related. Still investigating under GNU-644 (https://projects.linaro.org/browse/GNU-644) o GDB: * GNU-170 - GDB BZ #21221 - gdb hangs while stepping an empty loop - On hold for now. It would be nice to be able to use a NOP instead of a dummy label + jump. * Setup QEMU for running SVE bits and reproduced some SVE hiccups in gdbserver that Alex mentioned. * Misc discussions about SVE and the GDB implementation in general. # Plan # o Upstream GDB * More patch reviewing and answering questions. o GDB: * GNU-644 - [GDB, AArch64] gdb.base/step-over-syscalls.exp failures - Continue investigating * Tweak QEMU setup a little for SVE testing

5 years, 8 months

ACTIVITY] 4-8 Nov 2019

by Christophe Lyon

== Progress == * GCC: - -mpure-code on v6m: no feedback yet * Linker: - started looking at implementing non-contiguous memory support * GCC upstream validation: - reported several issues * misc: - infra fixes / troubleshooting / reviews == Next == * GCC: pure-code/v6m, handle feedback * Binutils: support non-contiguous memory regions in linker

5 years, 8 months

[ACTIVITY] week ending 10 Nov 2019

by Richard Henderson

[VIRT-263 # ARMv8.1-VHE Virtual Host Extensions ] Reworked the timer redirection. Now the EL2 and EL0 redirection is unified, which is a bit easier to understand. Still no joy working out where the unwanted interrupt is coming from. As far as I can tell everything is plumbed correctly... I'll shelve this until PMM is not swamped with release work. It must wait for 5.0 for merging anyway. [VIRT-327 # Richard's upstream QEMU work ] Assorted patch review. [Kernel] Posted two more rounds of ARMv8.5-RNG for review. Seems I'd misunderstood one of Mark's previous suggestions, and Ard changed his mind about how RNDR vs RNDRRS should be used in the context of the shared resource across host*CORES + virt*VCPUS. [GCC] Posted an implementation of asm-flag-output for AArch32+AArch64. I should have done this years ago. There are two potential users within the kernel, and one is access_ok() which has thousands of uses. (Oh, and RNG, which has like 3 uses. :-P) Reviewed some arm simd patches that caught my eye. r~

5 years, 8 months

[ACTIVITY] week ending Nov. 10 2019

by Alex Bennée

QEMU Tooling ([VIRT-252]) ========================= QEMU plugin support ([VIRT-280]) - feature now merged in 4.2 - closed out a bunch of related JIRA cards - posted {PATCH} tcg plugins: expose an API version concept Message-Id: <20191104131836.12566-1-alex.bennee(a)linaro.org> - requested by Peter before hardfreeze Extend gdbstub for SVE ([VIRT-281]) - got a [working prototype] - probably need a little core gdbstub re-factor before posting RFC [VIRT-281] https://projects.linaro.org/browse/VIRT-281 [working prototype] https://github.com/stsquad/qemu/tree/gdbstub/sve-registers Upstream Work ([VIRT-109]) ========================== - posted {PULL v3 00/15} testing updates Message-Id: <20191025193709.28783-1-alex.bennee(a)linaro.org> - had to drop NetBSD autobuild (again) [VIRT-109] https://projects.linaro.org/browse/VIRT-109 [branch] https://github.com/stsquad/qemu/tree/testing/docker-multiarch-refactor [testing/next] https://github.com/stsquad/qemu/tree/testing/next Other Activities ================ - Presented at KVM Forum - went down well, made a number of contacts who are interested - A bunch of discussion on Hexagon - More detailed write-up to follow Completed Reviews [4/4] ======================= {PATCH 0/5} travis.yml improvements: Update libraries, build with arm64 Message-Id: <20191009170701.14756-1-thuth(a)redhat.com> - CLOSING NOTE [2019-10-18 Fri 19:04] Pulled some bits into testing/next Added: <2019-10-09 Wed> {PATCH} Semihost SYS_READC implementation (v4) Message-Id: <20191024224622.12371-1-keithp(a)keithp.com> {PATCH v2 0/4} target/arm: Support for Data Cache Clean up to PoP Message-Id: <CADSWDztHetgmbUOp4WyRAkR0daAG6kkwhUTcyKWiCTWHQ1XB=w(a)mail.gmail.com> {PATCH 0/4} Make the qemu_logfile handle thread safe. Message-Id: <20191107142613.2379-1-robert.foley(a)linaro.org> Absences ======== - KVM Forum Oct 29th-Nov 1st Current Review Queue ==================== * {PATCH v7 0/8} Acceptance test: Add "boot_linux" acceptance test Message-Id: <20191104151323.9883-1-crosa(a)redhat.com> Added: <2019-11-04 Mon> * {RFC 0/3} tests/vhost-user-fs-test: add vhost-user-fs test case Message-Id: <20191025100152.6638-1-stefanha(a)redhat.com> Added: <2019-10-25 Fri> * {PATCH v5 00/22} target/arm: Implement ARMv8.5-MemTag, system mode Message-Id: <20191011134744.2477-1-richard.henderson(a)linaro.org> Added: <2019-10-11 Fri> * {PATCH v4 0/9} target/arm/kvm: enable SVE in guests Message-Id: <20190924113105.19076-1-drjones(a)redhat.com> Added: <2019-09-24 Tue> -- Alex Bennée

5 years, 8 months

[ACTIVITY] 3x3 for week ending 8th November 2019

by Peter Smith

Morello - Started to document the LLD implementation. - Implemented CHERI concentrate alignment for the important sections. - Dynamic linking is feature complete, but not finished yet, still Todo: -- More test cases for the various different combinations. -- Refactor to clean up the implementation. -- Rebase all the patches to remove the false starts. -- Update the documentation I've just started as it is already out of date. -- Not looked at ifunc or TLS yet. llvm-mc Some review on MC patch to allow limited symbolic computation when evaluating .if

5 years, 8 months

[ACTIVITY] report week ending 8 Nov (inc KVM Forum trip report)

by Peter Maydell

Progress / KVM Forum trip report: * As usual, we held the QEMU Summit at the same time as the forum; this is an hour-or-two invitation only meeting of the top 20 or so maintainers/submaintainers, discussing process and other project issues. A proper summary/writeup of the minutes will be posted to qemu-devel later, but IMHO this year the most interesting topics were: - Spreading the load of managing pull request merges; currently I do this with the aid of some hand-hacked scripts. To be able to spread this work among more people we need to replace that with a more maintained and standardized CI/testing setup. RedHat have agreed to provide some people to work on at least the initial setup part of this, and we got some consensus that the approach to take was to use Gitlab with some custom 'runners' to handle the 'build/test on aarch64/ppc/s390x/etc' parts. - We talked about the project's general stance on 'plugin' interfaces; which can be controversial both because they commit us to maintaining a stable API/ABI and because they have the potential to be used to work around the GPL (eg proprietary device models). We plan to write up some guidelines here (mostly just writing down the existing consensus). - We also talked (again) about our handling of security issues and CVEs. My impression is that there are some parts of this that people aren't hugely happy with but that nobody has the time/effort to try to improve things (eg better documentation/tracking of issues, more prompt upstream point releases with security fixes), so things are likely to stay about as they are now. * Interesting talks (videos are being uploaded to: https://www.youtube.com/channel/UCRCSQmAOh7yzgheq-emy1xA ): - 'The Hype Around the RISC-V Hypervisor' : the RISC-V architecture's hypervisor extension isn't completely finalized yet, but it's far enough advanced that KVM support and also QEMU emulation of it have been written. An amusing sign of the architecture's academic underpinnings is that this first version doesn't have any hardware acceleration of the interrupt controller, but does have full nested-virtualization support. - 'ZERO: Next Generation Virtualization Platform for Huawei Cloud': Huawei describe hardware for a cloud environment which offloads as much as possible of the hypervisor work to custom I/O cards and a custom silicon cloud-control device, in a general approach that's probably familiar to anybody who watched the Amazon Nitro presentation from the other year. - 'What's Going On? Taking Advantage of TCG's Total System Awareness': Alex Bennée's talk on the introspection plugin work we've been doing in Linaro (and which will be in QEMU 4.2). - 'Playing Lego with Virtualization Components': description of the Rust 'rust-vmm' set of libraries intended to provide useful building blocks for putting together virtual machine managers (like Firecracker, crosvm). Basically similar content to a presentation they did for Cambridge University earlier this year, but this talk's been recorded so is good if you weren't in the audience the first time around. * And as always the in-person networking is valuable: - Oracle have a "split device emulation into separate processes" idea that's alarmingly invasive of the source code, but Stefan came up with an approach that might let them do what they need without making the source code harder to work with for the rest of us. - Met the RedHat person who's going to do the CI-for-pullreqs work (see QEMU Summit item earlier) : getting this unstalled was probably the most useful concrete outcome of the conference - Finally met Aurelien Jarno (a longstanding hobbyist contributor to QEMU who usually can't attend these conferences) * While at the conference Drew and I managed to finally get the SVE support for KVM guests into master (the last hurdle was an awkward test failure on the aarch32-compat-on-aarch64-kernel setup I happen to use as one of my build test environments; we don't care about whether KVM really works in this setup but we need 'make check' to not fail) * Also managed to fit in some wrangling of pull requests; the timing of the 4.2 release unfortunately put softfreeze on the Tuesday before the conference and rc0 on the Tuesday afterwards; rc0 ended up being postponed a couple of days as a consequence. thanks -- PMM

5 years, 8 months

[ACTIVITY] Week ending 1st November 2019

by Peter Smith

Linaro - On buildbot monitoring duty, relatively quiet week with just a couple of fairly simple to diagnose problems to report. Morello - Dynamic linking progressing albeit slowly. -- Trying to work out the requirements from existing documents and implementation. -- Have some simple cases doing mostly the right thing and have written some tests. -- Will need to rewrite to move calculations earlier in the link-step. -- Morello is quite different from Cheri in this regard so I have had to diverge much more from the implementation.

5 years, 8 months

VHE status

by Richard Henderson

Tree: https://github.com/rth7680/qemu.git tgt-arm-vhe-5 Testcase: qemu-test:~rth/linux/initramfs-min.cpio.gz The host kernel could be anything, but I've been using the same Image.gz that is inside the cpio archive. ./aarch64-softmmu/qemu-system-aarch64 -m 4G \ -M virt,virtualization=on,gic-version=max -cpu max \ -kernel Image.gz -initrd initramfs-min.cpio.gz At the shell prompt, ./test will run a guest kernel with kvm. As momentarily discussed with PMM in the hallway: As soon as the guest kernel enables interrupts, arch_timer_starting_cpu enable_percpu_irq irq_percpu_enable gic_unmask_irq -- Incorrect exception delivery. the GTIMER_PHYS interrupt is delivered to EL2 (seems to be ok), the host kernel does something (haven't dug into what exactly, bug presumably setting bits that are supposed to pass the virq to the guest), and immediately another interrupt is delivered to EL2. Repeat. Whether this is incorrect routing of the virq interrupt, or incorrect masking/acking of the hard irq interrupt at EL2, I do not yet know. PMM: I don't know the answer to either (a) or (b) as asked on hangouts. I think (b) is correct, but I can't be sure. I'm trying to understand how (a) is supposed to work now. In particular, I can't find any code that sets HCR_EL2.{VI,VF}, only tests them. r~

5 years, 8 months

[Activity] 21 - 25 Oct 2019

by Luis Machado

# Progress # o Ramp up * Concluded. o Annual Review * Attended discussions. o Upstream GDB * Patch reviews on gerrit. * Answered questions. * The state of ARM/AArch64 GDB upstream seems to be reasonable, with a few failures here and there. Numerous failures on problematic racy tests (gdb.threads). o GDB: * GNU-170 - GDB BZ #21221 - gdb hangs while stepping an empty loop - Spent some more time on this and improve the patch further, covering most problematic cases for "for", "while" and "do/while" loops. * Read some documentation on setting up Fast Models for testing MVE (Helium). * Inspected various aspects of ARM support in GDB, like SVE, PAC and ACLE. # Plan # o Annual Review * Conclude. o GDB: * GNU-170 - GDB BZ #21221 - gdb hangs while stepping an empty loop - Discuss with gcc@ a bit more about my proposed solution. * Attempt to setup system QEMU and/or Fast Model for testing ACLE SVE and, maybe, MVE.

5 years, 8 months

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