On 4/29/26 23:22, Nicolas Dufresne wrote:

Hi Markus,

Le mercredi 29 avril 2026 à 19:53 +0000, Markus Fritsche a écrit :

...

Hi,

This series proposes a small opt-in API in videobuf2-core that lets V4L2 drivers populate a dma_resv exclusive write fence on the dmabufs they export to userspace, signalled when the buffer transitions to VB2_BUF_STATE_DONE. Two example drivers (hantro, rockchip-rga) opt in to demonstrate the call shape; the change is no-op for every other driver.

Thanks for attempting again this feat. I see you went for implicit fencing, but in the past we've been recommend to stay away from these and adopt an explicit fencing model. Is this something you have started to think about, have you reviewed past proposal in regard to fences ?

Yeah agree, I just wanted to note something similar.

Implicit fencing is basically just a workaround how the GPU HW used to work ~20years ago and only rarely makes sense today.

On the other hand putting it behind a flag might be acceptable when you want to interact with implicit synced HW, e.g. a GPU.

If you want to expose a dma_fence to userspace then using a sync_file as output from the IOCTL which kicks of the operation is usually the better approach.

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Why

Modern Wayland compositors and any other userspace consumers that import V4L2-produced dmabufs and want to do implicit synchronization the spec-clean way (poll(POLLIN) on the dmabuf fd, or DMA_BUF_IOCTL_EXPORT_SYNC_FILE for a sync_file) currently get either:

1. A stub fence from dma_buf_export_sync_file(), because the dmabuf's

dma_resv has no fences populated. The kernel substitutes    dma_fence_get_stub() which is permanently signalled. The compositor    "successfully" waits on a fence that represents nothing real about    the producer's state. 2. A poll(POLLIN) on the dmabuf fd that returns immediately for the    same reason — dma_buf_poll_add_cb finds zero fences in the resv,    triggers the wake callback inline, and reports POLLIN ready before    the producer has actually said anything.

Today this works as a happy accident on most paths because clients attach buffers after VIDIOC_DQBUF, which the userspace V4L2 contract guarantees only returns a buffer after the producer is done. So the implicit "the kernel's stub fence is fine because the buffer is already complete by the time anyone polls it" assumption has held.

There is no accident, just saying. Have you studied also the other side of fences, the one that actually cause problem with Freedreno and Etnaviv ? To me these would be higher priority since they are known to cause "back flash" kind of bugs, specially for compositor that are not expecting GL driver to place implicit fences on imported (v4l2 allocated) buffers.

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But:

• It's a contract gap. The kernel claims to expose implicit sync; it

does not, for V4L2 producers.

• It paid latency for nothing. Every Wayland frame from a V4L2

producer pays a DMA_BUF_IOCTL_EXPORT_SYNC_FILE round-trip for a   fence that's stub-signalled. On Mali-class hardware (RK3566 Wayland   chrome video playback), this contributed to compositor stalls.   Removing the wait at the compositor level is a workaround, not a   fix.

• It blocks downstream consumers from doing the right thing. A

Wayland compositor that defensively waits on a sync_file gets a   stub-fence pass-through with no actual gating; if the V4L2 driver   ever has an out-of-band path that releases the buffer before   finishing the write, there is no fence to gate on.

Some things don't add up here. I think I want to remind that there is a contract in regard to delivering a fence to userspace. One of the most important aspect of fences is that they must in finit time be signaled, regardless what userspace decided to do next. And for that reason, you shouldn't deliver a fence to userspace if its not armed. In my reading, you are delivering that fence at QBUF(capture) time, just like what Gustavo was trying to do previously. Its even worse if you deliver it to your compositor allowing that compositor to hang forever by not feeding any bitstream.

+1

Let's take Hantro driver as an example. The right moment to deliver the fence is either right before we set the DEC bit on the control register, or somewhere before that when you have bitstream, parameters and request queued. At that moment, you are guarantied that the decode will either finish or fail (yes, it can fail, and its extremely common with live stream, or when application calls streamoff, since in v4l2, we cancel work). Prior to that, user may starve the OUTPUT queue (the bitstream) and cause the fence to hold forever. This would break the contract I mention earlier.

Exactly that yes.

Regarding failed or canceled submission handling that is not so much of a problem since we also have proper error signaling on fences.

But what is usually problematic as well are things like dynamic memory management, e.g. when HW uses the PCIe PRI interface or similar functionality on other bus systems.

Getting the contract right is indeed really tricky but unfortunately mandatory because you otherwise run into deadlocks sooner or later.

Though, if you attach the fence at that moment, you will need to design how to signal the fence readiness (rather then the data readiness). One idea would be (with userspace opting-in) to signal the queue at that moment. But then you can't do the memory management operation you would normally do in DQBUF. This of course don't apply to hantro, which has no device cache, but we can't design something in vb2 for the old HW. So we'd need to move memory management somwhere else, maybe buffer_done, though you have to carefully make sure in which context you do that, you can't sleep in an IRQ.

There is an obvious benefit of basing your solution on DMA_BUF_IOCTL_EXPORT_SYNC_FILE, once you get there, you'll discover that there is very little room in v4l2_buffer, and that was causing a lot of headache to previous people attempting this. Though, if we look forward, we could also consider this a feature of the media_request. Queuing a request could maybe deliver a fence, assuming few pre-condition that guarantee execution (or failure) are met. We've seen with DW100 recently that its rather easy to convert an existing m2m driver to request. The media API is a much more open canvas to design new mechanism. We could have a really simple ioctl that attach out fences to request, and in a future hook it to our own depedency manager.

My request with the DMA-buf maintainer hat on would be to correctly annotate your fence submission path the with lockdep primitives Sima wrote and then make a few test runs with lockdep enabled.

It's not a prove of correctness but this at least gives you a good hint if your locking order and memory allocation paths are correct.

Regards, Christian.

I'm simply throwing ideas, I could have missed few things in your PoC, let me know.

Nicolas

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What

Patch 1 adds:

• struct dma_fence *release_fence to struct vb2_buffer
• u64 dma_resv_fence_context + atomic64_t dma_resv_fence_seqno +

spinlock_t dma_resv_fence_lock to struct vb2_queue

• vb2_buffer_attach_release_fence(vb) — drivers call this from their

buf_queue callback. Allocates a dma_fence on the queue's fence   context, attaches it as DMA_RESV_USAGE_WRITE on each plane's   dmabuf->resv. No-op for buffers without exported dmabufs.

• vb2_buffer_done() extended to signal+put the fence if attached,

so the producer's completion signal lands in the resv synchronously   with the userspace DQBUF wakeup.

Patches 2 and 3 add a single call to the helper from hantro_buf_queue and rga_buf_queue respectively. Both are demonstration drivers; other vb2 drivers can opt in incrementally with the same one-line change.

Tested on

PineTab2 (RK3566 / Mali-G52 panfrost / mainline 6.19.10, this series backported), playing 1080p30 H.264 in chromium under KDE Plasma 6.6.4 Wayland. The test harness is the chromium-fourier patch series at https://github.com/marfrit/fourier%C2%A0%E2%80%94 chromium plus a KWin patch that *previously bypassed* Transaction::watchDmaBuf because the kernel-side fence was stub-signalled. With this series applied, the bypass becomes unnecessary; KWin's fence wait completes correctly because the fence now signals when hantro completes the capture buffer write.

End-to-end result before the kernel patch (chromium + Qt 6 patches + KWin watchDmaBuf bypass): 1080p30 H.264 plays through, ~81% combined chrome CPU, but the watchDmaBuf bypass weakens KWin's defenses against misbehaving clients.

End-to-end result after the kernel patch (chromium + Qt 6 patches + plain unmodified KWin): 1080p30 H.264 plays through with the same CPU profile, KWin's watchDmaBuf wait completes within microseconds against the now-real producer fence, no defenses weakened.

What's missing in this RFC

• Other vb2-using drivers don't opt in. Each maintainer should look

at their driver and decide. The hantro + rga patches show the   shape; copying it to other drivers should be straightforward.

• For drivers that have intermediate image-processor stages (e.g.

CSI -> ISP -> user), the fence semantics across stage boundaries   are out of scope here. This series only addresses the producer-to-   userspace edge.

• No selftest. videobuf2 doesn't have a great in-tree selftest harness

for dmabuf flows; the validation is end-to-end at the userspace   consumer level (KWin, in our case).

Reviews especially welcome on:

• The decision to make this opt-in per driver vs. automatic for all

vb2-CAPTURE queues. Auto-on would force every driver to be audited;   opt-in is incremental and safer but leaves the contract gap for   drivers nobody touches.

• Whether vb2_buffer_done is the right place to signal vs. an earlier

hook (e.g. immediately after DMA-from-device finishes). For hantro   the two are effectively the same; for drivers with asynchronous   post-processing they may differ.

• The choice of DMA_RESV_USAGE_WRITE — we are emitting the producer's

write completion, so WRITE matches dma-buf documentation, but a   sanity check is welcome.

Cheers, Markus

Markus Fritsche (3):   media: videobuf2: add dma_resv release-fence helper   media: hantro: attach dma_resv release fence at buf_queue   media: rockchip-rga: attach dma_resv release fence at buf_queue

.../media/common/videobuf2/videobuf2-core.c   | 95 +++++++++++++++++++  drivers/media/platform/rockchip/rga/rga-buf.c | 10 ++  .../media/platform/verisilicon/hantro_v4l2.c  | 12 +++  include/media/videobuf2-core.h                | 29 ++++++  4 files changed, 146 insertions(+)