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7032 discussions

Re: [PATCH v7 00/11] Trusted Execution Environment (TEE) driver for Qualcomm TEE (QTEE)

by Jens Wiklander

Hi Amir, On Wed, Aug 13, 2025 at 2:37 AM Amirreza Zarrabi <amirreza.zarrabi(a)oss.qualcomm.com> wrote: > > This patch series introduces a Trusted Execution Environment (TEE) > driver for Qualcomm TEE (QTEE). QTEE enables Trusted Applications (TAs) > and services to run securely. It uses an object-based interface, where > each service is an object with sets of operations. Clients can invoke > these operations on objects, which can generate results, including other > objects. For example, an object can load a TA and return another object > that represents the loaded TA, allowing access to its services. > There are some build errors/warnings for arm and x86_64, see https://tuxapi.tuxsuite.com/v1/groups/linaro/projects/jens/plans/31DmCOn1pF… Thanks, Jens

1 year

Re: [PATCH v6 2/2] i2c: i2c-qcom-geni: Add Block event interrupt support

by Vinod Koul

On 25-07-25, 16:20, Jyothi Kumar Seerapu wrote: > > > On 7/23/2025 12:45 PM, Vinod Koul wrote: > > On 22-07-25, 15:46, Dmitry Baryshkov wrote: > > > On Tue, Jul 22, 2025 at 05:50:08PM +0530, Jyothi Kumar Seerapu wrote: > > > > On 7/19/2025 3:27 PM, Dmitry Baryshkov wrote: > > > > > On Mon, Jul 07, 2025 at 09:58:30PM +0530, Jyothi Kumar Seerapu wrote: > > > > > > On 7/4/2025 1:11 AM, Dmitry Baryshkov wrote: > > > > > > > On Thu, 3 Jul 2025 at 15:51, Jyothi Kumar Seerapu > > > > [Folks, would be nice to trim replies] > > > > > > > > Could you please confirm if can go with the similar approach of unmap the > > > > > > processed TREs based on a fixed threshold or constant value, instead of > > > > > > unmapping them all at once? > > > > > > > > > > I'd still say, that's a bad idea. Please stay within the boundaries of > > > > > the DMA API. > > > > > > > > > I agree with the approach you suggested—it's the GPI's responsibility to > > > > manage the available TREs. > > > > > > > > However, I'm curious whether can we set a dynamic watermark value perhaps > > > > half the available TREs) to trigger unmapping of processed TREs ? This would > > > > allow the software to prepare the next set of TREs while the hardware > > > > continues processing the remaining ones, enabling better parallelism and > > > > throughput. > > > > > > Let's land the simple implementation first, which can then be improved. > > > However I don't see any way to return 'above the watermark' from the DMA > > > controller. You might need to enhance the API. > > > > Traditionally, we set the dma transfers for watermark level and we get a > > interrupt. So you might want to set the callback for watermark level > > and then do mapping/unmapping etc in the callback. This is typical model > > for dmaengines, we should follow that well > > > > BR > > Thanks Dmitry and Vinod, I will work on V7 patch for submitting the I2C > messages until they fit and and unmap all processed messages together for > now. > > Regarding the watermark mechanism, looks GENI SE DMA supports watermark > interrupts but it appears that GPI DMA doesn't have such provision of > watermark. What is the mechanism to get interrupts from the GPI? If you submit 10 txn, can you ask it to interrupt when half of them are done? -- ~Vinod

1 year

Re: (subset) [PATCH v9 00/10] New DRM accel driver for Rockchip's RKNN NPU

by Heiko Stuebner

On Mon, 21 Jul 2025 11:17:27 +0200, Tomeu Vizoso wrote: > This series adds a new driver for the NPU that Rockchip includes in its > newer SoCs, developed by them on the NVDLA base. > > In its current form, it supports the specific NPU in the RK3588 SoC. > > The userspace driver is part of Mesa and an initial draft can be found at: > > [...] Applied, thanks! [07/10] arm64: dts: rockchip: add pd_npu label for RK3588 power domains commit: 6d64bceb97a1c93b3cc2131f7e023ef2f9cf33f2 [08/10] arm64: dts: rockchip: Add nodes for NPU and its MMU to rk3588-base commit: a31dfc060a747f08705ace36d8de006bc13318fa [09/10] arm64: dts: rockchip: Enable the NPU on quartzpro64 commit: 640366d644b1e282771a09c72be37162b6eda438 [10/10] arm64: dts: rockchip: enable NPU on ROCK 5B commit: 3af6a83fc85033e44ce5cd0e1de54dc20b7e15af Best regards, -- Heiko Stuebner <heiko(a)sntech.de>

1 year

Re: [PATCH v2 4/4] misc: fastrpc: Skip reference for DMA handles

by kernel test robot

Hi Ling, kernel test robot noticed the following build warnings: [auto build test WARNING on char-misc/char-misc-testing] [also build test WARNING on char-misc/char-misc-next char-misc/char-misc-linus linus/master v6.16 next-20250806] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch#_base_tree_information] url: https://github.com/intel-lab-lkp/linux/commits/Ling-Xu/misc-fastrpc-Save-ac… base: char-misc/char-misc-testing patch link: https://lore.kernel.org/r/20250806115114.688814-5-quic_lxu5%40quicinc.com patch subject: [PATCH v2 4/4] misc: fastrpc: Skip reference for DMA handles config: hexagon-randconfig-002-20250807 (https://download.01.org/0day-ci/archive/20250807/202508070731.S30957lV-lkp@…) compiler: clang version 22.0.0git (https://github.com/llvm/llvm-project 7b8dea265e72c3037b6b1e54d5ab51b7e14f328b) reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250807/202508070731.S30957lV-lkp@…) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot <lkp(a)intel.com> | Closes: https://lore.kernel.org/oe-kbuild-all/202508070731.S30957lV-lkp@intel.com/ All warnings (new ones prefixed by >>): >> drivers/misc/fastrpc.c:368:30: warning: unused variable 'sess' [-Wunused-variable] 368 | struct fastrpc_session_ctx *sess = fl->sctx; | ^~~~ 1 warning generated. vim +/sess +368 drivers/misc/fastrpc.c c68cfb718c8f97 Srinivas Kandagatla 2019-02-08 363 8f6c1d8c4f0cc3 Vamsi Krishna Gattupalli 2022-02-14 364 8f6c1d8c4f0cc3 Vamsi Krishna Gattupalli 2022-02-14 365 static int fastrpc_map_lookup(struct fastrpc_user *fl, int fd, 1922c68c56c660 Ling Xu 2025-08-06 366 struct fastrpc_map **ppmap) c68cfb718c8f97 Srinivas Kandagatla 2019-02-08 367 { 9446fa1683a7e3 Abel Vesa 2022-11-24 @368 struct fastrpc_session_ctx *sess = fl->sctx; c68cfb718c8f97 Srinivas Kandagatla 2019-02-08 369 struct fastrpc_map *map = NULL; d259063578ed76 Ling Xu 2025-08-06 370 struct dma_buf *buf; 9446fa1683a7e3 Abel Vesa 2022-11-24 371 int ret = -ENOENT; c68cfb718c8f97 Srinivas Kandagatla 2019-02-08 372 d259063578ed76 Ling Xu 2025-08-06 373 buf = dma_buf_get(fd); d259063578ed76 Ling Xu 2025-08-06 374 if (IS_ERR(buf)) d259063578ed76 Ling Xu 2025-08-06 375 return PTR_ERR(buf); d259063578ed76 Ling Xu 2025-08-06 376 9446fa1683a7e3 Abel Vesa 2022-11-24 377 spin_lock(&fl->lock); c68cfb718c8f97 Srinivas Kandagatla 2019-02-08 378 list_for_each_entry(map, &fl->maps, node) { d259063578ed76 Ling Xu 2025-08-06 379 if (map->fd != fd || map->buf != buf) 9446fa1683a7e3 Abel Vesa 2022-11-24 380 continue; 9446fa1683a7e3 Abel Vesa 2022-11-24 381 9446fa1683a7e3 Abel Vesa 2022-11-24 382 *ppmap = map; 9446fa1683a7e3 Abel Vesa 2022-11-24 383 ret = 0; 9446fa1683a7e3 Abel Vesa 2022-11-24 384 break; c68cfb718c8f97 Srinivas Kandagatla 2019-02-08 385 } 9446fa1683a7e3 Abel Vesa 2022-11-24 386 spin_unlock(&fl->lock); 8f6c1d8c4f0cc3 Vamsi Krishna Gattupalli 2022-02-14 387 8f6c1d8c4f0cc3 Vamsi Krishna Gattupalli 2022-02-14 388 return ret; 8f6c1d8c4f0cc3 Vamsi Krishna Gattupalli 2022-02-14 389 } 8f6c1d8c4f0cc3 Vamsi Krishna Gattupalli 2022-02-14 390 -- 0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki

1 year

Re: [PATCH v1 00/10] vfio/pci: Allow MMIO regions to be exported through dma-buf

by Leon Romanovsky

On Mon, Aug 04, 2025 at 10:10:32AM -0400, Benjamin LaHaise wrote: > FYI: this entire patch series was rejected as spam by large numbers of > linux-mm subscribers using @gmail.com email addresses. Thanks for the heads-up. Are you aware of any issues from my side? I'm sending patches with git-send-email through mail.kernel.org SMTP. Thanks > > -ben (owner-linux-mm)

1 year

[PATCH 00/10] vfio/pci: Allow MMIO regions to be exported through dma-buf

by Leon Romanovsky

From: Leon Romanovsky <leonro(a)nvidia.com> --------------------------------------------------------------------------- Based on blk and DMA patches which will be sent during coming merge window. --------------------------------------------------------------------------- This series extends the VFIO PCI subsystem to support exporting MMIO regions from PCI device BARs as dma-buf objects, enabling safe sharing of non-struct page memory with controlled lifetime management. This allows RDMA and other subsystems to import dma-buf FDs and build them into memory regions for PCI P2P operations. The series supports a use case for SPDK where a NVMe device will be owned by SPDK through VFIO but interacting with a RDMA device. The RDMA device may directly access the NVMe CMB or directly manipulate the NVMe device's doorbell using PCI P2P. However, as a general mechanism, it can support many other scenarios with VFIO. This dmabuf approach can be usable by iommufd as well for generic and safe P2P mappings. In addition to the SPDK use-case mentioned above, the capability added in this patch series can also be useful when a buffer (located in device memory such as VRAM) needs to be shared between any two dGPU devices or instances (assuming one of them is bound to VFIO PCI) as long as they are P2P DMA compatible. The implementation provides a revocable attachment mechanism using dma-buf move operations. MMIO regions are normally pinned as BARs don't change physical addresses, but access is revoked when the VFIO device is closed or a PCI reset is issued. This ensures kernel self-defense against potentially hostile userspace. The series includes significant refactoring of the PCI P2PDMA subsystem to separate core P2P functionality from memory allocation features, making it more modular and suitable for VFIO use cases that don't need struct page support. ----------------------------------------------------------------------- This is based on https://lore.kernel.org/all/20250307052248.405803-1-vivek.kasireddy@intel.c… but heavily rewritten to be based on DMA physical API. ----------------------------------------------------------------------- The WIP branch can be found here: https://git.kernel.org/pub/scm/linux/kernel/git/leon/linux-rdma.git/log/?h=… Thanks Leon Romanovsky (8): PCI/P2PDMA: Remove redundant bus_offset from map state PCI/P2PDMA: Introduce p2pdma_provider structure for cleaner abstraction PCI/P2PDMA: Simplify bus address mapping API PCI/P2PDMA: Refactor to separate core P2P functionality from memory allocation PCI/P2PDMA: Export pci_p2pdma_map_type() function types: move phys_vec definition to common header vfio/pci: Enable peer-to-peer DMA transactions by default vfio/pci: Add dma-buf export support for MMIO regions Vivek Kasireddy (2): vfio: Export vfio device get and put registration helpers vfio/pci: Share the core device pointer while invoking feature functions block/blk-mq-dma.c | 7 +- drivers/iommu/dma-iommu.c | 4 +- drivers/pci/p2pdma.c | 144 +++++++++---- drivers/vfio/pci/Kconfig | 20 ++ drivers/vfio/pci/Makefile | 2 + drivers/vfio/pci/vfio_pci_config.c | 22 +- drivers/vfio/pci/vfio_pci_core.c | 59 ++++-- drivers/vfio/pci/vfio_pci_dmabuf.c | 321 +++++++++++++++++++++++++++++ drivers/vfio/pci/vfio_pci_priv.h | 23 +++ drivers/vfio/vfio_main.c | 2 + include/linux/dma-buf.h | 1 + include/linux/pci-p2pdma.h | 114 +++++----- include/linux/types.h | 5 + include/linux/vfio.h | 2 + include/linux/vfio_pci_core.h | 4 + include/uapi/linux/vfio.h | 19 ++ kernel/dma/direct.c | 4 +- mm/hmm.c | 2 +- 18 files changed, 631 insertions(+), 124 deletions(-) create mode 100644 drivers/vfio/pci/vfio_pci_dmabuf.c -- 2.50.1

1 year

Re: [PATCH 05/10] PCI/P2PDMA: Export pci_p2pdma_map_type() function

by Leon Romanovsky

1 year

Re: [PATCH 05/10] PCI/P2PDMA: Export pci_p2pdma_map_type() function

by Jason Gunthorpe

On Tue, Jul 29, 2025 at 02:54:13PM -0600, Logan Gunthorpe wrote: > > > On 2025-07-28 17:11, Jason Gunthorpe wrote: > >> If the dma mapping for P2P memory doesn't need to create an iommu > >> mapping then that's fine. But it should be the dma-iommu layer to decide > >> that. > > > > So above, we can't use dma-iommu.c, it might not be compiled into the > > kernel but the dma_map_phys() path is still valid. > > This is an easily solved problem. I did a very rough sketch below to say > it's really not that hard. (Note it has some rough edges that could be > cleaned up and I based it off Leon's git repo which appears to not be > the same as what was posted, but the core concept is sound). I did hope for something like this in the early days, but it proved not so easy to get agreements on details :( My feeling was we should get some actual examples of using this thing and then it is far easier to discuss ideas, like yours here, to improve it. Many of the discussions kind of got confused without enough actual usering code for everyone to refer to. For instance the nvme use case is a big driver for the API design, and it is quite different from these simpler flows, this idea needs to see how it would work there. Maybe this idea could also have provider = NULL meaning it is CPU cachable memory? > +static inline void dma_iova_try_alloc_p2p(struct p2pdma_provider *provider, > + struct device *dev, struct dma_iova_state *state, phys_addr_t phys, > + size_t size) > +{ > +} Can't be empty - PCI_P2PDMA_MAP_THRU_HOST_BRIDGE vs PCI_P2PDMA_MAP_BUS_ADDR still matters so it still must set dma_iova_state::bus_addr to get dma_map_phys_prealloc() to do the right thing. Still, it would make sense to put something like that in dma/mapping.c and rely on the static inline stub for dma_iova_try_alloc().. > for (i = 0; i < priv->nr_ranges; i++) { > - if (!state) { > - addr = pci_p2pdma_bus_addr_map(provider, > - phys_vec[i].paddr); > - } else if (dma_use_iova(state)) { > - ret = dma_iova_link(attachment->dev, state, > - phys_vec[i].paddr, 0, > - phys_vec[i].len, dir, attrs); > - if (ret) > - goto err_unmap_dma; > - > - mapped_len += phys_vec[i].len; > - } else { > - addr = dma_map_phys(attachment->dev, phys_vec[i].paddr, > - phys_vec[i].len, dir, attrs); > - ret = dma_mapping_error(attachment->dev, addr); > - if (ret) > - goto err_unmap_dma; > - } > + addr = dma_map_phys_prealloc(attachment->dev, phys_vec[i].paddr, > + phys_vec[i].len, dir, attrs, state, > + provider); There was a draft of something like this at some point. The DMA_MAPPING_USE_IOVA is a new twist though > #define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1)) > struct dma_iova_state { > dma_addr_t addr; > u64 __size; > + bool bus_addr; > }; Gowing this structure has been strongly pushed back on. This probably can be solved in some other way, a bitfield on size perhaps.. > +dma_addr_t dma_map_phys_prealloc(struct device *dev, phys_addr_t phys, > size_t size, > + enum dma_data_direction dir, unsigned long attrs, > + struct dma_iova_state *state, struct p2pdma_provider *provider) > +{ > + int ret; > + > + if (state->bus_addr) > + return pci_p2pdma_bus_addr_map(provider, phys); > + > + if (dma_use_iova(state)) { > + ret = dma_iova_link(dev, state, phys, 0, size, dir, attrs); > + if (ret) > + return DMA_MAPPING_ERROR; > + > + return DMA_MAPPING_USE_IOVA; > + } > + > + return dma_map_phys(dev, phys, size, dir, attrs); > +} > +EXPORT_SYMBOL_GPL(dma_map_phys_prealloc); I would be tempted to inline this Overall, yeah I would certainly welcome improvements like this if everyone can agree, but I'd really like to see nvme merged before we start working on ideas. That way the proposal can be properly evaluated by all the stake holders. Jason

1 year

Re: [PATCH 05/10] PCI/P2PDMA: Export pci_p2pdma_map_type() function

by Jason Gunthorpe

On Mon, Jul 28, 2025 at 11:07:34AM -0600, Logan Gunthorpe wrote: > > > On 2025-07-28 10:41, Leon Romanovsky wrote: > > On Mon, Jul 28, 2025 at 10:12:31AM -0600, Logan Gunthorpe wrote: > >> > >> > >> On 2025-07-27 13:05, Jason Gunthorpe wrote: > >>> On Fri, Jul 25, 2025 at 10:30:46AM -0600, Logan Gunthorpe wrote: > >>>> > >>>> > >>>> On 2025-07-24 02:13, Leon Romanovsky wrote: > >>>>> On Thu, Jul 24, 2025 at 10:03:13AM +0200, Christoph Hellwig wrote: > >>>>>> On Wed, Jul 23, 2025 at 04:00:06PM +0300, Leon Romanovsky wrote: > >>>>>>> From: Leon Romanovsky <leonro(a)nvidia.com> > >>>>>>> > >>>>>>> Export the pci_p2pdma_map_type() function to allow external modules > >>>>>>> and subsystems to determine the appropriate mapping type for P2PDMA > >>>>>>> transfers between a provider and target device. > >>>>>> > >>>>>> External modules have no business doing this. > >>>>> > >>>>> VFIO PCI code is built as module. There is no way to access PCI p2p code > >>>>> without exporting functions in it. > >>>> > >>>> The solution that would make more sense to me would be for either > >>>> dma_iova_try_alloc() or another helper in dma-iommu.c to handle the > >>>> P2PDMA case. > >>> > >>> This has nothing to do with dma-iommu.c, the decisions here still need > >>> to be made even if dma-iommu.c is not compiled in. > >> > >> Doesn't it though? Every single call in patch 10 to the newly exported > >> PCI functions calls into the the dma-iommu functions. Patch 10 has lots of flows, only one will end up in dma-iommu.c vfio_pci_dma_buf_map() calls pci_p2pdma_bus_addr_map(), dma_iova_link(), dma_map_phys(). Only iova_link would call to dma-iommu.c - if dma_map_phys() is called we know that dma-iommu.c won't be called by it. > >> If there were non-iommu paths then I would expect the code would > >> use the regular DMA api directly which would then call in to > >> dma-iommu. > > > > If p2p type is PCI_P2PDMA_MAP_BUS_ADDR, there will no dma-iommu and DMA > > at all. > > I understand that and it is completely beside my point. > > If the dma mapping for P2P memory doesn't need to create an iommu > mapping then that's fine. But it should be the dma-iommu layer to decide > that. So above, we can't use dma-iommu.c, it might not be compiled into the kernel but the dma_map_phys() path is still valid. > It's not a decision that should be made by every driver doing this > kind of thing. Sort of, I think we are trying to get to some place where there are subsystem, or at least data structure specific helpers that do this (ie nvme has BIO helpers), but the helpers should be running this logic directly for performance. Leon hasn't done it but I think we should see helpers for DMABUF too encapsulating the logic shown in patch 10. I think we need to prove it out these basic points first before trying to go and convert a bunch of GPU drivers. The vfio in patch 10 is not the full example since it only has a single scatter/gather" effectively, but the generalized version loops over pci_p2pdma_bus_addr_map(), dma_iova_link(), dma_map_phys() for each page. Part of the new API design is to only do one kind of mapping operation at once, and part of the design is we know that the P2P type is fixed. It makes no performance sense to check the type inside the pci_p2pdma_bus_addr_map()/ dma_iova_link()/dma_map_phys() within the per-page loop. I do think some level of abstraction has been lost here in pursuit of performance. If someone does have a better way to structure this without a performance hit then fantastic, but thats going back and revising the new DMA API. This just builds on top of that, and yes, it is not so abstract. Jason

1 year

Re: [PATCH 05/10] PCI/P2PDMA: Export pci_p2pdma_map_type() function

by Leon Romanovsky

On Mon, Jul 28, 2025 at 10:12:31AM -0600, Logan Gunthorpe wrote: > > > On 2025-07-27 13:05, Jason Gunthorpe wrote: > > On Fri, Jul 25, 2025 at 10:30:46AM -0600, Logan Gunthorpe wrote: > >> > >> > >> On 2025-07-24 02:13, Leon Romanovsky wrote: > >>> On Thu, Jul 24, 2025 at 10:03:13AM +0200, Christoph Hellwig wrote: > >>>> On Wed, Jul 23, 2025 at 04:00:06PM +0300, Leon Romanovsky wrote: > >>>>> From: Leon Romanovsky <leonro(a)nvidia.com> > >>>>> > >>>>> Export the pci_p2pdma_map_type() function to allow external modules > >>>>> and subsystems to determine the appropriate mapping type for P2PDMA > >>>>> transfers between a provider and target device. > >>>> > >>>> External modules have no business doing this. > >>> > >>> VFIO PCI code is built as module. There is no way to access PCI p2p code > >>> without exporting functions in it. > >> > >> The solution that would make more sense to me would be for either > >> dma_iova_try_alloc() or another helper in dma-iommu.c to handle the > >> P2PDMA case. > > > > This has nothing to do with dma-iommu.c, the decisions here still need > > to be made even if dma-iommu.c is not compiled in. > > Doesn't it though? Every single call in patch 10 to the newly exported > PCI functions calls into the the dma-iommu functions. If there were > non-iommu paths then I would expect the code would use the regular DMA > api directly which would then call in to dma-iommu. If p2p type is PCI_P2PDMA_MAP_BUS_ADDR, there will no dma-iommu and DMA at all. +static int vfio_pci_dma_buf_attach(struct dma_buf *dmabuf, + struct dma_buf_attachment *attachment) +{ + struct vfio_pci_dma_buf *priv = dmabuf->priv; + + if (!attachment->peer2peer) + return -EOPNOTSUPP; + + if (priv->revoked) + return -ENODEV; + + switch (pci_p2pdma_map_type(priv->vdev->provider, attachment->dev)) { + case PCI_P2PDMA_MAP_THRU_HOST_BRIDGE: + break; + case PCI_P2PDMA_MAP_BUS_ADDR: + /* + * There is no need in IOVA at all for this flow. + * We rely on attachment->priv == NULL as a marker + * for this mode. + */ + return 0; + default: + return -EINVAL; + } + + attachment->priv = kzalloc(sizeof(struct dma_iova_state), GFP_KERNEL); + if (!attachment->priv) + return -ENOMEM; + + dma_iova_try_alloc(attachment->dev, attachment->priv, 0, priv->phys_vec.len); + return 0; +}

1 year

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