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[PATCH v6 0/2] accel: Add Arm Ethos-U NPU

by Rob Herring (Arm)

The Arm Ethos-U65/85 NPUs are designed for edge AI inference applications[0]. The driver works with Mesa Teflon. The Ethos support was merged on 10/15. The UAPI should also be compatible with the downstream (open source) driver stack[2] and Vela compiler though that has not been implemented. Testing so far has been on i.MX93 boards with Ethos-U65 and a FVP model with Ethos-U85. More work is needed in mesa for handling U85 command stream differences, but that doesn't affect the UAPI. A git tree is here[3]. Rob [0] https://www.arm.com/products/silicon-ip-cpu?families=ethos%20npus [2] https://gitlab.arm.com/artificial-intelligence/ethos-u/ [3] git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git ethos-v6 Signed-off-by: Rob Herring (Arm) <robh(a)kernel.org> --- Changes in v6: - Rework job submit to avoid potential deadlocks with allocations/reclaim in the fence signaling paths. ethosu_acquire_object_fences() and the job done_fence allocation are moved earlier. The runtime-pm resume now before the job is pushed and autosuspend is done when the job is freed. - Drop unused ethosu_job_is_idle() - Link to v5: https://lore.kernel.org/r/20251016-ethos-v5-0-ba0aece0a006@kernel.org Changes in v5: - Rework Runtime PM init in probe - Use __free() cleanups where possible - Use devm_mutex_init() - Handle U85 NPU_SET_WEIGHT2_BASE and NPU_SET_WEIGHT2_LENGTH - Link to v4: https://lore.kernel.org/r/20251015-ethos-v4-0-81025a3dcbf3@kernel.org Changes in v4: - Use bulk clk API - Various whitespace fixes mostly due to ethos->ethosu rename - Drop error check on dma_set_mask_and_coherent() - Drop unnecessary pm_runtime_mark_last_busy() call - Move variable declarations out of switch (a riscv/clang build failure) - Use lowercase hex in all defines - Drop unused ethosu_device.coherent member - Add comments on all locks - Link to v3: https://lore.kernel.org/r/20250926-ethos-v3-0-6bd24373e4f5@kernel.org Changes in v3: - Rework and improve job submit validation - Rename ethos to ethosu. There was an Ethos-Nxx that's unrelated. - Add missing init for sched_lock mutex - Drop some prints to debug level - Fix i.MX93 SRAM accesses (AXI config) - Add U85 AXI configuration and test on FVP with U85 - Print the current cmd value on timeout - Link to v2: https://lore.kernel.org/r/20250811-ethos-v2-0-a219fc52a95b@kernel.org Changes in v2: - Rebase on v6.17-rc1 adapting to scheduler changes - scheduler: Drop the reset workqueue. According to the scheduler docs, we don't need it since we have a single h/w queue. - scheduler: Rework the timeout handling to continue running if we are making progress. Fixes timeouts on larger jobs. - Reset the NPU on resume so it's in a known state - Add error handling on clk_get() calls - Fix drm_mm splat on module unload. We were missing a put on the cmdstream BO in the scheduler clean-up. - Fix 0-day report needing explicit bitfield.h include - Link to v1: https://lore.kernel.org/r/20250722-ethos-v1-0-cc1c5a0cbbfb@kernel.org --- Rob Herring (Arm) (2): dt-bindings: npu: Add Arm Ethos-U65/U85 accel: Add Arm Ethos-U NPU driver .../devicetree/bindings/npu/arm,ethos.yaml | 79 +++ MAINTAINERS | 9 + drivers/accel/Kconfig | 1 + drivers/accel/Makefile | 1 + drivers/accel/ethosu/Kconfig | 10 + drivers/accel/ethosu/Makefile | 4 + drivers/accel/ethosu/ethosu_device.h | 195 ++++++ drivers/accel/ethosu/ethosu_drv.c | 403 ++++++++++++ drivers/accel/ethosu/ethosu_drv.h | 15 + drivers/accel/ethosu/ethosu_gem.c | 704 +++++++++++++++++++++ drivers/accel/ethosu/ethosu_gem.h | 46 ++ drivers/accel/ethosu/ethosu_job.c | 496 +++++++++++++++ drivers/accel/ethosu/ethosu_job.h | 40 ++ include/uapi/drm/ethosu_accel.h | 261 ++++++++ 14 files changed, 2264 insertions(+) --- base-commit: 3a8660878839faadb4f1a6dd72c3179c1df56787 change-id: 20250715-ethos-3fdd39ef6f19 Best regards, -- Rob Herring (Arm) <robh(a)kernel.org>

4 months, 1 week

Re: [RFC 1/8] dma-buf: Add support for map/unmap APIs for interconnects

by Thomas Hellström

Hi, Vivek, On Tue, 2025-10-14 at 00:08 -0700, Vivek Kasireddy wrote: > For the map operation, the dma-buf core will create an xarray but > the exporter is expected to populate it with the interconnect > specific addresses. And, similarly for unmap, the exporter is > expected to cleanup the individual entries of the xarray. > > Cc: Jason Gunthorpe <jgg(a)nvidia.com> > Cc: Christian Koenig <christian.koenig(a)amd.com> > Cc: Sumit Semwal <sumit.semwal(a)linaro.org> > Cc: Thomas Hellström <thomas.hellstrom(a)linux.intel.com> > Cc: Simona Vetter <simona.vetter(a)ffwll.ch> > Signed-off-by: Vivek Kasireddy <vivek.kasireddy(a)intel.com> > --- > drivers/dma-buf/dma-buf.c | 68 > ++++++++++++++++++++++++++++ > include/linux/dma-buf-interconnect.h | 29 ++++++++++++ > include/linux/dma-buf.h | 11 +++++ > 3 files changed, 108 insertions(+) > create mode 100644 include/linux/dma-buf-interconnect.h > > diff --git a/drivers/dma-buf/dma-buf.c b/drivers/dma-buf/dma-buf.c > index 2bcf9ceca997..162642bd53e8 100644 > --- a/drivers/dma-buf/dma-buf.c > +++ b/drivers/dma-buf/dma-buf.c > @@ -1612,6 +1612,74 @@ void dma_buf_vunmap_unlocked(struct dma_buf > *dmabuf, struct iosys_map *map) > } > EXPORT_SYMBOL_NS_GPL(dma_buf_vunmap_unlocked, "DMA_BUF"); > > +struct dma_buf_ranges * > +dma_buf_map_interconnect(struct dma_buf_attachment *attach) Even if this is an RFC, please add kerneldoc so that the way the interface is intended to be used becomes completely clear. Both for functions and structs. > +{ > + const struct dma_buf_interconnect_ops *ic_ops; > + struct dma_buf *dmabuf = attach->dmabuf; > + struct dma_buf_ranges *ranges; > + int ret; > + > + might_sleep(); > + > + if (WARN_ON(!attach || !attach->dmabuf)) > + return ERR_PTR(-EINVAL); > + > + if (!dma_buf_attachment_is_dynamic(attach)) > + return ERR_PTR(-EINVAL); > + > + if (!attach->allow_ic) > + return ERR_PTR(-EOPNOTSUPP); > + > + dma_resv_assert_held(attach->dmabuf->resv); > + > + ic_ops = dmabuf->ops->interconnect_ops; > + if (!ic_ops || !ic_ops->map_interconnect) > + return ERR_PTR(-EINVAL); > + > + ranges = kzalloc(sizeof(*ranges), GFP_KERNEL); > + if (!ranges) > + return ERR_PTR(-ENOMEM); > + > + xa_init(&ranges->ranges); > + ret = ic_ops->map_interconnect(attach, ranges); > + if (ret) > + goto err_free_ranges; > + > + return ranges; > + > +err_free_ranges: > + xa_destroy(&ranges->ranges); > + kfree(ranges); > + return ERR_PTR(ret); > +} > +EXPORT_SYMBOL_NS_GPL(dma_buf_map_interconnect, "DMA_BUF"); > + > +void dma_buf_unmap_interconnect(struct dma_buf_attachment *attach, > + struct dma_buf_ranges *ranges) > +{ > + const struct dma_buf_interconnect_ops *ic_ops; > + struct dma_buf *dmabuf = attach->dmabuf; > + > + if (WARN_ON(!attach || !attach->dmabuf || !ranges)) > + return; > + > + if (!attach->allow_ic) > + return; > + > + ic_ops = dmabuf->ops->interconnect_ops; > + if (!ic_ops || !ic_ops->unmap_interconnect) > + return; > + > + dma_resv_assert_held(attach->dmabuf->resv); > + > + ic_ops->unmap_interconnect(attach, ranges); > + > + xa_destroy(&ranges->ranges); > + kfree(ranges); > +} > +EXPORT_SYMBOL_NS_GPL(dma_buf_unmap_interconnect, "DMA_BUF"); > + > #ifdef CONFIG_DEBUG_FS > static int dma_buf_debug_show(struct seq_file *s, void *unused) > { > diff --git a/include/linux/dma-buf-interconnect.h > b/include/linux/dma-buf-interconnect.h > new file mode 100644 > index 000000000000..17504dea9691 > --- /dev/null > +++ b/include/linux/dma-buf-interconnect.h > @@ -0,0 +1,29 @@ > +/* SPDX-License-Identifier: MIT */ > + > +#ifndef __DMA_BUF_INTERCONNECT_H__ > +#define __DMA_BUF_INTERCONNECT_H__ > + > +#include <linux/xarray.h> > + > +struct dma_buf_attachment; > + > +struct dma_buf_ranges { > + struct xarray ranges; > + unsigned int nranges; IIUC this would replace the sg-table right? I guess Jason or Christian would need to comment on whether this is generic enough or whether it needs to be interconnect-dependent. > +}; > + > +enum dma_buf_interconnect_type { > + DMA_BUF_INTERCONNECT_NONE = 0, > +}; This calls for registering all known interconnects with the dma-buf layer even if the interconnects are completely driver-private. I'd suggest using a pointer to identify interconnect and whatever entity defines the interconnect provides a unique pointer. For globally visible interconnects this could be done in dma-buf.c or a dma-buf- interconnect.c > + > +struct dma_buf_interconnect { > + enum dma_buf_interconnect_type type; > +}; > + > +struct dma_buf_interconnect_ops { > + int (*map_interconnect)(struct dma_buf_attachment *attach, > + struct dma_buf_ranges *ranges); > + void (*unmap_interconnect)(struct dma_buf_attachment > *attach, > + struct dma_buf_ranges *ranges); > +}; > +#endif > diff --git a/include/linux/dma-buf.h b/include/linux/dma-buf.h > index d58e329ac0e7..db91c67c00d6 100644 > --- a/include/linux/dma-buf.h > +++ b/include/linux/dma-buf.h > @@ -23,6 +23,8 @@ > #include <linux/dma-fence.h> > #include <linux/wait.h> > > +#include <linux/dma-buf-interconnect.h> > + > struct device; > struct dma_buf; > struct dma_buf_attachment; > @@ -276,6 +278,8 @@ struct dma_buf_ops { > > int (*vmap)(struct dma_buf *dmabuf, struct iosys_map *map); > void (*vunmap)(struct dma_buf *dmabuf, struct iosys_map > *map); > + > + const struct dma_buf_interconnect_ops *interconnect_ops; > }; > > /** > @@ -502,7 +506,9 @@ struct dma_buf_attachment { > struct device *dev; > struct list_head node; > bool peer2peer; > + bool allow_ic; > const struct dma_buf_attach_ops *importer_ops; > + struct dma_buf_interconnect interconnect; Hmm. Could we have a pointer to the interconnect here? Let's say the interconnect implementation would want to subclass with additional information? > void *importer_priv; > void *priv; > }; > @@ -589,6 +595,11 @@ struct sg_table *dma_buf_map_attachment(struct > dma_buf_attachment *, > enum dma_data_direction); > void dma_buf_unmap_attachment(struct dma_buf_attachment *, struct > sg_table *, > enum dma_data_direction); > + > +struct dma_buf_ranges *dma_buf_map_interconnect(struct > dma_buf_attachment *); > +void dma_buf_unmap_interconnect(struct dma_buf_attachment *, > + struct dma_buf_ranges *); > + > void dma_buf_move_notify(struct dma_buf *dma_buf); > int dma_buf_begin_cpu_access(struct dma_buf *dma_buf, > enum dma_data_direction dir); Thanks, Thomas

4 months, 1 week

[PATCH v8 0/5] dma-buf: heaps: Create a CMA heap for each CMA reserved region

by Maxime Ripard

Hi, Here's another attempt at supporting user-space allocations from a specific carved-out reserved memory region. The initial problem we were discussing was that I'm currently working on a platform which has a memory layout with ECC enabled. However, enabling the ECC has a number of drawbacks on that platform: lower performance, increased memory usage, etc. So for things like framebuffers, the trade-off isn't great and thus there's a memory region with ECC disabled to allocate from for such use cases. After a suggestion from John, I chose to first start using heap allocations flags to allow for userspace to ask for a particular ECC setup. This is then backed by a new heap type that runs from reserved memory chunks flagged as such, and the existing DT properties to specify the ECC properties. After further discussion, it was considered that flags were not the right solution, and relying on the names of the heaps would be enough to let userspace know the kind of buffer it deals with. Thus, even though the uAPI part of it had been dropped in this second version, we still needed a driver to create heaps out of carved-out memory regions. In addition to the original usecase, a similar driver can be found in BSPs from most vendors, so I believe it would be a useful addition to the kernel. Some extra discussion with Rob Herring [1] came to the conclusion that some specific compatible for this is not great either, and as such an new driver probably isn't called for either. Some other discussions we had with John [2] also dropped some hints that multiple CMA heaps might be a good idea, and some vendors seem to do that too. So here's another attempt that doesn't affect the device tree at all and will just create a heap for every CMA reserved memory region. It also falls nicely into the current plan we have to support cgroups in DRM/KMS and v4l2, which is an additional benefit. Let me know what you think, Maxime 1: https://lore.kernel.org/all/20250707-cobalt-dingo-of-serenity-dbf92c@houat/ 2: https://lore.kernel.org/all/CANDhNCroe6ZBtN_o=c71kzFFaWK-fF5rCdnr9P5h1sgPOW… Let me know what you think, Maxime Signed-off-by: Maxime Ripard <mripard(a)kernel.org> --- Changes in v8: - Rebased on top of 6.18-rc1 - Added TJ R-b - Link to v7: https://lore.kernel.org/r/20250721-dma-buf-ecc-heap-v7-0-031836e1a942@kerne… Changes in v7: - Invert the logic and register CMA heap from the reserved memory / dma contiguous code, instead of iterating over them from the CMA heap. - Link to v6: https://lore.kernel.org/r/20250709-dma-buf-ecc-heap-v6-0-dac9bf80f35d@kerne… Changes in v6: - Drop the new driver and allocate a CMA heap for each region now - Dropped the binding - Rebased on 6.16-rc5 - Link to v5: https://lore.kernel.org/r/20250617-dma-buf-ecc-heap-v5-0-0abdc5863a4f@kerne… Changes in v5: - Rebased on 6.16-rc2 - Switch from property to dedicated binding - Link to v4: https://lore.kernel.org/r/20250520-dma-buf-ecc-heap-v4-1-bd2e1f1bb42c@kerne… Changes in v4: - Rebased on 6.15-rc7 - Map buffers only when map is actually called, not at allocation time - Deal with restricted-dma-pool and shared-dma-pool - Reword Kconfig options - Properly report dma_map_sgtable failures - Link to v3: https://lore.kernel.org/r/20250407-dma-buf-ecc-heap-v3-0-97cdd36a5f29@kerne… Changes in v3: - Reworked global variable patch - Link to v2: https://lore.kernel.org/r/20250401-dma-buf-ecc-heap-v2-0-043fd006a1af@kerne… Changes in v2: - Add vmap/vunmap operations - Drop ECC flags uapi - Rebase on top of 6.14 - Link to v1: https://lore.kernel.org/r/20240515-dma-buf-ecc-heap-v1-0-54cbbd049511@kerne… --- Maxime Ripard (5): doc: dma-buf: List the heaps by name dma-buf: heaps: cma: Register list of CMA regions at boot dma: contiguous: Register reusable CMA regions at boot dma: contiguous: Reserve default CMA heap dma-buf: heaps: cma: Create CMA heap for each CMA reserved region Documentation/userspace-api/dma-buf-heaps.rst | 24 ++++++++------ MAINTAINERS | 1 + drivers/dma-buf/heaps/Kconfig | 10 ------ drivers/dma-buf/heaps/cma_heap.c | 47 +++++++++++++++++---------- include/linux/dma-buf/heaps/cma.h | 16 +++++++++ kernel/dma/contiguous.c | 11 +++++++ 6 files changed, 72 insertions(+), 37 deletions(-) --- base-commit: 47633099a672fc7bfe604ef454e4f116e2c954b1 change-id: 20240515-dma-buf-ecc-heap-28a311d2c94e prerequisite-message-id: <20250610131231.1724627-1-jkangas(a)redhat.com> prerequisite-patch-id: bc44be5968feb187f2bc1b8074af7209462b18e7 prerequisite-patch-id: f02a91b723e5ec01fbfedf3c3905218b43d432da prerequisite-patch-id: e944d0a3e22f2cdf4d3b3906e5603af934696deb Best regards, -- Maxime Ripard <mripard(a)kernel.org>

4 months, 1 week

Re: [PATCH v5 2/2] accel: Add Arm Ethos-U NPU driver

by Rob Herring

On Thu, Oct 16, 2025 at 11:25:34PM -0700, Matthew Brost wrote: > On Thu, Oct 16, 2025 at 04:06:05PM -0500, Rob Herring (Arm) wrote: > > Add a driver for Arm Ethos-U65/U85 NPUs. The Ethos-U NPU has a > > relatively simple interface with single command stream to describe > > buffers, operation settings, and network operations. It supports up to 8 > > memory regions (though no h/w bounds on a region). The Ethos NPUs > > are designed to use an SRAM for scratch memory. Region 2 is reserved > > for SRAM (like the downstream driver stack and compiler). Userspace > > doesn't need access to the SRAM. Thanks for the review. [...] > > +static struct dma_fence *ethosu_job_run(struct drm_sched_job *sched_job) > > +{ > > + struct ethosu_job *job = to_ethosu_job(sched_job); > > + struct ethosu_device *dev = job->dev; > > + struct dma_fence *fence = NULL; > > + int ret; > > + > > + if (unlikely(job->base.s_fence->finished.error)) > > + return NULL; > > + > > + fence = ethosu_fence_create(dev); > > Another reclaim issue: ethosu_fence_create allocates memory using > GFP_KERNEL. Since we're already in the DMA fence signaling path > (reclaim), this can lead to a deadlock. > > Without too much thought, you likely want to move this allocation to > ethosu_job_do_push, but before taking dev->sched_lock or calling > drm_sched_job_arm. > > We really should fix the DRM scheduler work queue to be tainted with > reclaim. If I recall correctly, we'd need to update the work queue > layer. Let me look into that—I've seen this type of bug several times, > and lockdep should be able to catch it. Likely the rocket driver suffers from the same issues... > > > + if (IS_ERR(fence)) > > + return fence; > > + > > + if (job->done_fence) > > + dma_fence_put(job->done_fence); > > + job->done_fence = dma_fence_get(fence); > > + > > + ret = pm_runtime_get_sync(dev->base.dev); > > I haven't looked at your PM design, but this generally looks quite > dangerous with respect to reclaim. For example, if your PM resume paths > allocate memory or take locks that allocate memory underneath, you're > likely to run into issues. > > A better approach would be to attach a PM reference to your job upon > creation and release it upon job destruction. That would be safer and > save you headaches in the long run. Our PM is nothing more than clock enable/disable and register init. If the runtime PM API doesn't work and needs special driver wrappers, then I'm inclined to just not use it and manage clocks directly (as that's all it is doing). > > This is what we do in Xe [1] [2]. > > Also, in general, this driver has been reviewed (RB’d), but it's not > great that I spotted numerous issues within just five minutes. I suggest > taking a step back and thoroughly evaluating everything this driver is > doing. Well, if it is hard to get simple drivers right, then it's a problem with the subsystem APIs IMO. Rob

4 months, 2 weeks

[PATCH v4 4/9] rust: drm: gem: Add raw_dma_resv() function

by Lyude Paul

For retrieving a pointer to the struct dma_resv for a given GEM object. We also introduce it in a new trait, BaseObjectPrivate, which we automatically implement for all gem objects and don't expose to users outside of the crate. Signed-off-by: Lyude Paul <lyude(a)redhat.com> --- rust/kernel/drm/gem/mod.rs | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/rust/kernel/drm/gem/mod.rs b/rust/kernel/drm/gem/mod.rs index 981fbb931e952..760fcd61da0b7 100644 --- a/rust/kernel/drm/gem/mod.rs +++ b/rust/kernel/drm/gem/mod.rs @@ -199,6 +199,18 @@ fn create_mmap_offset(&self) -> Result<u64> { impl<T: IntoGEMObject> BaseObject for T {} +/// Crate-private base operations shared by all GEM object classes. +#[expect(unused)] +pub(crate) trait BaseObjectPrivate: IntoGEMObject { + /// Return a pointer to this object's dma_resv. + fn raw_dma_resv(&self) -> *mut bindings::dma_resv { + // SAFETY: `as_gem_obj()` always returns a valid pointer to the base DRM gem object + unsafe { (*self.as_raw()).resv } + } +} + +impl<T: IntoGEMObject> BaseObjectPrivate for T {} + /// A base GEM object. /// /// Invariants -- 2.51.0

4 months, 2 weeks

[PATCH v4 3/9] rust: helpers: Add bindings/wrappers for dma_resv_lock

by Lyude Paul

From: Asahi Lina <lina(a)asahilina.net> This is just for basic usage in the DRM shmem abstractions for implied locking, not intended as a full DMA Reservation abstraction yet. Signed-off-by: Asahi Lina <lina(a)asahilina.net> Signed-off-by: Daniel Almeida <daniel.almeida(a)collabora.com> Signed-off-by: Lyude Paul <lyude(a)redhat.com> --- rust/bindings/bindings_helper.h | 1 + rust/helpers/dma-resv.c | 13 +++++++++++++ rust/helpers/helpers.c | 1 + 3 files changed, 15 insertions(+) create mode 100644 rust/helpers/dma-resv.c diff --git a/rust/bindings/bindings_helper.h b/rust/bindings/bindings_helper.h index 2e43c66635a2c..07f79e125c329 100644 --- a/rust/bindings/bindings_helper.h +++ b/rust/bindings/bindings_helper.h @@ -48,6 +48,7 @@ #include <linux/cpumask.h> #include <linux/cred.h> #include <linux/debugfs.h> +#include <linux/dma-resv.h> #include <linux/device/faux.h> #include <linux/dma-direction.h> #include <linux/dma-mapping.h> diff --git a/rust/helpers/dma-resv.c b/rust/helpers/dma-resv.c new file mode 100644 index 0000000000000..05501cb814513 --- /dev/null +++ b/rust/helpers/dma-resv.c @@ -0,0 +1,13 @@ +// SPDX-License-Identifier: GPL-2.0 + +#include <linux/dma-resv.h> + +int rust_helper_dma_resv_lock(struct dma_resv *obj, struct ww_acquire_ctx *ctx) +{ + return dma_resv_lock(obj, ctx); +} + +void rust_helper_dma_resv_unlock(struct dma_resv *obj) +{ + dma_resv_unlock(obj); +} diff --git a/rust/helpers/helpers.c b/rust/helpers/helpers.c index 551da6c9b5064..36d40f911345c 100644 --- a/rust/helpers/helpers.c +++ b/rust/helpers/helpers.c @@ -25,6 +25,7 @@ #include "cred.c" #include "device.c" #include "dma.c" +#include "dma-resv.c" #include "drm.c" #include "err.c" #include "irq.c" -- 2.51.0

4 months, 2 weeks

[PATCH v5 0/2] accel: Add Arm Ethos-U NPU

by Rob Herring (Arm)

The Arm Ethos-U65/85 NPUs are designed for edge AI inference applications[0]. The driver works with Mesa Teflon. The Ethos support was merged on 10/15. The UAPI should also be compatible with the downstream (open source) driver stack[2] and Vela compiler though that has not been implemented. Testing so far has been on i.MX93 boards with Ethos-U65 and a FVP model with Ethos-U85. More work is needed in mesa for handling U85 command stream differences, but that doesn't affect the UAPI. A git tree is here[3]. Rob [0] https://www.arm.com/products/silicon-ip-cpu?families=ethos%20npus [2] https://gitlab.arm.com/artificial-intelligence/ethos-u/ [3] git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git ethos-v5 Signed-off-by: Rob Herring (Arm) <robh(a)kernel.org> --- Changes in v5: - Rework Runtime PM init in probe - Use __free() cleanups where possible - Use devm_mutex_init() - Handle U85 NPU_SET_WEIGHT2_BASE and NPU_SET_WEIGHT2_LENGTH - Link to v4: https://lore.kernel.org/r/20251015-ethos-v4-0-81025a3dcbf3@kernel.org Changes in v4: - Use bulk clk API - Various whitespace fixes mostly due to ethos->ethosu rename - Drop error check on dma_set_mask_and_coherent() - Drop unnecessary pm_runtime_mark_last_busy() call - Move variable declarations out of switch (a riscv/clang build failure) - Use lowercase hex in all defines - Drop unused ethosu_device.coherent member - Add comments on all locks - Link to v3: https://lore.kernel.org/r/20250926-ethos-v3-0-6bd24373e4f5@kernel.org Changes in v3: - Rework and improve job submit validation - Rename ethos to ethosu. There was an Ethos-Nxx that's unrelated. - Add missing init for sched_lock mutex - Drop some prints to debug level - Fix i.MX93 SRAM accesses (AXI config) - Add U85 AXI configuration and test on FVP with U85 - Print the current cmd value on timeout - Link to v2: https://lore.kernel.org/r/20250811-ethos-v2-0-a219fc52a95b@kernel.org Changes in v2: - Rebase on v6.17-rc1 adapting to scheduler changes - scheduler: Drop the reset workqueue. According to the scheduler docs, we don't need it since we have a single h/w queue. - scheduler: Rework the timeout handling to continue running if we are making progress. Fixes timeouts on larger jobs. - Reset the NPU on resume so it's in a known state - Add error handling on clk_get() calls - Fix drm_mm splat on module unload. We were missing a put on the cmdstream BO in the scheduler clean-up. - Fix 0-day report needing explicit bitfield.h include - Link to v1: https://lore.kernel.org/r/20250722-ethos-v1-0-cc1c5a0cbbfb@kernel.org --- Rob Herring (Arm) (2): dt-bindings: npu: Add Arm Ethos-U65/U85 accel: Add Arm Ethos-U NPU driver .../devicetree/bindings/npu/arm,ethos.yaml | 79 +++ MAINTAINERS | 9 + drivers/accel/Kconfig | 1 + drivers/accel/Makefile | 1 + drivers/accel/ethosu/Kconfig | 10 + drivers/accel/ethosu/Makefile | 4 + drivers/accel/ethosu/ethosu_device.h | 195 ++++++ drivers/accel/ethosu/ethosu_drv.c | 403 ++++++++++++ drivers/accel/ethosu/ethosu_drv.h | 15 + drivers/accel/ethosu/ethosu_gem.c | 704 +++++++++++++++++++++ drivers/accel/ethosu/ethosu_gem.h | 46 ++ drivers/accel/ethosu/ethosu_job.c | 540 ++++++++++++++++ drivers/accel/ethosu/ethosu_job.h | 41 ++ include/uapi/drm/ethosu_accel.h | 261 ++++++++ 14 files changed, 2309 insertions(+) --- base-commit: 3a8660878839faadb4f1a6dd72c3179c1df56787 change-id: 20250715-ethos-3fdd39ef6f19 Best regards, -- Rob Herring (Arm) <robh(a)kernel.org>

4 months, 2 weeks

Re: [PATCH v8 0/2] i2c: i2c-qcom-geni: Add Block event interrupt support

by Vinod Koul

On Thu, 25 Sep 2025 17:30:33 +0530, Jyothi Kumar Seerapu wrote: > The I2C driver gets an interrupt upon transfer completion. > When handling multiple messages in a single transfer, this > results in N interrupts for N messages, leading to significant > software interrupt latency. > > To mitigate this latency, utilize Block Event Interrupt (BEI) > mechanism. Enabling BEI instructs the hardware to prevent interrupt > generation and BEI is disabled when an interrupt is necessary. > > [...] Applied, thanks! [1/2] dmaengine: qcom: gpi: Add GPI Block event interrupt support commit: 4e8331317e73902e8b2663352c8766227e633901 [2/2] i2c: i2c-qcom-geni: Add Block event interrupt support commit: 398035178503bf662281bbffb4bebce1460a4bc5 Best regards, -- ~Vinod

4 months, 2 weeks

Re: [PATCH v4 2/2] accel: Add Arm Ethos-U NPU driver

by Rob Herring

On Wed, Oct 15, 2025 at 4:02 PM Frank Li <Frank.li(a)nxp.com> wrote: > > On Wed, Oct 15, 2025 at 03:36:05PM -0500, Rob Herring wrote: > > On Wed, Oct 15, 2025 at 2:39 PM Frank Li <Frank.li(a)nxp.com> wrote: > > > > > > On Wed, Oct 15, 2025 at 12:47:40PM -0500, Rob Herring (Arm) wrote: > > > > Add a driver for Arm Ethos-U65/U85 NPUs. The Ethos-U NPU has a > > > > relatively simple interface with single command stream to describe > > > > buffers, operation settings, and network operations. It supports up to 8 > > > > memory regions (though no h/w bounds on a region). The Ethos NPUs > > > > are designed to use an SRAM for scratch memory. Region 2 is reserved > > > > for SRAM (like the downstream driver stack and compiler). Userspace > > > > doesn't need access to the SRAM. > > > > +static int ethosu_init(struct ethosu_device *ethosudev) > > > > +{ > > > > + int ret; > > > > + u32 id, config; > > > > + > > > > + ret = devm_pm_runtime_enable(ethosudev->base.dev); > > > > + if (ret) > > > > + return ret; > > > > + > > > > + ret = pm_runtime_resume_and_get(ethosudev->base.dev); > > > > + if (ret) > > > > + return ret; > > > > + > > > > + pm_runtime_set_autosuspend_delay(ethosudev->base.dev, 50); > > > > + pm_runtime_use_autosuspend(ethosudev->base.dev); > > > > + > > > > + /* If PM is disabled, we need to call ethosu_device_resume() manually. */ > > > > + if (!IS_ENABLED(CONFIG_PM)) { > > > > + ret = ethosu_device_resume(ethosudev->base.dev); > > > > + if (ret) > > > > + return ret; > > > > + } > > > > > > I think it should call ethosu_device_resume() unconditional before > > > devm_pm_runtime_enable(); > > > > > > ethosu_device_resume(); > > > pm_runtime_set_active(); > > > pm_runtime_set_autosuspend_delay(ethosudev->base.dev, 50); > > > devm_pm_runtime_enable(); > > > > Why do you think this? Does this do a get? > > > > I don't think it is good to call the resume hook on our own, but we > > have no choice with !CONFIG_PM. With CONFIG_PM, we should only use the > > pm_runtime API. > > Enable clock and do some init work at probe() is quite common. But I never > seen IS_ENABLED(CONFIG_PM) check. It is quite weird and not necessary to > check CONFIG_PM flags. The most CONFIG_PM is enabled, so the branch !CONFIG_PM > almost never tested. Okay, I get what you meant. > > probe() > { > devm_clk_bulk_get_all_enabled(); > > ... did some init work > > pm_runtime_set_active(); > devm_pm_runtime_enable(); > > ... > pm_runtime_put_autosuspend(ethosudev->base.dev); > } I think we still need a pm_runtime_get_noresume() in here since we do a put later on. Here's what I have now: ret = ethosu_device_resume(ethosudev->base.dev); if (ret) return ret; pm_runtime_set_autosuspend_delay(ethosudev->base.dev, 50); pm_runtime_use_autosuspend(ethosudev->base.dev); ret = devm_pm_runtime_set_active_enabled(ethosudev->base.dev); if (ret) return ret; pm_runtime_get_noresume(ethosudev->base.dev); Rob

4 months, 2 weeks

Re: [PATCH v8 2/2] i2c: i2c-qcom-geni: Add Block event interrupt support

by Vinod Koul

On 03-10-25, 20:50, Andi Shyti wrote: > On Thu, Sep 25, 2025 at 05:30:35PM +0530, Jyothi Kumar Seerapu wrote: > > From: Jyothi Kumar Seerapu <quic_jseerapu(a)quicinc.com> > > > > The I2C driver gets an interrupt upon transfer completion. > > When handling multiple messages in a single transfer, this > > results in N interrupts for N messages, leading to significant > > software interrupt latency. > > > > To mitigate this latency, utilize Block Event Interrupt (BEI) > > mechanism. Enabling BEI instructs the hardware to prevent interrupt > > generation and BEI is disabled when an interrupt is necessary. > > > > Large I2C transfer can be divided into chunks of messages internally. > > Interrupts are not expected for the messages for which BEI bit set, > > only the last message triggers an interrupt, indicating the completion of > > N messages. This BEI mechanism enhances overall transfer efficiency. > > > > BEI optimizations are currently implemented for I2C write transfers only, > > as there is no use case for multiple I2C read messages in a single transfer > > at this time. > > > > Signed-off-by: Jyothi Kumar Seerapu <quic_jseerapu(a)quicinc.com> > > Because this series is touching multiple subsystems, I'm going to > ack it: > > Acked-by: Andi Shyti <andi.shyti(a)kernel.org> > > We are waiting for someone from DMA to ack it (Vinod or Sinan). Thanks, I will pick it with your ack -- ~Vinod

4 months, 2 weeks

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