Linaro-mm-sig April 2026

linaro-mm-sig@lists.linaro.org

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[PATCH V4] i2c: qcom-geni: Avoid extra TX DMA TRE for single read message in GPI mode

by Aniket Randive

In GPI mode, the I2C GENI driver programs an extra TX DMA transfer descriptor (TRE) on the TX channel when handling a single read message. This results in an unintended write phase being issued on the I2C bus, even though a read transaction does not require any TX data. For a single-byte read, the correct hardware sequence consists of the CONFIG and GO commands followed by a single RX DMA TRE. Programming an additional TX DMA TRE is redundant, causes unnecessary DMA buffer mapping on the TX channel, and may lead to incorrect bus behavior. Update the transfer logic to avoid programming a TX DMA TRE for single read messages in GPI mode. Co-developed-by: Maramaina Naresh <naresh.maramaina(a)oss.qualcomm.com> Signed-off-by: Maramaina Naresh <naresh.maramaina(a)oss.qualcomm.com> Signed-off-by: Aniket Randive <aniket.randive(a)oss.qualcomm.com> --- Changes in v4: - Added some more description in comment and changed the label name. Changes in v3: - Added comment in the driver for better readability and changed the position of 'skip_dma' label to allow dma engine configuration. Changes in v2: - Updated the commit message. drivers/i2c/busses/i2c-qcom-geni.c | 24 +++++++++++++++++++----- 1 file changed, 19 insertions(+), 5 deletions(-) diff --git a/drivers/i2c/busses/i2c-qcom-geni.c b/drivers/i2c/busses/i2c-qcom-geni.c index a4acb78fafb6..a482a4c60744 100644 --- a/drivers/i2c/busses/i2c-qcom-geni.c +++ b/drivers/i2c/busses/i2c-qcom-geni.c @@ -625,8 +625,8 @@ static int geni_i2c_gpi(struct geni_i2c_dev *gi2c, struct i2c_msg msgs[], { struct gpi_i2c_config *peripheral; unsigned int flags; - void *dma_buf; - dma_addr_t addr; + void *dma_buf = NULL; + dma_addr_t addr = 0; enum dma_data_direction map_dirn; enum dma_transfer_direction dma_dirn; struct dma_async_tx_descriptor *desc; @@ -639,6 +639,16 @@ static int geni_i2c_gpi(struct geni_i2c_dev *gi2c, struct i2c_msg msgs[], gi2c_gpi_xfer = &gi2c->i2c_multi_desc_config; msg_idx = gi2c_gpi_xfer->msg_idx_cnt; + /* + * Skip TX DMA mapping for a read message (I2C_M_RD) to avoid + * programming an extra TX DMA TRE that would cause an unintended + * write cycle on the I2C bus before the actual read operation. + */ + if (op == I2C_WRITE && msgs[msg_idx].flags & I2C_M_RD) { + peripheral->multi_msg = true; + goto skip_tx_dma_map; + } + dma_buf = i2c_get_dma_safe_msg_buf(&msgs[msg_idx], 1); if (!dma_buf) { ret = -ENOMEM; @@ -658,6 +668,7 @@ static int geni_i2c_gpi(struct geni_i2c_dev *gi2c, struct i2c_msg msgs[], goto out; } +skip_tx_dma_map: if (gi2c->is_tx_multi_desc_xfer) { flags = DMA_CTRL_ACK; @@ -740,9 +751,12 @@ static int geni_i2c_gpi(struct geni_i2c_dev *gi2c, struct i2c_msg msgs[], return 0; err_config: - dma_unmap_single(gi2c->se.dev->parent, addr, - msgs[msg_idx].len, map_dirn); - i2c_put_dma_safe_msg_buf(dma_buf, &msgs[msg_idx], false); + /* Avoid DMA unmap as the write operation skipped DMA mapping */ + if (dma_buf) { + dma_unmap_single(gi2c->se.dev->parent, addr, + msgs[msg_idx].len, map_dirn); + i2c_put_dma_safe_msg_buf(dma_buf, &msgs[msg_idx], false); + } out: gi2c->err = ret; -- 2.34.1

1 week, 5 days

[PATCH v2] dma-buf: heaps: system: document system_cc_shared heap

by Jiri Pirko

From: Jiri Pirko <jiri(a)nvidia.com> Document the system_cc_shared dma-buf heap that was introduced recently. Describe its purpose, availability conditions and relation to confidential computing VMs. Signed-off-by: Jiri Pirko <jiri(a)nvidia.com> Reviewed-by: T.J.Mercier <tjmercier(a)google.com> --- Documentation/userspace-api/dma-buf-heaps.rst | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/userspace-api/dma-buf-heaps.rst b/Documentation/userspace-api/dma-buf-heaps.rst index 05445c83b79a..f56b743cdb36 100644 --- a/Documentation/userspace-api/dma-buf-heaps.rst +++ b/Documentation/userspace-api/dma-buf-heaps.rst @@ -16,6 +16,13 @@ following heaps: - The ``system`` heap allocates virtually contiguous, cacheable, buffers. + - The ``system_cc_shared`` heap allocates virtually contiguous, cacheable, + buffers using shared (decrypted) memory. It is only present on + confidential computing (CoCo) VMs where memory encryption is active + (e.g., AMD SEV, Intel TDX). The allocated pages have the encryption + bit cleared, making them accessible for device DMA without TDISP + support. On non-CoCo VM configurations, this heap is not registered. + - The ``default_cma_region`` heap allocates physically contiguous, cacheable, buffers. Only present if a CMA region is present. Such a region is usually created either through the kernel commandline -- 2.51.1

1 week, 6 days

[PATCH V3] i2c: qcom-geni: Avoid extra TX DMA TRE for single read message in GPI mode

by Aniket Randive

In GPI mode, the I2C GENI driver programs an extra TX DMA transfer descriptor (TRE) on the TX channel when handling a single read message. This results in an unintended write phase being issued on the I2C bus, even though a read transaction does not require any TX data. For a single-byte read, the correct hardware sequence consists of the CONFIG and GO commands followed by a single RX DMA TRE. Programming an additional TX DMA TRE is redundant, causes unnecessary DMA buffer mapping on the TX channel, and may lead to incorrect bus behavior. Update the transfer logic to avoid programming a TX DMA TRE for single read messages in GPI mode. Co-developed-by: Maramaina Naresh <naresh.maramaina(a)oss.qualcomm.com> Signed-off-by: Maramaina Naresh <naresh.maramaina(a)oss.qualcomm.com> Signed-off-by: Aniket Randive <aniket.randive(a)oss.qualcomm.com> --- Changes in v3: - Added comment in the driver for better readability and changed the position of 'skip_dma' label to allow dma engine configuration. Changes in v2: - Updated the commit message. drivers/i2c/busses/i2c-qcom-geni.c | 20 +++++++++++++++----- 1 file changed, 15 insertions(+), 5 deletions(-) diff --git a/drivers/i2c/busses/i2c-qcom-geni.c b/drivers/i2c/busses/i2c-qcom-geni.c index a4acb78fafb6..78b92db7c7fd 100644 --- a/drivers/i2c/busses/i2c-qcom-geni.c +++ b/drivers/i2c/busses/i2c-qcom-geni.c @@ -625,8 +625,8 @@ static int geni_i2c_gpi(struct geni_i2c_dev *gi2c, struct i2c_msg msgs[], { struct gpi_i2c_config *peripheral; unsigned int flags; - void *dma_buf; - dma_addr_t addr; + void *dma_buf = NULL; + dma_addr_t addr = 0; enum dma_data_direction map_dirn; enum dma_transfer_direction dma_dirn; struct dma_async_tx_descriptor *desc; @@ -639,6 +639,12 @@ static int geni_i2c_gpi(struct geni_i2c_dev *gi2c, struct i2c_msg msgs[], gi2c_gpi_xfer = &gi2c->i2c_multi_desc_config; msg_idx = gi2c_gpi_xfer->msg_idx_cnt; + /* Skip TX DMA map for I2C_WRITE operation to avoid unintended write cycle */ + if (op == I2C_WRITE && msgs[msg_idx].flags & I2C_M_RD) { + peripheral->multi_msg = true; + goto skip_dma; + } + dma_buf = i2c_get_dma_safe_msg_buf(&msgs[msg_idx], 1); if (!dma_buf) { ret = -ENOMEM; @@ -658,6 +664,7 @@ static int geni_i2c_gpi(struct geni_i2c_dev *gi2c, struct i2c_msg msgs[], goto out; } +skip_dma: if (gi2c->is_tx_multi_desc_xfer) { flags = DMA_CTRL_ACK; @@ -740,9 +747,12 @@ static int geni_i2c_gpi(struct geni_i2c_dev *gi2c, struct i2c_msg msgs[], return 0; err_config: - dma_unmap_single(gi2c->se.dev->parent, addr, - msgs[msg_idx].len, map_dirn); - i2c_put_dma_safe_msg_buf(dma_buf, &msgs[msg_idx], false); + /* Avoid DMA unmap as the write operation skipped DMA mapping */ + if (dma_buf) { + dma_unmap_single(gi2c->se.dev->parent, addr, + msgs[msg_idx].len, map_dirn); + i2c_put_dma_safe_msg_buf(dma_buf, &msgs[msg_idx], false); + } out: gi2c->err = ret; -- 2.34.1

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Prepare to Rage Quit (and Maybe Love It): Diving into Level Devil

by graceful.earthworm.hsos＠hidingmail.com

So, you're looking for a new game to sink your teeth into? Something challenging, maybe a little bit infuriating, and definitely memorable? Look no further than Level Devil. This deceptively simple platformer is a masterclass in trickery, constantly changing the rules and keeping you on your toes. But don't be intimidated! With a little patience (and maybe a stress ball), you can conquer its devilish design. https://leveldevilfull.com Gameplay: Expect the Unexpected At its core, Level Devil is a 2D platformer. You control a little pixelated character tasked with reaching the exit door in each level. Sounds easy, right? Wrong. The beauty (and the frustration) lies in the unpredictable nature of the environment. Platforms crumble beneath your feet, spikes appear out of nowhere, and the ground itself can vanish unexpectedly. Each level introduces new challenges, forcing you to adapt your strategy on the fly. You'll encounter moving platforms, disappearing blocks, and even gravity-defying puzzles. The real kicker? The layout of the levels often changes on each attempt, meaning memorization alone won't cut it. You need to be quick-witted and reactive. The charm of Level Devil is its lack of hand-holding. There are no tutorials, no hints, and no mercy. You're thrown straight into the deep end, forced to learn from your mistakes (and trust me, there will be plenty). That feeling of finally overcoming a particularly difficult section is incredibly rewarding. It's a game that demands your full attention and rewards persistence. Tips for Taming the Devil While Level Devil thrives on its unpredictability, here are a few tips to help you navigate its treacherous landscape: • Patience is Key: This game is designed to test your limits. Don't get discouraged by frequent deaths. Treat each attempt as a learning experience. • Observe Carefully: Before making a move, take a moment to scan the environment. Look for subtle cues that might indicate impending danger. • Embrace Failure: You will die. A lot. Embrace it as part of the learning process. Each death provides valuable insight into the level's design. • Don't Overthink It: Sometimes, the solution is simpler than you think. Avoid overcomplicating your approach. • Take Breaks: If you find yourself getting too frustrated, step away from the game for a while. Come back with a fresh perspective. • Listen to the Sound: The game’s audio cues often hint at upcoming dangers. Pay close attention! Level Devil utilizes sound design to enhance the experience (and sometimes, to cleverly mislead you!). Conclusion: A Test of Skill and Sanity Level Devil isn't for the faint of heart. It's a challenging and often frustrating experience. However, it's also incredibly rewarding. The constant surprises, the need for quick thinking, and the sheer satisfaction of overcoming its devilish design make it a truly unique and memorable game. If you're looking for a platformer that will push you to your limits and leave you feeling accomplished, then Level Devil is definitely worth a try. Just be prepared to rage quit... and then come back for more.

1 week, 6 days

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Linaro-mm-sig April 2026