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[PATCH 5/7] uprobes: add arch write opcode hook

by David Long

From: Rabin Vincent <rabin(a)rab.in> Allow arches to write the opcode with a custom function. ARM needs to customize the swbp instruction depending on the condition code of the instruction it replaces. Signed-off-by: Rabin Vincent <rabin(a)rab.in> Signed-off-by: David A. Long <dave.long(a)linaro.org> --- include/linux/uprobes.h | 3 +++ kernel/events/uprobes.c | 16 ++++++++++++---- 2 files changed, 15 insertions(+), 4 deletions(-) diff --git a/include/linux/uprobes.h b/include/linux/uprobes.h index e5a9bfb..5eef2f0 100644 --- a/include/linux/uprobes.h +++ b/include/linux/uprobes.h @@ -136,6 +136,9 @@ extern void arch_uprobe_abort_xol(struct arch_uprobe *aup, struct pt_regs *regs) extern bool __weak arch_uprobe_ignore(struct arch_uprobe *aup, struct pt_regs *regs); extern void __weak arch_uprobe_xol_copy(struct arch_uprobe *auprobe, void *vaddr); extern int __weak arch_uprobes_init(void); +extern void __weak arch_uprobe_write_opcode(struct arch_uprobe *auprobe, + void *vaddr, + uprobe_opcode_t opcode); #else /* !CONFIG_UPROBES */ struct uprobes_state { }; diff --git a/kernel/events/uprobes.c b/kernel/events/uprobes.c index 5004f6f..3b2f764 100644 --- a/kernel/events/uprobes.c +++ b/kernel/events/uprobes.c @@ -248,6 +248,12 @@ static int verify_opcode(struct page *page, unsigned long vaddr, uprobe_opcode_t * have fixed length instructions. */ +void __weak arch_uprobe_write_opcode(struct arch_uprobe *auprobe, void *vaddr, + uprobe_opcode_t opcode) +{ + memcpy(vaddr, &opcode, UPROBE_SWBP_INSN_SIZE); +} + /* * write_opcode - write the opcode at a given virtual address. * @mm: the probed process address space. @@ -260,7 +266,7 @@ static int verify_opcode(struct page *page, unsigned long vaddr, uprobe_opcode_t * For mm @mm, write the opcode at @vaddr. * Return 0 (success) or a negative errno. */ -static int write_opcode(struct mm_struct *mm, unsigned long vaddr, +static int write_opcode(struct arch_uprobe *auprobe, struct mm_struct *mm, unsigned long vaddr, uprobe_opcode_t opcode) { struct page *old_page, *new_page; @@ -285,7 +291,9 @@ retry: __SetPageUptodate(new_page); copy_highpage(new_page, old_page); - copy_to_page(new_page, vaddr, &opcode, UPROBE_SWBP_INSN_SIZE); + vaddr_new = kmap_atomic(new_page); + arch_uprobe_write_opcode(auprobe, vaddr_new + (vaddr & ~PAGE_MASK), opcode); + kunmap_atomic(vaddr_new); ret = anon_vma_prepare(vma); if (ret) @@ -314,7 +322,7 @@ put_old: */ int __weak set_swbp(struct arch_uprobe *auprobe, struct mm_struct *mm, unsigned long vaddr) { - return write_opcode(mm, vaddr, UPROBE_SWBP_INSN); + return write_opcode(auprobe, mm, vaddr, UPROBE_SWBP_INSN); } /** @@ -329,7 +337,7 @@ int __weak set_swbp(struct arch_uprobe *auprobe, struct mm_struct *mm, unsigned int __weak set_orig_insn(struct arch_uprobe *auprobe, struct mm_struct *mm, unsigned long vaddr) { - return write_opcode(mm, vaddr, *(uprobe_opcode_t *)auprobe->insn); + return write_opcode(auprobe, mm, vaddr, *(uprobe_opcode_t *)auprobe->insn); } static int match_uprobe(struct uprobe *l, struct uprobe *r) -- 1.8.1.2

11 years, 10 months

[PATCH 4/7] uprobes: allow arch-specific initialization

by David Long

From: Rabin Vincent <rabin(a)rab.in> Add a weak function for any architecture-specific initialization. ARM will use this to register the handlers for the undefined instructions it uses to implement uprobes. Signed-off-by: Rabin Vincent <rabin(a)rab.in> Signed-off-by: David A. Long <dave.long(a)linaro.org> --- include/linux/uprobes.h | 1 + kernel/events/uprobes.c | 10 ++++++++++ 2 files changed, 11 insertions(+) diff --git a/include/linux/uprobes.h b/include/linux/uprobes.h index 2a0aa10..e5a9bfb 100644 --- a/include/linux/uprobes.h +++ b/include/linux/uprobes.h @@ -135,6 +135,7 @@ extern int arch_uprobe_exception_notify(struct notifier_block *self, unsigned l extern void arch_uprobe_abort_xol(struct arch_uprobe *aup, struct pt_regs *regs); extern bool __weak arch_uprobe_ignore(struct arch_uprobe *aup, struct pt_regs *regs); extern void __weak arch_uprobe_xol_copy(struct arch_uprobe *auprobe, void *vaddr); +extern int __weak arch_uprobes_init(void); #else /* !CONFIG_UPROBES */ struct uprobes_state { }; diff --git a/kernel/events/uprobes.c b/kernel/events/uprobes.c index 64471bd..5004f6f 100644 --- a/kernel/events/uprobes.c +++ b/kernel/events/uprobes.c @@ -1862,8 +1862,14 @@ static struct notifier_block uprobe_exception_nb = { .priority = INT_MAX-1, /* notified after kprobes, kgdb */ }; +int __weak __init arch_uprobes_init(void) +{ + return 0; +} + static int __init init_uprobes(void) { + int ret; int i; for (i = 0; i < UPROBES_HASH_SZ; i++) @@ -1872,6 +1878,10 @@ static int __init init_uprobes(void) if (percpu_init_rwsem(&dup_mmap_sem)) return -ENOMEM; + ret = arch_uprobes_init(); + if (ret) + return ret; + return register_die_notifier(&uprobe_exception_nb); } module_init(init_uprobes); -- 1.8.1.2

11 years, 10 months

[PATCH 3/7] uprobes: allow arch access to xol slot

by David Long

From: Rabin Vincent <rabin(a)rab.in> Allow arches to customize how the instruction is filled into the xol slot. ARM will use this to insert an undefined instruction after the real instruction in order to simulate a single step of the instruction without hardware support. Signed-off-by: Rabin Vincent <rabin(a)rab.in> Signed-off-by: David A. Long <dave.long(a)linaro.org> --- include/linux/uprobes.h | 1 + kernel/events/uprobes.c | 10 +++++++++- 2 files changed, 10 insertions(+), 1 deletion(-) diff --git a/include/linux/uprobes.h b/include/linux/uprobes.h index eca5bd5..2a0aa10 100644 --- a/include/linux/uprobes.h +++ b/include/linux/uprobes.h @@ -134,6 +134,7 @@ extern bool arch_uprobe_xol_was_trapped(struct task_struct *tsk); extern int arch_uprobe_exception_notify(struct notifier_block *self, unsigned long val, void *data); extern void arch_uprobe_abort_xol(struct arch_uprobe *aup, struct pt_regs *regs); extern bool __weak arch_uprobe_ignore(struct arch_uprobe *aup, struct pt_regs *regs); +extern void __weak arch_uprobe_xol_copy(struct arch_uprobe *auprobe, void *vaddr); #else /* !CONFIG_UPROBES */ struct uprobes_state { }; diff --git a/kernel/events/uprobes.c b/kernel/events/uprobes.c index 2f3a4cb..64471bd 100644 --- a/kernel/events/uprobes.c +++ b/kernel/events/uprobes.c @@ -1238,6 +1238,11 @@ static unsigned long xol_take_insn_slot(struct xol_area *area) return slot_addr; } +void __weak arch_uprobe_xol_copy(struct arch_uprobe *auprobe, void *vaddr) +{ + memcpy(vaddr, auprobe->insn, MAX_UINSN_BYTES); +} + /* * xol_get_insn_slot - allocate a slot for xol. * Returns the allocated slot address or 0. @@ -1246,6 +1251,7 @@ static unsigned long xol_get_insn_slot(struct uprobe *uprobe) { struct xol_area *area; unsigned long xol_vaddr; + void *kaddr; area = get_xol_area(); if (!area) @@ -1256,7 +1262,9 @@ static unsigned long xol_get_insn_slot(struct uprobe *uprobe) return 0; /* Initialize the slot */ - copy_to_page(area->page, xol_vaddr, uprobe->arch.insn, MAX_UINSN_BYTES); + kaddr = kmap_atomic(area->page); + arch_uprobe_xol_copy(&uprobe->arch, kaddr + (xol_vaddr & ~PAGE_MASK)); + kunmap_atomic(kaddr); /* * We probably need flush_icache_user_range() but it needs vma. * This should work on supported architectures too. -- 1.8.1.2

11 years, 10 months

[PATCH 2/7] uprobes: allow ignoring of probe hits

by David Long

From: Rabin Vincent <rabin(a)rab.in> Allow arches to decided to ignore a probe hit. ARM will use this to only call handlers if the conditions to execute a conditionally executed instruction are satisfied. Upleveled for v3.10-rc7. Signed-off-by: David A. Long <dave.long(a)linaro.org> --- include/linux/uprobes.h | 1 + kernel/events/uprobes.c | 17 ++++++++++++----- 2 files changed, 13 insertions(+), 5 deletions(-) diff --git a/include/linux/uprobes.h b/include/linux/uprobes.h index fd8bcb9..eca5bd5 100644 --- a/include/linux/uprobes.h +++ b/include/linux/uprobes.h @@ -133,6 +133,7 @@ extern int arch_uprobe_post_xol(struct arch_uprobe *aup, struct pt_regs *regs); extern bool arch_uprobe_xol_was_trapped(struct task_struct *tsk); extern int arch_uprobe_exception_notify(struct notifier_block *self, unsigned long val, void *data); extern void arch_uprobe_abort_xol(struct arch_uprobe *aup, struct pt_regs *regs); +extern bool __weak arch_uprobe_ignore(struct arch_uprobe *aup, struct pt_regs *regs); #else /* !CONFIG_UPROBES */ struct uprobes_state { }; diff --git a/kernel/events/uprobes.c b/kernel/events/uprobes.c index f356974..2f3a4cb 100644 --- a/kernel/events/uprobes.c +++ b/kernel/events/uprobes.c @@ -1734,9 +1734,6 @@ static void handle_swbp(struct pt_regs *regs) return; } - /* change it in advance for ->handler() and restart */ - instruction_pointer_set(regs, bp_vaddr); - /* * TODO: move copy_insn/etc into _register and remove this hack. * After we hit the bp, _unregister + _register can install the @@ -1744,16 +1741,26 @@ static void handle_swbp(struct pt_regs *regs) */ smp_rmb(); /* pairs with wmb() in install_breakpoint() */ if (unlikely(!test_bit(UPROBE_COPY_INSN, &uprobe->flags))) - goto out; + goto restart; handler_chain(uprobe, regs); + + if (arch_uprobe_ignore(&uprobe->arch, regs)) + goto out; + if (can_skip_sstep(uprobe, regs)) goto out; if (!pre_ssout(uprobe, regs, bp_vaddr)) return; - /* can_skip_sstep() succeeded, or restart if can't singlestep */ +restart: + /* + * cannot singlestep; cannot skip instruction; + * re-execute the instruction. + */ + instruction_pointer_set(regs, bp_vaddr); + out: put_uprobe(uprobe); } -- 1.8.1.2

11 years, 10 months

[PATCH 1/7] uprobes: move function declarations out of arch

by David Long

From: "David A. Long" <dave.long(a)linaro.org> Move the function declarations from the arch header to the common header, since only the function bodies are architecture-specific. These changes are from Vincent Rabin's uprobes patch. Signed-off-by: Rabin Vincent <rabin(a)rab.in> Signed-off-by: David A. Long <dave.long(a)linaro.org> --- arch/x86/include/asm/uprobes.h | 7 ------- include/linux/uprobes.h | 8 ++++++++ 2 files changed, 8 insertions(+), 7 deletions(-) diff --git a/arch/x86/include/asm/uprobes.h b/arch/x86/include/asm/uprobes.h index 6e51979..b20b4d6 100644 --- a/arch/x86/include/asm/uprobes.h +++ b/arch/x86/include/asm/uprobes.h @@ -49,11 +49,4 @@ struct arch_uprobe_task { unsigned int saved_tf; }; -extern int arch_uprobe_analyze_insn(struct arch_uprobe *aup, struct mm_struct *mm, unsigned long addr); -extern int arch_uprobe_pre_xol(struct arch_uprobe *aup, struct pt_regs *regs); -extern int arch_uprobe_post_xol(struct arch_uprobe *aup, struct pt_regs *regs); -extern bool arch_uprobe_xol_was_trapped(struct task_struct *tsk); -extern int arch_uprobe_exception_notify(struct notifier_block *self, unsigned long val, void *data); -extern void arch_uprobe_abort_xol(struct arch_uprobe *aup, struct pt_regs *regs); -extern unsigned long arch_uretprobe_hijack_return_addr(unsigned long trampoline_vaddr, struct pt_regs *regs); #endif /* _ASM_UPROBES_H */ diff --git a/include/linux/uprobes.h b/include/linux/uprobes.h index 06f28be..fd8bcb9 100644 --- a/include/linux/uprobes.h +++ b/include/linux/uprobes.h @@ -30,6 +30,7 @@ struct vm_area_struct; struct mm_struct; struct inode; +struct notifier_block; #ifdef CONFIG_ARCH_SUPPORTS_UPROBES # include <asm/uprobes.h> @@ -125,6 +126,13 @@ extern void uprobe_notify_resume(struct pt_regs *regs); extern bool uprobe_deny_signal(void); extern bool __weak arch_uprobe_skip_sstep(struct arch_uprobe *aup, struct pt_regs *regs); extern void uprobe_clear_state(struct mm_struct *mm); +extern void uprobe_reset_state(struct mm_struct *mm); +extern int arch_uprobe_analyze_insn(struct arch_uprobe *aup, struct mm_struct *mm,unsigned long addr); +extern int arch_uprobe_pre_xol(struct arch_uprobe *aup, struct pt_regs *regs); +extern int arch_uprobe_post_xol(struct arch_uprobe *aup, struct pt_regs *regs); +extern bool arch_uprobe_xol_was_trapped(struct task_struct *tsk); +extern int arch_uprobe_exception_notify(struct notifier_block *self, unsigned long val, void *data); +extern void arch_uprobe_abort_xol(struct arch_uprobe *aup, struct pt_regs *regs); #else /* !CONFIG_UPROBES */ struct uprobes_state { }; -- 1.8.1.2

11 years, 10 months

[PATCH 0/7] uprobes: Add uprobes support to ARM

by David Long

From: "David A. Long" <dave.long(a)linaro.org> This patch series adds basic uprobes support to ARM. It is based on patches developed earlier by Rabin Vincent. That approach of adding special cases into the kprobes instruction parsing code was not well received. This approach separates the ARM instruction parsing code in kprobes out into a separate set of functions which can be used by both kprobes and uprobes. Both kprobes and uprobes then provide their own semantic action tables to process the results of the parsing. One regression bug fix is still in progress on this, and some more definitions may be moved from kprobes*.h files into more generic include files. However, at this point feedback on the basic approach would be appreciated. These patches are based on v3.10-rc7 David A. Long (3): uprobes: move function declarations out of arch ARM: Separate kprobes instruction parsing into routines ARM: add uprobes support Rabin Vincent (4): uprobes: allow ignoring of probe hits uprobes: allow arch access to xol slot uprobes: allow arch-specific initialization uprobes: add arch write opcode hook arch/arm/Kconfig | 4 + arch/arm/include/asm/kprobes.h | 17 +- arch/arm/include/asm/probes.h | 23 ++ arch/arm/include/asm/ptrace.h | 6 + arch/arm/include/asm/thread_info.h | 5 +- arch/arm/include/asm/uprobes.h | 34 ++ arch/arm/kernel/Makefile | 3 +- arch/arm/kernel/kprobes-arm.c | 495 ++++++----------------------- arch/arm/kernel/kprobes-common.c | 260 +--------------- arch/arm/kernel/kprobes-thumb.c | 31 +- arch/arm/kernel/kprobes.c | 7 +- arch/arm/kernel/kprobes.h | 51 +-- arch/arm/kernel/probes-arm.h | 66 ++++ arch/arm/kernel/probes.c | 624 +++++++++++++++++++++++++++++++++++++ arch/arm/kernel/signal.c | 4 + arch/arm/kernel/uprobes-arm.c | 220 +++++++++++++ arch/arm/kernel/uprobes.c | 203 ++++++++++++ arch/arm/kernel/uprobes.h | 25 ++ arch/powerpc/include/asm/uprobes.h | 1 - arch/x86/include/asm/uprobes.h | 7 - include/linux/uprobes.h | 17 + kernel/events/uprobes.c | 54 +++- 22 files changed, 1426 insertions(+), 731 deletions(-) create mode 100644 arch/arm/include/asm/probes.h create mode 100644 arch/arm/include/asm/uprobes.h create mode 100644 arch/arm/kernel/probes-arm.h create mode 100644 arch/arm/kernel/probes.c create mode 100644 arch/arm/kernel/uprobes-arm.c create mode 100644 arch/arm/kernel/uprobes.c create mode 100644 arch/arm/kernel/uprobes.h -- 1.8.1.2

11 years, 10 months

[PATCH] Documentation / cpu hotplug: remove outdated description for MADT entries

by Hanjun Guo

More than 256 entries in ACPI MADT is supported from ACPI 3.0 Specification, So the outdated description for MADT entries should be removed. Signed-off-by: Hanjun Guo <hanjun.guo(a)linaro.org> --- Documentation/cpu-hotplug.txt | 3 --- 1 file changed, 3 deletions(-) diff --git a/Documentation/cpu-hotplug.txt b/Documentation/cpu-hotplug.txt index 9f40135..2e36e40 100644 --- a/Documentation/cpu-hotplug.txt +++ b/Documentation/cpu-hotplug.txt @@ -370,9 +370,6 @@ A: There is no clear spec defined way from ACPI that can give us that CPUs in MADT as hotpluggable CPUS. In the case there are no disabled CPUS we assume 1/2 the number of CPUs currently present can be hotplugged. - Caveat: Today's ACPI MADT can only provide 256 entries since the apicid field - in MADT is only 8 bits. - User Space Notification Hotplug support for devices is common in Linux today. Its being used today to -- 1.7.9.5

11 years, 10 months

[RFC] Linaro Stable Kernel processes

by Mark Brown

This is a first draft at a process for getting things integrated into the Linaro Stable Kernel releases. Any feedback is appreciated, hopefully this is all fairly boring and uncontroversial so there shouldn't be too many surprises. The first thing to say here is that all LSK releases will be based off the latest generic Linux stable kernel so the best way to get a change into a Linaro release is to get it into the generic Linux stable kernel using the standard processes. This will maximise the number of people who can use the change and is just generally good practice. New features ------------ Features for the stable kernel are agreed by the TSC. Once a feature has been agreed by the TSC there should be an owner assigned to deliver a feature branch into the stable kernel and work with the stable kernel team to resolve any integration issues at least up until the feature has been included in a release. This will be done per kernel version. These feature branches should be based on the relevant upstream kernel as far as possible (any dependencies on other branches should be discussed with the stable kernel team). Some information about where the code came fromm should be included along with the code, in order of preference: 1. Commit IDs from the standard kernel in the changelogs of the individual patches. 2. A description of how the equivalent change was made upstream or why it isn't required in LSK (eg, explaining that this is taken care of by features not present in the stable kernel). 3. References to where out of tree development is happening including contact information for followup. The code should be sent as a pull request or patches, with review by the stable team following normal kernel process and focusing on backporting and integration issues. Relevant testing infrastructure should also be available in LAVA for QA and the review will also include ensuring that the testsuite passes with the changes integrated. Once the code has been accepted it will be stored as a branch in the LSK tree and the submission branch can be deleted. Updating code in the LSK ------------------------ The LSK can be updated either by replacing an existing topic branch or by submitting incremental patches. Replacement would be most useful in cases where a feature has not yet been merged into the standard kernel and is still being redeveloped there but otherwise incremental updates are preferred. The process for submitting changes is the same as for new features with the exception that incremental updates should be based on the topic branch in the LSK git rather than the standard kernel.

11 years, 10 months

[PATCH V4 00/11] USB: OHCI:Properly handle ohci_suspend()routine in bus glue

by Manjunath Goudar

Suspend scenario in case of ohci bus glue was not properly handled as it was not suspending generic part of ohci controller. Calling explicitly the ohci_suspend()routine will ensure proper handling of suspend scenario. V2: -Incase ohci_suspend() fails, return right away without executing further. V3: -New patch 1/11 added, for generic ohci-hcd suspend code. V4: -Properly aligned "do_wakeup" and "ret" variables. Manjunath Goudar (11): USB: OHCI: Properly handle OHCI controller suspend USB: OHCI: Properly handle ohci-at91 suspend USB: OHCI: Properly handle ohci-s3c2410 suspend USB: OHCI: Properly handle ohci-da8xx suspend USB: OHCI: Properly handle ohci-ep93xx suspend USB: OHCI: Properly handle ohci-exynos suspend USB: OHCI: Properly handle ohci-omap suspend USB: OHCI: Properly handle ohci-platform suspend USB: OHCI: Properly handle ohci-pxa27x suspend USB: OHCI: Properly handle ohci-sm501 suspend USB: OHCI: Properly handle ohci-spear suspend drivers/usb/host/ohci-at91.c | 10 ++++++++-- drivers/usb/host/ohci-da8xx.c | 15 +++++++++++---- drivers/usb/host/ohci-ep93xx.c | 9 ++++++++- drivers/usb/host/ohci-exynos.c | 20 +++++--------------- drivers/usb/host/ohci-hcd.c | 9 ++++++++- drivers/usb/host/ohci-omap.c | 13 ++++++++++--- drivers/usb/host/ohci-platform.c | 9 ++++++++- drivers/usb/host/ohci-pxa27x.c | 8 +++++++- drivers/usb/host/ohci-s3c2410.c | 19 ++++--------------- drivers/usb/host/ohci-sm501.c | 11 +++++++++-- drivers/usb/host/ohci-spear.c | 12 +++++++++--- 11 files changed, 87 insertions(+), 48 deletions(-) -- 1.7.9.5

11 years, 10 months

[RFC] Comparison of power-efficient scheduling patch sets

by Morten Rasmussen

Hi, A number of patch sets related to power-efficient scheduling have been posted over the last couple of months. Most of them do not have much data to back them up, so I decided to do some testing. Common for all of the patch sets that I have tested, except one, is that they attempt to pack tasks on as few cpus as possible to allow the remaining cpus to enter deeper sleep states - a strategy that should make sense on most platforms that support per-cpu power gating and multi-socket machines. Kernel: 3.9 Patch sets: rlb-v4: sched: use runnable load based balance (Alex Shi) <https://lkml.org/lkml/2013/4/27/13> pas-v7: sched: power aware scheduling (Alex Shi) <https://lkml.org/lkml/2013/4/3/732> pst-v3: sched: packing small tasks (Vincent Guittot) <https://lkml.org/lkml/2013/3/22/183> pst-v4: sched: packing small tasks (Vincent Guittot) <https://lkml.org/lkml/2013/4/25/396> Configuration: pas-v7: Set to "powersaving" mode. pst-v4: Set to "Full" packing mode. Platform: ARM TC2 (test-chip), 2xCortex-A15 + 3xCortex-A7. Cortex-A15s disabled. Measurement technique: Time spent non-idle (not in idle state) for each cpu based on cpuidle ftrace events. TC2 does not have per-core power-gating, so packing inside the A7 cluster does not lead to any significant power savings. Note that any product grade hardware (TC2 is a test-chip) will very likely have per-core power-gating, so in those cases packing will have an appreciable effect on power savings. Measuring non-idle time rather than power should give a more clear idea about the effect of the patch sets given that the idle back-end is highly implementation specific. Benchmarks: audio playback (Android): 30s mp3 file playback on Android. bbench+audio (Android): Web page rendering while doing mp3 playback. andebench_native (Android): Android benchmark running in native mode. cyclictest: Short periodic tasks. Results: Two runs for each patch set. audio playback (Android) SMP non-idle % cpu 0 cpu 1 cpu 2 3.9_1 11.96 2.86 2.48 3.9_2 12.64 2.81 1.88 rlb-v4_1 12.61 2.44 1.90 rlb-v4_2 12.45 2.44 1.90 pas-v7_1 16.17 0.03 0.24 pas-v7_2 16.08 0.28 0.07 pst-v3_1 15.18 2.76 1.70 pst-v3_2 15.13 0.80 0.38 pst-v4_1 16.14 0.05 0.00 pst-v4_2 16.34 0.06 0.00 bbench+audio (Android) SMP non-idle % cpu 0 cpu 1 cpu 2 render time 3.9_1 25.00 20.73 21.22 812 3.9_2 24.29 19.78 22.34 795 rlb-v4_1 23.84 19.36 22.74 782 rlb-v4_2 24.07 19.36 22.74 797 pas-v7_1 28.29 17.86 16.01 869 pas-v7_2 28.62 18.54 15.05 908 pst-v3_1 29.14 20.59 21.72 830 pst-v3_2 27.69 18.81 20.06 830 pst-v4_1 42.20 13.63 2.29 880 pst-v4_2 41.56 14.40 2.17 935 andebench_native (8 threads) (Android) SMP non-idle % cpu 0 cpu 1 cpu 2 Score 3.9_1 99.22 98.88 99.61 4139 3.9_2 99.56 99.31 99.46 4148 rlb-v4_1 99.49 99.61 99.53 4153 rlb-v4_2 99.56 99.61 99.53 4149 pas-v7_1 99.53 99.59 99.29 4149 pas-v7_2 99.42 99.63 99.48 4150 pst-v3_1 97.89 99.33 99.42 4097 pst-v3_2 99.16 99.62 99.42 4097 pst-v4_1 99.34 99.01 99.59 4146 pst-v4_2 99.49 99.52 99.20 4146 cyclictest SMP non-idle % cpu 0 cpu 1 cpu 2 3.9_1 9.13 8.88 8.41 3.9_2 10.27 8.02 6.30 rlb-v4_1 8.88 8.09 8.11 rlb-v4_2 8.49 8.09 8.11 pas-v7_1 10.20 0.02 11.50 pas-v7_2 7.86 14.31 0.02 pst-v3_1 20.44 8.68 7.97 pst-v3_2 20.41 0.78 1.00 pst-v4_1 21.32 0.21 0.05 pst-v4_2 21.56 0.21 0.04 Overall, pas-v7 seems to do a fairly good job at packing. The idle time distribution seems to be somewhere between pst-v3 and the more aggressive pst-v4 for all the benchmarks. pst-v4 manages to keep two cpus nearly idle (<0.25% non-idle) for both cyclictest and audio, which is better than both pst-v3 and pas-v7. pas-v7 fails to pack cyclictest. Packing does come at at cost which can be seen for bbench+audio, where pst-v3 and rlb-v4 get better render times than pas-v7 and pst-v4 which do more aggressive packing. rlb-v4 does not pack, it is only included for reference. >From a packing perspective pst-v4 seems to do the best job for the workloads that I have tested on ARM TC2. The less aggressive packing in pst-v3 may be a better choice for in terms of performance. I'm well aware that these tests are heavily focused on mobile workloads. I would therefore encourage people to share your test results for your workloads on your platforms to complete the picture. Comments are also welcome. Thanks, Morten

11 years, 10 months

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