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[PATCH 0/3] cpufreq: sa11x0: cleanups for 3.13

by Viresh Kumar

Hi Rafael/Russell, These patches would be part of this patchset finally, sending it separately as I didn't wanted to send other patches in that series.. https://lkml.org/lkml/2013/8/10/48 (Above series was rebased over https://lkml.org/lkml/2013/8/8/263 and hence this patchset too).. These first exposes frequency table and then uses cpufreq generic routines (which uses exposed table) instead of its own .verify() routine. Later I will send another patch that would be part of this series: http://lkml.org/lkml/2013/8/12/406 (I need to send that series again today and so not sending that patch twice, once here and then in that series).. All these patches are pushed here with all dependencies: https://git.linaro.org/gitweb?p=people/vireshk/linux.git;a=shortlog;h=refs/… Viresh Kumar (3): cpufreq: sa11x0: Expose frequency table cpufreq: sa11x0: let cpufreq core initialize struct policy fields cpufreq: sa11x0: Use generic cpufreq routines arch/arm/mach-sa1100/generic.c | 65 +++++++++++++--------------------------- arch/arm/mach-sa1100/generic.h | 2 +- drivers/cpufreq/sa1100-cpufreq.c | 9 +++--- drivers/cpufreq/sa1110-cpufreq.c | 9 +++--- 4 files changed, 30 insertions(+), 55 deletions(-) -- 1.7.12.rc2.18.g61b472e

11 years, 10 months

[PATCH V3 0/2] Add RTC DT node to Exynos5420 SoC and Fix RTC DT node name for 5250 Soc

by Vikas Sajjan

changes since v2: - split the 5250 related modifications into a separate patch. - placed the RTC node as per the alphabetical order in the DTS file as suggested by Kukjin Kim <kgene(a)kernel.org>. changes since v1: - made DT node status as "okay" in the dtsi file itself. - Vikas Sajjan (2): ARM: dts: Add RTC DT node to Exynos5420 SoC ARM: dts: Fix the RTC DT node name for Exynos5250 SoC arch/arm/boot/dts/exynos5.dtsi | 2 +- arch/arm/boot/dts/exynos5250.dtsi | 3 ++- arch/arm/boot/dts/exynos5420.dtsi | 6 ++++++ 3 files changed, 9 insertions(+), 2 deletions(-) -- 1.7.9.5

11 years, 10 months

[PATCH] ARM64: KVM: Fix coherent_icache_guest_page() for host with external L3-cache.

by Pranavkumar Sawargaonkar

Systems with large external L3-cache (few MBs), might have dirty content belonging to the guest page in L3-cache. To tackle this, we need to flush such dirty content from d-cache so that guest will see correct contents of guest page when guest MMU is disabled. The patch fixes coherent_icache_guest_page() for external L3-cache. Signed-off-by: Pranavkumar Sawargaonkar <pranavkumar(a)linaro.org> Signed-off-by: Anup Patel <anup.patel(a)linaro.org> --- arch/arm64/include/asm/kvm_mmu.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/include/asm/kvm_mmu.h b/arch/arm64/include/asm/kvm_mmu.h index efe609c..5129038 100644 --- a/arch/arm64/include/asm/kvm_mmu.h +++ b/arch/arm64/include/asm/kvm_mmu.h @@ -123,6 +123,8 @@ static inline void coherent_icache_guest_page(struct kvm *kvm, gfn_t gfn) if (!icache_is_aliasing()) { /* PIPT */ unsigned long hva = gfn_to_hva(kvm, gfn); flush_icache_range(hva, hva + PAGE_SIZE); + /* Flush d-cache for systems with external caches. */ + __flush_dcache_area((void *) hva, PAGE_SIZE); } else if (!icache_is_aivivt()) { /* non ASID-tagged VIVT */ /* any kind of VIPT cache */ __flush_icache_all(); -- 1.7.9.5

11 years, 10 months

[PATCH] ARM: dts: Enable USB hub on Arndale

by Mark Brown

From: Mark Brown <broonie(a)linaro.org> The Arndale has a SMSC USB3503 connected in hardware only mode like a PHY, support it using the usb-nop-xceiv binding. Note that due to a regrettable decision to use a regulator to represent the reset signal this uses a fixed voltage regulator to do that, there is a plan to use the reset controller binding once that is merged so it does not seem worthwhile to fix the usb-nop-xceiv driver at this point. Signed-off-by: Mark Brown <broonie(a)linaro.org> --- This doesn't 100% work right now since we don't yet have a solution to ensure that this gets started after the USB controller but those modifications are small (or can be done at runtime with module loading). arch/arm/boot/dts/exynos5250-arndale.dts | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts b/arch/arm/boot/dts/exynos5250-arndale.dts index 96d528d..e477e23 100644 --- a/arch/arm/boot/dts/exynos5250-arndale.dts +++ b/arch/arm/boot/dts/exynos5250-arndale.dts @@ -539,4 +539,22 @@ rtc { status = "okay"; }; + + usb_hub_bus { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + // SMSC USB3503 connected in hardware only mode as a PHY + usb_hub: usb_hub { + compatible = "smsc,usb3503a"; + + reset-gpios = <&gpx3 5 1>; + connect-gpios = <&gpd1 7 1>; + }; + }; + + usb@12110000 { + usb-phy = <&usb2_phy>; + }; }; -- 1.8.4.rc2

11 years, 10 months

Re: [PATCH] cpufreq: add frequency table to at32ap driver

by Viresh Kumar

On 13 August 2013 00:40, Hans-Christian Egtvedt <egtvedt(a)samfundet.no> wrote: > This patch adds a dynamically calculated frequency table to the at32ap driver. > In short the architecture can scale in power of two between a maximum and > minimum frequency. Min, max, and the steps in between are added to the table. > > Signed-off-by: Hans-Christian Egtvedt <egtvedt(a)samfundet.no> > --- > drivers/cpufreq/at32ap-cpufreq.c | 47 +++++++++++++++++++++++++++++++++++++++- > 1 file changed, 46 insertions(+), 1 deletion(-) > > diff --git a/drivers/cpufreq/at32ap-cpufreq.c b/drivers/cpufreq/at32ap-cpufreq.c > index 6544887..dbf3f3d 100644 > --- a/drivers/cpufreq/at32ap-cpufreq.c > +++ b/drivers/cpufreq/at32ap-cpufreq.c > @@ -19,8 +19,10 @@ > #include <linux/clk.h> > #include <linux/err.h> > #include <linux/export.h> > +#include <linux/slab.h> > > static struct clk *cpuclk; > +static struct cpufreq_frequency_table *freq_table; > > static int at32_verify_speed(struct cpufreq_policy *policy) > { > @@ -85,13 +87,19 @@ static int at32_set_target(struct cpufreq_policy *policy, > > static int __init at32_cpufreq_driver_init(struct cpufreq_policy *policy) > { > + unsigned int frequency; > + int retval; > + int steps; > + int i; > + > if (policy->cpu != 0) > return -EINVAL; > > cpuclk = clk_get(NULL, "cpu"); > if (IS_ERR(cpuclk)) { > pr_debug("cpufreq: could not get CPU clk\n"); > - return PTR_ERR(cpuclk); > + retval = PTR_ERR(cpuclk); > + goto out_err; > } > > policy->cpuinfo.min_freq = (clk_round_rate(cpuclk, 1) + 500) / 1000; > @@ -101,9 +109,46 @@ static int __init at32_cpufreq_driver_init(struct cpufreq_policy *policy) > policy->min = policy->cpuinfo.min_freq; > policy->max = policy->cpuinfo.max_freq; > > + /* > + * AVR32 CPU frequency rate scales in power of two between maximum and > + * minimum, also add space for the table end marker. > + * > + * Further validate that the frequency is usable, and append it to the > + * frequency table. > + */ > + steps = fls(policy->cpuinfo.max_freq / policy->cpuinfo.min_freq) + 1; > + freq_table = kzalloc(steps * sizeof(struct cpufreq_frequency_table), > + GFP_KERNEL); > + if (!freq_table) { > + retval = -ENOMEM; > + goto out_err_put_clk; > + } > + > + frequency = policy->cpuinfo.max_freq; > + for (i = 0; i < (steps - 1); i++) { > + unsigned int rate = clk_round_rate(cpuclk, frequency * 1000); > + rate /= 1000; > + if (rate != frequency) > + freq_table[i].frequency = CPUFREQ_ENTRY_INVALID; > + else > + freq_table[i].frequency = frequency; > + frequency /= 2; > + } > + freq_table[steps - 1].frequency = CPUFREQ_TABLE_END; > + > + retval = cpufreq_frequency_table_cpuinfo(policy, freq_table); > + if (retval) > + goto out_err_kfree; > + > printk("cpufreq: AT32AP CPU frequency driver\n"); > > return 0; > +out_err_kfree: > + kfree(freq_table); > +out_err_put_clk: > + clk_put(cpuclk); > +out_err: > + return retval; > } > > static struct cpufreq_driver at32_driver = { Thanks for your patch, I have folded below patch with your patch while applying.. diff --git a/drivers/cpufreq/at32ap-cpufreq.c b/drivers/cpufreq/at32ap-cpufreq.c index eaac7cb..c586d3e 100644 --- a/drivers/cpufreq/at32ap-cpufreq.c +++ b/drivers/cpufreq/at32ap-cpufreq.c @@ -87,10 +87,8 @@ static int at32_set_target(struct cpufreq_policy *policy, static int __init at32_cpufreq_driver_init(struct cpufreq_policy *policy) { - unsigned int frequency; - int retval; - int steps; - int i; + unsigned int frequency, rate; + int retval, steps, i; if (policy->cpu != 0) return -EINVAL; @@ -126,20 +124,23 @@ static int __init at32_cpufreq_driver_init(struct cpufreq_policy *policy) frequency = policy->cpuinfo.max_freq; for (i = 0; i < (steps - 1); i++) { - unsigned int rate = clk_round_rate(cpuclk, frequency * 1000); - rate /= 1000; + rate = clk_round_rate(cpuclk, frequency * 1000) / 1000; + if (rate != frequency) freq_table[i].frequency = CPUFREQ_ENTRY_INVALID; else freq_table[i].frequency = frequency; + frequency /= 2; } + freq_table[steps - 1].frequency = CPUFREQ_TABLE_END; retval = cpufreq_frequency_table_cpuinfo(policy, freq_table); if (retval) goto out_err_kfree; + cpufreq_frequency_table_get_attr(freq_table, policy->cpu); printk("cpufreq: AT32AP CPU frequency driver\n"); return 0;

11 years, 10 months

[PATCH V2] ARM: dts: Add RTC DT node to Exynos5420 SoC

by Vikas Sajjan

Adds RTC DT node to Exynos5420 SoC. Signed-off-by: Vikas Sajjan <vikas.sajjan(a)linaro.org> --- changes since v1: - made DT node status as "okay" in the dtsi file itself. --- arch/arm/boot/dts/exynos5.dtsi | 2 +- arch/arm/boot/dts/exynos5250.dtsi | 3 ++- arch/arm/boot/dts/exynos5420.dtsi | 7 +++++++ 3 files changed, 10 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/exynos5.dtsi b/arch/arm/boot/dts/exynos5.dtsi index f65e124..4a8e223 100644 --- a/arch/arm/boot/dts/exynos5.dtsi +++ b/arch/arm/boot/dts/exynos5.dtsi @@ -95,7 +95,7 @@ interrupts = <0 54 0>; }; - rtc { + rtc@101E0000 { compatible = "samsung,s3c6410-rtc"; reg = <0x101E0000 0x100>; interrupts = <0 43 0>, <0 44 0>; diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index 88589b7..c82137b 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi @@ -178,9 +178,10 @@ samsung,power-domain = <&pd_mfc>; }; - rtc { + rtc@101E0000 { clocks = <&clock 337>; clock-names = "rtc"; + status = "okay"; }; tmu@10060000 { diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index 9e90d1e..8f1bb08 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -145,4 +145,11 @@ clocks = <&clock 260>, <&clock 131>; clock-names = "uart", "clk_uart_baud0"; }; + + rtc@101E0000 { + clocks = <&clock 317>; + clock-names = "rtc"; + status = "okay"; + }; + }; -- 1.7.9.5

11 years, 10 months

[PATCH 1/2] net: asix: Staticise non-exported symbols

by Mark Brown

From: Mark Brown <broonie(a)linaro.org> Make functions that are only referenced from ops structures static, they do not need to be in the global namespace and sparse complains about this. Signed-off-by: Mark Brown <broonie(a)linaro.org> --- drivers/net/usb/ax88172a.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/net/usb/ax88172a.c b/drivers/net/usb/ax88172a.c index d012203..723b387 100644 --- a/drivers/net/usb/ax88172a.c +++ b/drivers/net/usb/ax88172a.c @@ -161,7 +161,8 @@ static const struct net_device_ops ax88172a_netdev_ops = { .ndo_set_rx_mode = asix_set_multicast, }; -int ax88172a_get_settings(struct net_device *net, struct ethtool_cmd *cmd) +static int ax88172a_get_settings(struct net_device *net, + struct ethtool_cmd *cmd) { if (!net->phydev) return -ENODEV; @@ -169,7 +170,8 @@ int ax88172a_get_settings(struct net_device *net, struct ethtool_cmd *cmd) return phy_ethtool_gset(net->phydev, cmd); } -int ax88172a_set_settings(struct net_device *net, struct ethtool_cmd *cmd) +static int ax88172a_set_settings(struct net_device *net, + struct ethtool_cmd *cmd) { if (!net->phydev) return -ENODEV; @@ -177,7 +179,7 @@ int ax88172a_set_settings(struct net_device *net, struct ethtool_cmd *cmd) return phy_ethtool_sset(net->phydev, cmd); } -int ax88172a_nway_reset(struct net_device *net) +static int ax88172a_nway_reset(struct net_device *net) { if (!net->phydev) return -ENODEV; -- 1.8.4.rc1

11 years, 10 months

Is it OK to add an object file more than once in a Makefile?

by Jon Medhurst (Tixy)

E.g. in a Makefile to have obj-$(CONFIG_FOO) += common-thing.o foo.o obj-$(CONFIG_BAR) += common-thing.o bar.o where both FOO and BAR can be enabled at the same time? Looks a bit suspect to me. My instinct would be to invent CONFIG_BAZ to compile common-thing.o and make FOO and BAR select it. Or possibly some makefile conditional OR expression I can't think of off the top of my head. -- Tixy

11 years, 10 months

[PATCH] ASoC: pcm1681: Add DAPM support

by Mark Brown

From: Mark Brown <broonie(a)linaro.org> Provide DAPM for the device, ensuring operation with DAPM required by the core and making it easier to hook up external hardware to it. Signed-off-by: Mark Brown <broonie(a)linaro.org> --- sound/soc/codecs/pcm1681.c | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/sound/soc/codecs/pcm1681.c b/sound/soc/codecs/pcm1681.c index 51b1866..651ce09 100644 --- a/sound/soc/codecs/pcm1681.c +++ b/sound/soc/codecs/pcm1681.c @@ -206,6 +206,28 @@ static const struct snd_soc_dai_ops pcm1681_dai_ops = { .digital_mute = pcm1681_digital_mute, }; +static const struct snd_soc_dapm_widget pcm1681_dapm_widgets[] = { +SND_SOC_DAPM_OUTPUT("VOUT1"), +SND_SOC_DAPM_OUTPUT("VOUT2"), +SND_SOC_DAPM_OUTPUT("VOUT3"), +SND_SOC_DAPM_OUTPUT("VOUT4"), +SND_SOC_DAPM_OUTPUT("VOUT5"), +SND_SOC_DAPM_OUTPUT("VOUT6"), +SND_SOC_DAPM_OUTPUT("VOUT7"), +SND_SOC_DAPM_OUTPUT("VOUT8"), +}; + +static const struct snd_soc_dapm_route pcm1681_dapm_routes[] = { + { "VOUT1", NULL, "Playback" }, + { "VOUT2", NULL, "Playback" }, + { "VOUT3", NULL, "Playback" }, + { "VOUT4", NULL, "Playback" }, + { "VOUT5", NULL, "Playback" }, + { "VOUT6", NULL, "Playback" }, + { "VOUT7", NULL, "Playback" }, + { "VOUT8", NULL, "Playback" }, +}; + static const DECLARE_TLV_DB_SCALE(pcm1681_dac_tlv, -6350, 50, 1); static const struct snd_kcontrol_new pcm1681_controls[] = { @@ -258,6 +280,10 @@ static const struct regmap_config pcm1681_regmap = { static struct snd_soc_codec_driver soc_codec_dev_pcm1681 = { .controls = pcm1681_controls, .num_controls = ARRAY_SIZE(pcm1681_controls), + .dapm_widgets = pcm1681_dapm_widgets, + .num_dapm_widgets = ARRAY_SIZE(pcm1681_dapm_widgets), + .dapm_routes = pcm1681_dapm_routes, + .num_dapm_routes = ARRAY_SIZE(pcm1681_dapm_routes), }; static const struct i2c_device_id pcm1681_i2c_id[] = { -- 1.8.4.rc2

11 years, 10 months

[PATCH] ARM: signal: sigreturn_codes should be endian neutral to work in BE8

by Victor Kamensky

In case of BE8 kernel data is in BE order whereas code stays in LE order. sigreturn_codes array initializer need to use macros from <asm/opcodes.h> to setup instructions code in endian neutral way. Problem was discovered during ltp testing of BE system: all rt_sig* tests failed. Tested against the same tests in both BE and LE modes. Signed-off-by: Victor Kamensky <victor.kamensky(a)linaro.org> --- arch/arm/kernel/signal.c | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/arch/arm/kernel/signal.c b/arch/arm/kernel/signal.c index ab33042..333a67f 100644 --- a/arch/arm/kernel/signal.c +++ b/arch/arm/kernel/signal.c @@ -20,25 +20,26 @@ #include <asm/ucontext.h> #include <asm/unistd.h> #include <asm/vfp.h> +#include <asm/opcodes.h> /* * For ARM syscalls, we encode the syscall number into the instruction. */ -#define SWI_SYS_SIGRETURN (0xef000000|(__NR_sigreturn)|(__NR_OABI_SYSCALL_BASE)) -#define SWI_SYS_RT_SIGRETURN (0xef000000|(__NR_rt_sigreturn)|(__NR_OABI_SYSCALL_BASE)) +#define SWI_SYS_SIGRETURN (__opcode_to_mem_arm(0xef000000|(__NR_sigreturn)|(__NR_OABI_SYSCALL_BASE))) +#define SWI_SYS_RT_SIGRETURN (__opcode_to_mem_arm(0xef000000|(__NR_rt_sigreturn)|(__NR_OABI_SYSCALL_BASE))) /* * With EABI, the syscall number has to be loaded into r7. */ -#define MOV_R7_NR_SIGRETURN (0xe3a07000 | (__NR_sigreturn - __NR_SYSCALL_BASE)) -#define MOV_R7_NR_RT_SIGRETURN (0xe3a07000 | (__NR_rt_sigreturn - __NR_SYSCALL_BASE)) +#define MOV_R7_NR_SIGRETURN (__opcode_to_mem_arm(0xe3a07000 | (__NR_sigreturn - __NR_SYSCALL_BASE))) +#define MOV_R7_NR_RT_SIGRETURN (__opcode_to_mem_arm(0xe3a07000 | (__NR_rt_sigreturn - __NR_SYSCALL_BASE))) /* * For Thumb syscalls, we pass the syscall number via r7. We therefore * need two 16-bit instructions. */ -#define SWI_THUMB_SIGRETURN (0xdf00 << 16 | 0x2700 | (__NR_sigreturn - __NR_SYSCALL_BASE)) -#define SWI_THUMB_RT_SIGRETURN (0xdf00 << 16 | 0x2700 | (__NR_rt_sigreturn - __NR_SYSCALL_BASE)) +#define SWI_THUMB_SIGRETURN (__opcode_to_mem_arm(0xdf00 << 16 | 0x2700 | (__NR_sigreturn - __NR_SYSCALL_BASE))) +#define SWI_THUMB_RT_SIGRETURN (__opcode_to_mem_arm(0xdf00 << 16 | 0x2700 | (__NR_rt_sigreturn - __NR_SYSCALL_BASE))) static const unsigned long sigreturn_codes[7] = { MOV_R7_NR_SIGRETURN, SWI_SYS_SIGRETURN, SWI_THUMB_SIGRETURN, -- 1.8.1.4

11 years, 10 months

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