From: Mark Brown <broonie(a)linaro.org>
While searching for users of spi_async() I found a reference in the ad7877
driver to using it to initiate data transfer from the interrupt handler.
However there is no code for this, instead the interrupt handler is a
threaded handler and uses spi_sync() instead.
Remove the bitrotted comment, though in actual fact the use case mentioned
is a great use for spi_async() since it would cut down on latency handling
the interrupt by saving us a context switch before we start SPI.
This was previously implemented, it was removed in commit b534422b2d11
(Input: ad7877 - switch to using threaded IRQ) for code complexity reasons.
It may be better to revert that commit instead.
Signed-off-by: Mark Brown <broonie(a)linaro.org>
---
drivers/input/touchscreen/ad7877.c | 5 -----
1 file changed, 5 deletions(-)
diff --git a/drivers/input/touchscreen/ad7877.c b/drivers/input/touchscreen/ad7877.c
index 6793c85903ae..523865daa1d3 100644
--- a/drivers/input/touchscreen/ad7877.c
+++ b/drivers/input/touchscreen/ad7877.c
@@ -210,11 +210,6 @@ static bool gpio3;
module_param(gpio3, bool, 0);
MODULE_PARM_DESC(gpio3, "If gpio3 is set to 1 AUX3 acts as GPIO3");
-/*
- * ad7877_read/write are only used for initial setup and for sysfs controls.
- * The main traffic is done using spi_async() in the interrupt handler.
- */
-
static int ad7877_read(struct spi_device *spi, u16 reg)
{
struct ser_req *req;
--
1.9.2
This is a note to let you know that I have just added a patch titled
tick-common: Fix wrong check in tick_check_replacement()
to the linux-3.11.y-queue branch of the 3.11.y.z extended stable tree
which can be found at:
http://kernel.ubuntu.com/git?p=ubuntu/linux.git;a=shortlog;h=refs/heads/lin…
If you, or anyone else, feels it should not be added to this tree, please
reply to this email.
For more information about the 3.11.y.z tree, see
https://wiki.ubuntu.com/Kernel/Dev/ExtendedStable
Thanks.
-Luis
------
>From 39bbe41d9e322c01c6c67cf71763dd66d9172a94 Mon Sep 17 00:00:00 2001
From: Viresh Kumar <viresh.kumar(a)linaro.org>
Date: Tue, 15 Apr 2014 10:54:37 +0530
Subject: tick-common: Fix wrong check in tick_check_replacement()
commit 521c42990e9d561ed5ed9f501f07639d0512b3c9 upstream.
tick_check_replacement() returns if a replacement of clock_event_device is
possible or not. It does this as the first check:
if (tick_check_percpu(curdev, newdev, smp_processor_id()))
return false;
Thats wrong. tick_check_percpu() returns true when the device is
useable. Check for false instead.
[ tglx: Massaged changelog ]
Signed-off-by: Viresh Kumar <viresh.kumar(a)linaro.org>
Cc: linaro-kernel(a)lists.linaro.org
Cc: fweisbec(a)gmail.com
Cc: Arvind.Chauhan(a)arm.com
Cc: linaro-networking(a)linaro.org
Link: http://lkml.kernel.org/r/486a02efe0246635aaba786e24b42d316438bf3b.139753798…
Signed-off-by: Thomas Gleixner <tglx(a)linutronix.de>
Signed-off-by: Luis Henriques <luis.henriques(a)canonical.com>
---
kernel/time/tick-common.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/kernel/time/tick-common.c b/kernel/time/tick-common.c
index 64522ec..271ce26 100644
--- a/kernel/time/tick-common.c
+++ b/kernel/time/tick-common.c
@@ -260,7 +260,7 @@ static bool tick_check_preferred(struct clock_event_device *curdev,
bool tick_check_replacement(struct clock_event_device *curdev,
struct clock_event_device *newdev)
{
- if (tick_check_percpu(curdev, newdev, smp_processor_id()))
+ if (!tick_check_percpu(curdev, newdev, smp_processor_id()))
return false;
return tick_check_preferred(curdev, newdev);
--
1.9.1
There have been confusion all the time about which mailing list to follow for
cpufreq activities, linux-pm(a)vger.kernel.org or cpufreq(a)vger.kernel.org.
As Maintainers always wanted people to send patches to linux-pm(a)vger.kernel.org
and kernel source asked them to use cpufreq(a)vger.kernel.org.
Lets make linux-pm(a)vger.kernel.org the official mailing list for cpufreq stuff
and remove all references of cpufreq(a)vger.kernel.org from kernel source.
Later, we can remove the list as well from vger.kernel.org.
Signed-off-by: Viresh Kumar <viresh.kumar(a)linaro.org>
---
Documentation/ABI/testing/sysfs-devices-system-cpu | 4 ++--
Documentation/cpu-freq/index.txt | 4 ++--
MAINTAINERS | 2 --
drivers/cpufreq/speedstep-centrino.c | 2 +-
tools/power/cpupower/Makefile | 2 +-
tools/power/cpupower/debug/kernel/cpufreq-test_tsc.c | 2 +-
6 files changed, 7 insertions(+), 9 deletions(-)
diff --git a/Documentation/ABI/testing/sysfs-devices-system-cpu b/Documentation/ABI/testing/sysfs-devices-system-cpu
index d5a0d33..acb9bfc 100644
--- a/Documentation/ABI/testing/sysfs-devices-system-cpu
+++ b/Documentation/ABI/testing/sysfs-devices-system-cpu
@@ -128,7 +128,7 @@ Description: Discover cpuidle policy and mechanism
What: /sys/devices/system/cpu/cpu#/cpufreq/*
Date: pre-git history
-Contact: cpufreq(a)vger.kernel.org
+Contact: linux-pm(a)vger.kernel.org
Description: Discover and change clock speed of CPUs
Clock scaling allows you to change the clock speed of the
@@ -146,7 +146,7 @@ Description: Discover and change clock speed of CPUs
What: /sys/devices/system/cpu/cpu#/cpufreq/freqdomain_cpus
Date: June 2013
-Contact: cpufreq(a)vger.kernel.org
+Contact: linux-pm(a)vger.kernel.org
Description: Discover CPUs in the same CPU frequency coordination domain
freqdomain_cpus is the list of CPUs (online+offline) that share
diff --git a/Documentation/cpu-freq/index.txt b/Documentation/cpu-freq/index.txt
index 3d0b915..dc024ab 100644
--- a/Documentation/cpu-freq/index.txt
+++ b/Documentation/cpu-freq/index.txt
@@ -35,8 +35,8 @@ Mailing List
------------
There is a CPU frequency changing CVS commit and general list where
you can report bugs, problems or submit patches. To post a message,
-send an email to cpufreq(a)vger.kernel.org, to subscribe go to
-http://vger.kernel.org/vger-lists.html#cpufreq and follow the
+send an email to linux-pm(a)vger.kernel.org, to subscribe go to
+http://vger.kernel.org/vger-lists.html#linux-pm and follow the
instructions there.
Links
diff --git a/MAINTAINERS b/MAINTAINERS
index 6dc67b1..88b60d9 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2415,7 +2415,6 @@ F: drivers/net/ethernet/ti/cpmac.c
CPU FREQUENCY DRIVERS
M: Rafael J. Wysocki <rjw(a)rjwysocki.net>
M: Viresh Kumar <viresh.kumar(a)linaro.org>
-L: cpufreq(a)vger.kernel.org
L: linux-pm(a)vger.kernel.org
S: Maintained
T: git git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm.git
@@ -2426,7 +2425,6 @@ F: include/linux/cpufreq.h
CPU FREQUENCY DRIVERS - ARM BIG LITTLE
M: Viresh Kumar <viresh.kumar(a)linaro.org>
M: Sudeep Holla <sudeep.holla(a)arm.com>
-L: cpufreq(a)vger.kernel.org
L: linux-pm(a)vger.kernel.org
W: http://www.arm.com/products/processors/technologies/biglittleprocessing.php
S: Maintained
diff --git a/drivers/cpufreq/speedstep-centrino.c b/drivers/cpufreq/speedstep-centrino.c
index 6723f03..7d4a315 100644
--- a/drivers/cpufreq/speedstep-centrino.c
+++ b/drivers/cpufreq/speedstep-centrino.c
@@ -28,7 +28,7 @@
#include <asm/cpu_device_id.h>
#define PFX "speedstep-centrino: "
-#define MAINTAINER "cpufreq(a)vger.kernel.org"
+#define MAINTAINER "linux-pm(a)vger.kernel.org"
#define INTEL_MSR_RANGE (0xffff)
diff --git a/tools/power/cpupower/Makefile b/tools/power/cpupower/Makefile
index cbfec92..3651db7 100644
--- a/tools/power/cpupower/Makefile
+++ b/tools/power/cpupower/Makefile
@@ -62,7 +62,7 @@ LIB_MAJ= 0.0.0
LIB_MIN= 0
PACKAGE = cpupower
-PACKAGE_BUGREPORT = cpufreq(a)vger.kernel.org
+PACKAGE_BUGREPORT = linux-pm(a)vger.kernel.org
LANGUAGES = de fr it cs pt
diff --git a/tools/power/cpupower/debug/kernel/cpufreq-test_tsc.c b/tools/power/cpupower/debug/kernel/cpufreq-test_tsc.c
index 0f10b81..5224ee5 100644
--- a/tools/power/cpupower/debug/kernel/cpufreq-test_tsc.c
+++ b/tools/power/cpupower/debug/kernel/cpufreq-test_tsc.c
@@ -18,7 +18,7 @@
* 5.) if the third value, "diff_pmtmr", changes between 2. and 4., the
* TSC-based delay routine on the Linux kernel does not correctly
* handle the cpufreq transition. Please report this to
- * cpufreq(a)vger.kernel.org
+ * linux-pm(a)vger.kernel.org
*/
#include <linux/kernel.h>
--
1.7.12.rc2.18.g61b472e
This patch series adds Qualcomm SD Card Controller support in pl180 mmci
driver. QCom SDCC is basically a pl180, but bit more customized, some of the
register layouts and offsets are different to the ones mentioned in pl180
datasheet. The plan is to totally remove the standalone SDCC driver
drivers/mmc/host/msm_sdcc.* and start using generic mmci driver for all
Qualcomm parts, as we get chance to test on other Qcom boards.
To start using the existing mmci driver, a fake amba id for Qualcomm is added
in patches:
ARM: amba: Add Qualcomm vendor ID.
mmc: mmci: Add Qualcomm Id to amba id table.
Second change is, adding a 3 clock cycle delay for register writes on QCOM SDCC
registers, which is done in patches:
mmc: mmci: Add register read/write wrappers.
mmc: mmci: Add write delay to variant structure.
mmc: mmci: Qcomm: Add 3 clock cycle delay after each register write
Third change was to accommodate DATCTRL and MMCICLK register layout changes in
Qcom SDCC. Which is done in patches:
mmc: mmci: Add Qcom datactrl register variant
mmc: mmci: Add Qcom variations to MCICommand register.
mmc: mmci: Qcom fix MCICLK register settings.
mmc: mmci: Add clock support for Qualcomm.
Fourth major change was to add qcom specfic pio read function, the need for
this is because the way MCIFIFOCNT register behaved in QCOM SDCC is very
different to the one in pl180. This change is done in patch:
mmc: mmci: Add Qcom specific pio_read function.
Last some Qcom unrelated changes to support Qcom are done in patches:
mmc: mmci: use NSEC_PER_SEC macro
mmc: mmci: move ST specific register extensions access under condition.
This patches are tested in PIO mode on IFC8064 board with both eMMC and
external SD card. I would appreciate any feedback/suggestions on the overall
approach.
Thanks,
srini
Srinivas Kandagatla (12):
ARM: amba: Add Qualcomm vendor ID.
mmc: mmci: Add Qualcomm Id to amba id table
mmc: mmci: Add Qcom datactrl register variant
mmc: mmci: Add register read/write wrappers.
mmc: mmci: use NSEC_PER_SEC macro
mmc: mmci: Add write delay to variant structure.
mmc: mmci: Qcomm: Add 3 clock cycle delay after each register write
mmc: mmci: move ST specific register extensions access under condition.
mmc: mmci: Qcom fix MCICLK register settings.
mmc: mmci: Add clock support for Qualcomm.
mmc: mmci: Add Qcom variations to MCICommand register.
mmc: mmci: Add Qcom specific pio_read function.
drivers/mmc/host/mmci.c | 239 +++++++++++++++++++++++++++++++++-------------
drivers/mmc/host/mmci.h | 28 ++++++
include/linux/amba/bus.h | 1 +
3 files changed, 202 insertions(+), 66 deletions(-)
--
1.7.9.5
Hi Guys,
Here is my understanding of Dave's and Russell's suggestion on [1]
to use direct write of xol slot instructions to user space. Now
posting patch through 'git send-email' since, as it was noted, my
mailer corrupts patches otherwise.
Note default case with __copy_to_user is NOT tested. It addresses
David's remark.
Personally, I am very concerned about this patch because it creates
writable and executable page in traced process. The way how uprobes
is implemented such page will stay in process even if all uprobes
are detached from process. IMHO it may create possible attack hole.
I would prefer to see any executable memory read-only all the time.
On top of that, at least in ARM case xol page address is not even
randomized, which was perfectly fine with current nowrite/noread,
just execute permissions.
Patch follows this cover letter.
Thanks,
Victor
[1] http://lists.infradead.org/pipermail/linux-arm-kernel/2014-April/247763.html
Victor Kamensky (1):
ARM: uprobes xol write directly to userspace
arch/arm/kernel/uprobes.c | 8 ++++++++
include/linux/uprobes.h | 3 +++
kernel/events/uprobes.c | 28 +++++++++++++++++++---------
3 files changed, 30 insertions(+), 9 deletions(-)
--
1.8.1.4
This is LSK CMA backporting for armv8. I add some kernel config for CMA
enabling. With these config, kernel will be booted with following message:
cma: CMA: reserved 16 MiB at xxxxxxxx
Linaro Stable Kernel git tree:
git://git.linaro.org/kernel/linux-linaro-stable.git
Marek,
I saw you had mentioned testing this feature with cma-regions compatibility
layer and videobuf2-cma memory allocator module. But I didn't get it by google.
Could you give a link for them?
And I will more appreciate if you'd like to take a glance for review.
Thanks!
Alex
[PATCH 1/6] mm/cma: Move dma contiguous changes into a seperate
[PATCH 2/6] drivers: dma-contiguous: clean source code and prepare
[PATCH 3/6] arm64: Enable CMA
[PATCH 4/6] arm64: add CMA support for armv8
[PATCH 5/6] arm64: fix build error if DMA_CMA is enabled
[PATCH 6/6] arm64: Align CMA sizes to PAGE_SIZE