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4332 discussions

by Zach Pfeffer

The Linaro Android Platform 11.11 Cycle 11.11 started the last week of October after Linaro 11.10 was released on Oct 27th. The Android team had the RC for the 24th done on the 21st so that Bernhard Rosenkränzer and I could focus on ELC-E in Prague and the team could focus on getting ready for Linaro Connect Q4.11 in Orlando, Oct 31st through November 4th. The theme for 11.10 had been "make it shiny" as we wanted to put our best foot forward at ELC-E and during Connect. Prague went well. Bernhard and I did our presentation and ran the booth with Ricardo Salveti. We had a bit of excitement when one of our evening hacking sessions turned into a travel scramble as Arnd Bergman and others tried to find alternative flights after the French Air Strike. ELC-E Presentation, Linaro's Android Platform http://www.youtube.com/watch?v=zWuGDX6Sz2Y elinux.org tutorial http://elinux.org/Android_Tutorials_Unbox_to_App Everyone got to Connect okay and we set off on a very exciting week of planning, hacking, arguing and "socializing." We ran sessions on device tree, sched_mc, build improvements, automated testing, educational outreach, handling binaries, benchmarking, future plans, QA and gave a tutorial on how to use Linaro's Android distribution. Amit Pundir also started off his Linaro career with a great porting Android to new platforms session. Bernhard made great strides in supporting a dual toolchain, Chao Yang debugged libpng issues, Tony Månsson worked on Powertutor extensions, Frans Gifford got the CI loop working with each target, Prashanth Srinivasan onboarded by helping do and test builds and Abhishek Paliwal worked to unify our QA tests with each test description. We capped the week off with demos including, Vishal Bhoj's getting a Linphone based Video Conferencing App working, Noritsuna Imamura's Cluster Android App Engine and Botao Sun showing WiFi on Samsung Origen, Woot! Jon Medhurst (Tixy) was also able to make substantial progress getting Android running on Vexpress with Mathieu Poirier's help and Michael Edwards offered to help with our SGX upgrade. Linaro Connect: Demo Friday III http://www.youtube.com/watch?v=3lRxiTA6A10 Linaro Connect Q4.11 - Panda cloud cluster http://www.youtube.com/watch?v=pSGNf0KZ71c Linaro Android Tech Lead Zach Pfeffer at Linaro Connect http://www.youtube.com/watch?v=yVZ1kblmQMY Porting Android to New Platforms https://docs.google.com/a/linaro.org/viewer?a=v&pid=explorer&chrome=true&sr… After connect we set out to finish out 11.11, knowing that Ice Cream Sandwich (ICS) would land at anytime. Bernhard even had a cron job looking for new commits at AOSP. Even thought we live in the future we can't predict it and Patrik Ryd set out to upgrade our baseline to 2.3.7. The upgrade plus our usual work of upgrading to the latest Linaro toolchain and adding support for each board feature kept us busy until, Nov 14th's email about ICS dropping: http://groups.google.com/group/android-building/browse_thread/thread/4f85d9… Alexander Sack started syncing the code the minute is was ready, I started a build and VIshal and I started getting AOSP to compile on Pandaboard. Vishal fixed a few issues and we tried the AOSP first thing the next morning. AOSP running on Pandaboard http://www.youtube.com/user/pfefferzlinaro?feature=mhee#p/u/4/eaVszdsZ8aY Vishal also started looking into getting this running using just software GL and had a prototype working soon after that showed Panda running with a Linaro kernel Android 4.0.1 (ICS) with the Linaro Kernel http://www.youtube.com/watch?v=-LtjvekCDKM With this proof on concept Mathieu was able to get Snowball running ICS ICS running on Snowball http://www.youtube.com/watch?v=CvRg6OX0DL8 Alexander then challenged the group to get each board switched over and to release a preliminary release on Thanksgiving. With the wind at our backs the Linaro Android team achieved this. We had a few snags, the largest was related to the enormous strain that the ICS code base put on the existing infrastructure. On Friday Nov 18th, as we were getting ready to start cutting 2.3.7 releases, we had 2 coincident events: a cross git change that had to be reverted and a build system that couldn't sync the code base because of the expanded size of ICS in the git mirror. After a stand-up meeting Paul Sokolovsky saved the day be launching his seeded build mechanism that not only allowed the builds to go through, but cut down on the sync time. This change brought about a paradigm shift in build performance and reliability. 11.11 was an incredible cycle. The lessons learned were: 1. Gerrit doesn't handle cross git changes so it should be extended to 2. We need to ensure that each target in LAVA is stable 3. If things are starting to get chaotic then anyone can yell stopthepresses in #linaro-android and we'll all stop and regroup For 11.12 the high-level plan is to: 1. Compile ICS with Linaro's 4.6 Toolchain and send the source modifications to Google 2. Integrate our work on 2.3.7 including, libjpeg-turbo and ds-5 into ICS and send the changes to Google 3. Get PoCs for each binary, get them into linaro-android, enabling graphics and multimedia 11.12 starts tomorrow, Nov 28th, the 11.12 RCs will come out Dec. 20th and be cut on the 18th. Its going to be a great December! -- Zach Pfeffer Android Platform Team Lead, Linaro Platform Teams Linaro.org | Open source software for ARM SoCs Follow Linaro: http://www.facebook.com/pages/Linaro http://twitter.com/#!/linaroorg - http://www.linaro.org/linaro-blog

13 years, 5 months

[PATCH] backlight : add lp855x backlight driver

by Kim, Milo

Hello, Backlight Class Maintainer I send the patch for new lp855x backlight driver. This patch provides Texas Instruments LP855x backlight driver. * Supported Backlight ICs LP8550, LP8551, LP8552 and LP8556 * Consolidated Driver Just one driver file can support several LP855x backlight ICs. * Driver Description 1) Brightness control Brightness can be controlled by pwm input or i2c command. lp855x driver support both cases. PWM are platform specific data, so the driver provides pwm functions in lp855x_platform_data structure. 2) Debugfs nodes : For debug purpose, 3 files are exported in the debugfs. a) bl_ctl_mode : backlight control mode pwm based or register based b) chip_id : lp855x chip id lp8550/lp8551/lp8552/lp8556 c) registers we can control the lp855x registers via the debugfs. read/write/dump mode are supported. 3) Platform data for lp855x a) name : backlight driver name b) mode : brightness control by pwm or lp855x register c) device_control : value of DEVICE CONTROL register d) initial_brightness : initial value of backlight brightness e) max_brightness : maximum value of backlight brightness f) pwm_data : platform specific pwm generation functions. Only valid when brightness is pwm input mode. g) load_new_rom_data : 0 : use default configuration data 1 : update values of eeprom or eprom registers on loading driver h) size_program : total size of lp855x_rom_data i) rom_data : list of new eeprom/eprom registers example 1) lp8552 platform data : i2c register mode with new eeprom data static struct lp855x_rom_data lp8552_eeprom_arr[] = { {0xa5, 0x4f}, /* EN_VSYNC=0 */ }; static struct lp855x_platform_data lp8552_pdata = { .name = "lcd-backlight", .mode = REGISTER_BASED, .device_control = I2C_CONFIG(LP8552), .initial_brightness = INITIAL_BRT, .max_brightness = MAX_BRT, .load_new_rom_data = 1, .size_program = ARRAY_SIZE(lp8552_eeprom_arr), .rom_data = lp8552_eeprom_arr, }; example 2) lp8556 platform data : pwm input mode static struct lp855x_platform_data lp8556_pdata = { .name = "lcd-backlight", .mode = PWM_BASED, .device_control = PWM_CONFIG(LP8556), .initial_brightness = INITIAL_BRT, .max_brightness = MAX_BRT, .pwm_data = { .pwm_set_intensity = platform_pwm_set_intensity, .pwm_get_intensity = platform_pwm_get_intensity, }, }; * Test Environment OMAP3530 beagelborad with LP8551/LP8552/LP8556 ICs >From 903ca54f2da059321f6f1519af79aeec19aff577 Mon Sep 17 00:00:00 2001 From: Milo(Woogyom) Kim <milo.kim(a)ti.com> Date: Mon, 28 Nov 2011 10:48:07 +0900 Subject: [PATCH] backlight : add lp855x backlight driver Signed-off-by: Milo(Woogyom) Kim <milo.kim(a)ti.com> --- drivers/video/backlight/Kconfig | 6 + drivers/video/backlight/Makefile | 1 + drivers/video/backlight/lp855x_bl.c | 473 +++++++++++++++++++++++++++++++++++ include/linux/lp855x.h | 123 +++++++++ 4 files changed, 603 insertions(+), 0 deletions(-) create mode 100755 drivers/video/backlight/lp855x_bl.c create mode 100644 include/linux/lp855x.h diff --git a/drivers/video/backlight/Kconfig b/drivers/video/backlight/Kconfig index 278aeaa..9e7ba76 100644 --- a/drivers/video/backlight/Kconfig +++ b/drivers/video/backlight/Kconfig @@ -342,6 +342,12 @@ config BACKLIGHT_AAT2870 If you have a AnalogicTech AAT2870 say Y to enable the backlight driver. +config BACKLIGHT_LP855X + tristate "Backlight driver for Texas Instruments LP855X" + depends on BACKLIGHT_CLASS_DEVICE && I2C + help + This supports TI LP8550, LP8551, LP8552 and LP8556 backlight driver. + endif # BACKLIGHT_CLASS_DEVICE endif # BACKLIGHT_LCD_SUPPORT diff --git a/drivers/video/backlight/Makefile b/drivers/video/backlight/Makefile index fdd1fc4..91ae232 100644 --- a/drivers/video/backlight/Makefile +++ b/drivers/video/backlight/Makefile @@ -39,4 +39,5 @@ obj-$(CONFIG_BACKLIGHT_ADP8870) += adp8870_bl.o obj-$(CONFIG_BACKLIGHT_88PM860X) += 88pm860x_bl.o obj-$(CONFIG_BACKLIGHT_PCF50633) += pcf50633-backlight.o obj-$(CONFIG_BACKLIGHT_AAT2870) += aat2870_bl.o +obj-$(CONFIG_BACKLIGHT_LP855X) += lp855x_bl.o diff --git a/drivers/video/backlight/lp855x_bl.c b/drivers/video/backlight/lp855x_bl.c new file mode 100755 index 0000000..2bae816 --- /dev/null +++ b/drivers/video/backlight/lp855x_bl.c @@ -0,0 +1,473 @@ +/* + * TI LP855x Backlight Driver + * + * Copyright (C) 2011 Texas Instruments + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#include <linux/module.h> +#include <linux/slab.h> +#include <linux/i2c.h> +#include <linux/backlight.h> +#include <linux/err.h> +#include <linux/debugfs.h> +#include <linux/uaccess.h> +#include <linux/lp855x.h> + +#define BRIGHTNESS_CTRL (0x00) +#define DEVICE_CTRL (0x01) + +#ifdef CONFIG_DEBUG_FS +struct debug_dentry { + struct dentry *dir; + struct dentry *reg; + struct dentry *chip; + struct dentry *blmode; +}; +#endif + +struct lp855x { + const char *chipid; + struct i2c_client *client; + struct backlight_device *bl; + struct device *dev; + struct mutex xfer_lock; + struct lp855x_platform_data *pdata; +#ifdef CONFIG_DEBUG_FS + struct debug_dentry dd; +#endif +}; + +static int lp855x_i2c_read(struct lp855x *lp, u8 reg, u8 *data, u8 len) +{ + s32 ret; + + mutex_lock(&lp->xfer_lock); + ret = i2c_smbus_read_i2c_block_data(lp->client, reg, len, data); + mutex_unlock(&lp->xfer_lock); + + return (ret != len) ? -EIO : 0; +} + +static int lp855x_i2c_write(struct lp855x *lp, u8 reg, u8 *data, u8 len) +{ + s32 ret; + + mutex_lock(&lp->xfer_lock); + ret = i2c_smbus_write_i2c_block_data(lp->client, reg, len, data); + mutex_unlock(&lp->xfer_lock); + + return ret; +} + +static inline int lp855x_read_byte(struct lp855x *lp, u8 reg, u8 *data) +{ + return lp855x_i2c_read(lp, reg, data, 1); +} + +static inline int lp855x_write_byte(struct lp855x *lp, u8 reg, u8 data) +{ + u8 written = data; + return lp855x_i2c_write(lp, reg, &written, 1); +} + +#ifdef CONFIG_DEBUG_FS +static int lp855x_dbg_open(struct inode *inode, struct file *file) +{ + file->private_data = inode->i_private; + return 0; +} + +static ssize_t lp855x_help_register(struct file *file, char __user *userbuf, + size_t count, loff_t *ppos) +{ + char buf[320]; + unsigned int len; + const char *help = "\n How to read/write LP855x registers\n\n \ + (example) To read 0x00 register,\n \ + echo 0x00 r > /sys/kernel/debug/lp855x/registers\n \ + To write 0xff into 0x1 address,\n \ + echo 0x00 0xff w > /sys/kernel/debug/lp855x/registers \n \ + To dump values from 0x00 to 0x06 address,\n \ + echo 0x00 0x06 d > /sys/kernel/debug/lp855x/registers\n"; + + len = snprintf(buf, sizeof(buf), "%s\n", help); + if (len > sizeof(buf)) + len = sizeof(buf); + + return simple_read_from_buffer(userbuf, count, ppos, buf, len); +} + +static char *lp855x_parse_register_cmd(const char *cmd, u8 *byte) +{ + char tmp[10]; + char *blank; + unsigned long arg; + + blank = strchr(cmd, ' '); + memset(tmp, 0x0, sizeof(tmp)); + memcpy(tmp, cmd, blank - cmd); + + if (strict_strtol(tmp, 16, &arg) < 0) + return NULL; + + *byte = arg; + return blank; +} + +static ssize_t lp855x_ctrl_register(struct file *file, + const char __user *userbuf, size_t count, + loff_t *ppos) +{ + char mode, buf[20]; + char *pos, *pos2; + u8 i, arg1, arg2, val; + struct lp855x *lp = file->private_data; + + if (copy_from_user(buf, userbuf, min(count, sizeof(buf)))) + return -EFAULT; + + mode = buf[count - 2]; + switch (mode) { + case 'r': + if (!lp855x_parse_register_cmd(buf, &arg1)) + return -EINVAL; + + lp855x_read_byte(lp, arg1, &val); + dev_info(lp->dev, "Read [0x%.2x] = 0x%.2x\n", arg1, val); + break; + case 'w': + pos = lp855x_parse_register_cmd(buf, &arg1); + if (!pos) + return -EINVAL; + pos2 = lp855x_parse_register_cmd(pos + 1, &arg2); + if (!pos2) + return -EINVAL; + + lp855x_write_byte(lp, arg1, arg2); + dev_info(lp->dev, "Written [0x%.2x] = 0x%.2x\n", arg1, arg2); + break; + case 'd': + pos = lp855x_parse_register_cmd(buf, &arg1); + if (!pos) + return -EINVAL; + pos2 = lp855x_parse_register_cmd(pos + 1, &arg2); + if (!pos2) + return -EINVAL; + + for (i = arg1; i <= arg2; i++) { + lp855x_read_byte(lp, i, &val); + dev_info(lp->dev, "Read [0x%.2x] = 0x%.2x\n", i, val); + } + break; + default: + break; + } + + return count; +} + +static ssize_t lp855x_get_chipid(struct file *file, char __user *userbuf, + size_t count, loff_t *ppos) +{ + struct lp855x *lp = file->private_data; + char buf[10]; + unsigned int len; + + len = snprintf(buf, sizeof(buf), "%s\n", lp->chipid); + + if (len > sizeof(buf)) + len = sizeof(buf); + + return simple_read_from_buffer(userbuf, count, ppos, buf, len); +} + +static ssize_t lp855x_get_bl_mode(struct file *file, char __user *userbuf, + size_t count, loff_t *ppos) +{ + char buf[20]; + unsigned int len; + char *strmode = NULL; + struct lp855x *lp = file->private_data; + enum lp855x_brightness_ctrl_mode mode = lp->pdata->mode; + + if (mode == PWM_BASED) + strmode = "pwm based"; + else if (mode == REGISTER_BASED) + strmode = "register based"; + + len = snprintf(buf, sizeof(buf), "%s\n", strmode); + + if (len > sizeof(buf)) + len = sizeof(buf); + + return simple_read_from_buffer(userbuf, count, ppos, buf, len); +} + +#define LP855X_DBG_ENTRY(name, pread, pwrite) \ +static const struct file_operations dbg_##name##_fops = { \ + .open = lp855x_dbg_open, \ + .read = pread, \ + .write = pwrite, \ + .owner = THIS_MODULE, \ + .llseek = default_llseek, \ +} + +LP855X_DBG_ENTRY(registers, lp855x_help_register, lp855x_ctrl_register); +LP855X_DBG_ENTRY(chip, lp855x_get_chipid, NULL); +LP855X_DBG_ENTRY(blmode, lp855x_get_bl_mode, NULL); + +static void lp855x_create_debugfs(struct lp855x *lp) +{ + struct debug_dentry *dd = &lp->dd; + + dd->dir = debugfs_create_dir("lp855x", NULL); + + dd->reg = debugfs_create_file("registers", S_IWUSR | S_IRUGO, + dd->dir, lp, &dbg_registers_fops); + + dd->chip = debugfs_create_file("chip_id", S_IRUGO, + dd->dir, lp, &dbg_chip_fops); + + dd->blmode = debugfs_create_file("bl_ctl_mode", S_IRUGO, + dd->dir, lp, &dbg_blmode_fops); +} + +static void lp855x_remove_debugfs(struct lp855x *lp) +{ + struct debug_dentry *dd = &lp->dd; + + debugfs_remove(dd->blmode); + debugfs_remove(dd->chip); + debugfs_remove(dd->reg); + debugfs_remove(dd->dir); +} +#else +static inline void lp855x_create_debugfs(struct lp855x *lp) +{ + return; +} + +static inline void lp855x_remove_debugfs(struct lp855x *lp) +{ + return; +} +#endif + +static int lp855x_is_valid_rom_area(struct lp855x *lp, u8 addr) +{ + const char *id = lp->chipid; + u8 start, end; + + if (strstr(id, "lp8550") || strstr(id, "lp8551") + || strstr(id, "lp8552")) { + start = EEPROM_START; + end = EEPROM_END; + } else if (strstr(id, "lp8556")) { + start = EPROM_START; + end = EPROM_END; + } + + return (addr >= start && addr <= end) ? 1 : 0; +} + +static void lp855x_init_device(struct lp855x *lp) +{ + u8 val, addr; + int i, ret; + struct lp855x_platform_data *pd = lp->pdata; + + if (pd->load_new_rom_data && pd->size_program) { + for (i = 0; i < pd->size_program; i++) { + addr = pd->rom_data[i].addr; + val = pd->rom_data[i].val; + if (!lp855x_is_valid_rom_area(lp, addr)) + continue; + + ret |= lp855x_write_byte(lp, addr, val); + } + } + + val = pd->initial_brightness; + ret |= lp855x_write_byte(lp, BRIGHTNESS_CTRL, val); + + val = pd->device_control; + ret |= lp855x_write_byte(lp, DEVICE_CTRL, val); + + if (ret) + dev_err(lp->dev, "i2c write err\n"); +} + +static int lp855x_bl_update_status(struct backlight_device *bl) +{ + struct lp855x *lp = bl_get_data(bl); + enum lp855x_brightness_ctrl_mode mode = lp->pdata->mode; + + if (bl->props.state & BL_CORE_SUSPENDED) + bl->props.brightness = 0; + + if (mode == PWM_BASED) { + struct lp855x_pwm_data *pd = &lp->pdata->pwm_data; + int br = bl->props.brightness; + int max_br = bl->props.max_brightness; + + if (pd->pwm_set_intensity) + pd->pwm_set_intensity(br, max_br); + + } else if (mode == REGISTER_BASED) { + u8 val = bl->props.brightness; + lp855x_write_byte(lp, BRIGHTNESS_CTRL, val); + } + + return (bl->props.brightness); +} + +static int lp855x_bl_get_brightness(struct backlight_device *bl) +{ + struct lp855x *lp = bl_get_data(bl); + enum lp855x_brightness_ctrl_mode mode = lp->pdata->mode; + + if (mode == PWM_BASED) { + struct lp855x_pwm_data *pd = &lp->pdata->pwm_data; + int max_br = bl->props.max_brightness; + + if (pd->pwm_get_intensity) + bl->props.brightness = pd->pwm_get_intensity(max_br); + + } else if (mode == REGISTER_BASED) { + u8 val; + + lp855x_read_byte(lp, BRIGHTNESS_CTRL, &val); + bl->props.brightness = val; + } + + return (bl->props.brightness); +} + +static const struct backlight_ops lp855x_bl_ops = { + .options = BL_CORE_SUSPENDRESUME, + .update_status = lp855x_bl_update_status, + .get_brightness = lp855x_bl_get_brightness, +}; + +static int lp855x_backlight_register(struct lp855x *lp) +{ + struct backlight_device *bl; + struct backlight_properties props; + const char *name = lp->pdata->name; + + if (!name) + return -ENODEV; + + props.brightness = lp->pdata->initial_brightness; + props.max_brightness = + (lp->pdata->max_brightness < lp->pdata->initial_brightness) ? + 255 : lp->pdata->max_brightness; + + bl = backlight_device_register(name, lp->dev, lp, + &lp855x_bl_ops, &props); + if (IS_ERR(bl)) + return -EIO; + + lp->bl = bl; + + return 0; +} + +static void lp855x_backlight_unregister(struct lp855x *lp) +{ + if (lp->bl) + backlight_device_unregister(lp->bl); +} + +static int lp855x_probe(struct i2c_client *cl, const struct i2c_device_id *id) +{ + struct lp855x *lp; + struct lp855x_platform_data *pdata = cl->dev.platform_data; + int ret; + + if (!i2c_check_functionality(cl->adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) + goto err_io; + + lp = kzalloc(sizeof(struct lp855x), GFP_KERNEL); + if (!lp) + goto err_mem; + + lp->client = cl; + lp->dev = &cl->dev; + lp->pdata = pdata; + lp->chipid = id->name; + i2c_set_clientdata(cl, lp); + + mutex_init(&lp->xfer_lock); + + lp855x_init_device(lp); + ret = lp855x_backlight_register(lp); + if (ret) + goto err_dev; + + backlight_update_status(lp->bl); + lp855x_create_debugfs(lp); + + return ret; + +err_io: + return -EIO; +err_mem: + return -ENOMEM; +err_dev: + dev_err(lp->dev, "can not register backlight device. errcode = %d\n", + ret); + kfree(lp); + return ret; +} + +static int __devexit lp855x_remove(struct i2c_client *cl) +{ + struct lp855x *lp = i2c_get_clientdata(cl); + + lp->bl->props.brightness = 0; + backlight_update_status(lp->bl); + lp855x_remove_debugfs(lp); + lp855x_backlight_unregister(lp); + kfree(lp); + + return 0; +} + +static const struct i2c_device_id lp855x_ids[] = { + {"lp8550", LP8550}, + {"lp8551", LP8551}, + {"lp8552", LP8552}, + {"lp8556", LP8556}, +}; + +static struct i2c_driver lp855x_driver = { + .driver = { + .name = "lp855x", + }, + .probe = lp855x_probe, + .remove = __devexit_p(lp855x_remove), + .id_table = lp855x_ids, +}; + +static int __init lp855x_init(void) +{ + return i2c_add_driver(&lp855x_driver); +} + +static void __exit lp855x_exit(void) +{ + i2c_del_driver(&lp855x_driver); +} + +module_init(lp855x_init); +module_exit(lp855x_exit); + +MODULE_DESCRIPTION("Texas Instruments LP855x Backlight driver"); +MODULE_AUTHOR("Milo Kim <milo.kim(a)ti.com>, Dainel Jeong <daniel.jeong(a)ti.com>"); +MODULE_LICENSE("GPL"); diff --git a/include/linux/lp855x.h b/include/linux/lp855x.h new file mode 100644 index 0000000..5078558 --- /dev/null +++ b/include/linux/lp855x.h @@ -0,0 +1,123 @@ +/* + * lp855x.h - TI LP8556 Backlight Driver + * + * Copyright (C) 2011 Texas Instruments + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#ifndef _LP855X_H +#define _LP855X_H + +#define BL_CTL_SHFT (0) +#define BRT_MODE_SHFT (1) +#define BRT_MODE_MASK (0x06) + +/* Enable backlight. Only valid when BRT_MODE=10(I2C only) */ +#define ENABLE_BL (1) +#define DISABLE_BL (0) + +#define I2C_CONFIG(id) id ## _I2C_CONFIG +#define PWM_CONFIG(id) id ## _PWM_CONFIG + +/* DEVICE CONTROL register - LP8550 */ +#define LP8550_PWM_CONFIG (LP8550_PWM_ONLY << BRT_MODE_SHFT) +#define LP8550_I2C_CONFIG ((ENABLE_BL << BL_CTL_SHFT) | \ + (LP8550_I2C_ONLY << BRT_MODE_SHFT)) + +/* DEVICE CONTROL register - LP8551 */ +#define LP8551_PWM_CONFIG LP8550_PWM_CONFIG +#define LP8551_I2C_CONFIG LP8550_I2C_CONFIG + +/* DEVICE CONTROL register - LP8552 */ +#define LP8552_PWM_CONFIG LP8550_PWM_CONFIG +#define LP8552_I2C_CONFIG LP8550_I2C_CONFIG + +/* DEVICE CONTROL register - LP8556 */ +#define LP8556_PWM_CONFIG (LP8556_PWM_ONLY << BRT_MODE_SHFT) +#define LP8556_COMB1_CONFIG (LP8556_COMBINED1 << BRT_MODE_SHFT) +#define LP8556_I2C_CONFIG ((ENABLE_BL << BL_CTL_SHFT) | \ + (LP8556_I2C_ONLY << BRT_MODE_SHFT)) +#define LP8556_COMB2_CONFIG (LP8556_COMBINED2 << BRT_MODE_SHFT) + +/* ROM area boundary */ +#define EEPROM_START (0xA0) +#define EEPROM_END (0xA7) +#define EPROM_START (0xA0) +#define EPROM_END (0xAF) + +enum lp855x_chip_id { + LP8550, + LP8551, + LP8552, + LP8556, +}; + +enum lp855x_brightness_ctrl_mode { + PWM_BASED = 1, + REGISTER_BASED, +}; + +enum lp8550_brighntess_source { + LP8550_PWM_ONLY, + LP8550_I2C_ONLY = 2, +}; + +enum lp8551_brighntess_source { + LP8551_PWM_ONLY = LP8550_PWM_ONLY, + LP8551_I2C_ONLY = LP8550_I2C_ONLY, +}; + +enum lp8552_brighntess_source { + LP8552_PWM_ONLY = LP8550_PWM_ONLY, + LP8552_I2C_ONLY = LP8550_I2C_ONLY, +}; + +enum lp8556_brightness_source { + LP8556_PWM_ONLY, + LP8556_COMBINED1, /* pwm + i2c before the shaper block */ + LP8556_I2C_ONLY, + LP8556_COMBINED2, /* pwm + i2c after the shaper block */ +}; + +struct lp855x_pwm_data { + void (*pwm_set_intensity) (int brightness, int max_brightness); + int (*pwm_get_intensity) (int max_brightness); +}; + +struct lp855x_rom_data { + u8 addr; + u8 val; +}; + +/** + * struct lp855x_platform_data + * @name : backlight driver name + * @mode : brightness control by pwm or lp855x register + * @device_control : value of DEVICE CONTROL register + * @initial_brightness : initial value of backlight brightness + * @max_brightness : maximum value of backlight brightness + * @pwm_data : platform specific pwm generation functions. + Only valid when mode is PWM_BASED. + * @load_new_rom_data : + 0 : use default configuration data + 1 : update values of eeprom or eprom registers on loading driver + * @size_program : total size of lp855x_rom_data + * @rom_data : list of new eeprom/eprom registers + */ +struct lp855x_platform_data { + const char *name; + enum lp855x_brightness_ctrl_mode mode; + u8 device_control; + int initial_brightness; + int max_brightness; + struct lp855x_pwm_data pwm_data; + u8 load_new_rom_data; + int size_program; + struct lp855x_rom_data *rom_data; +}; + +#endif -- 1.7.4.1 Best Regards Milo (Woogyom) Kim Texas Instruments Incorporated Software Engineer Mobile Lighting & Power Office : +82-2-560-6963

13 years, 5 months

Was: Track the Linaro Roadmap on status.linaro.org

by Fathi Boudra

On 26 November 2011 12:37, Raffaele Recalcati <lamiaposta71(a)gmail.com> wrote: > 1 download monthly release for each official board (ubuntu, android) > 2 linaro-media-create it > 3 simple benchmark tests (boot is clean, video decoding, QT or Android > gui is responsive, browser) and report it > 4 keep a SD card for android and ubuntu for this month and the > previous (only 4*2*2=16 SD cards needed) in order to see quickly the > differences. You can do all of this right now. Though, we don't publish an analysis between releases as you suggest on step 4. > If not why? This can give an help to industrial application of Linaro. > > Thx, > Raffaele Cheers -- Fathi Boudra Linaro Release Manager | Validation Project Manager Linaro.org | Open source software for ARM SoCs

13 years, 5 months

Track the Linaro Roadmap on status.linaro.org

by Mattias Backman

Hi all, To support the new Linaro roadmap process, the Infrastructure team has added new reports to status.linaro.org. You can find the status for the current quarter here and drill down into the cards targeted for Q4. http://status.linaro.org/11.11/roadmap-2011Q4.html There's of course work left to do, for instance there's a big backlog of status graphs and some layout tweaks to handle. Not to mention finding a good time to switch the status.linaro.org index page over to the roadmap. Still we believe that this will already be useful for everyone to keep an eye on the roadmap and how your work supports the long term goals. Direct any questions you may have about the tech details to Infrastructure and your TL can help you with connecting your blueprints to the roadmap cards. The Linaro Roadmap wiki page is also a good read: https://wiki.linaro.org/Process/Roadmap Thanks, Mattias

13 years, 5 months

[RFC 0/3] OMAP pinmux driver

by Rajendra Nayak

Hi Linus, Tony, This RFC series adds pinmux support for OMAP using the pinctrl framework. Though it adds a pinmux-omap.c driver file, it currently only supports OMAP4 and also has very few function/pin-groups defined. I have also retained the existing muxing done from board files using the OMAP-mux framework since this series does not handle configuring pull up/downs for pins, and only looks at pin-muxing. These are still early patches, but I wanted to get some feedback on if I am heading in the right direction. Hence sharing these in the current form. regards, Rajendra Rajendra Nayak (3): pinctrl: add a driver for the OMAP pinmux ARM: omap4: Add omap4 pinmux devices for core and wkup ARM: omap4: Add pinmux map in SDP and PANDA board files arch/arm/mach-omap2/board-4430sdp.c | 10 + arch/arm/mach-omap2/board-omap4panda.c | 11 + arch/arm/mach-omap2/devices.c | 43 ++ drivers/pinctrl/Kconfig | 7 + drivers/pinctrl/Makefile | 1 + drivers/pinctrl/pinmux-omap.c | 735 ++++++++++++++++++++++++++++++++ 6 files changed, 807 insertions(+), 0 deletions(-) create mode 100644 drivers/pinctrl/pinmux-omap.c

13 years, 5 months

[PATCH v2] S5PC2XX: Rename S5pc2XX to exynos4

by Chander Kashyap

As per new conventions Samsung SoC's are named as Exynos. Cortex-A9 based Soc's are named as exynos4. s5pc2xx is cortex-A9 based, hence renamed to exynos4. This is done as per kernel naming convetions. Similerly s5pc210 is now exynos4210. Hence S5PC210/s5pc210 suffix/prefix has been renamed to exynos4210/EXYNOS4210 Signed-off-by: Chander Kashyap <chander.kashyap(a)linaro.org> --- Changes for v2: - Removed renaming of s5p-common to exynos4-common - Renamed s5pc210 prefixes to exynos4210 Rebased on following commit. 19cdfd3e84bff108febb127b598ac3f1634c768c "Ethernut 5 board support" MAINTAINERS | 6 +- Makefile | 2 +- arch/arm/cpu/armv7/{s5pc2xx => exynos4}/Makefile | 0 arch/arm/cpu/armv7/{s5pc2xx => exynos4}/clock.c | 50 ++++++++-------- arch/arm/cpu/armv7/{s5pc2xx => exynos4}/soc.c | 0 .../asm/{arch-s5pc2xx => arch-exynos4}/adc.h | 0 .../asm/{arch-s5pc2xx => arch-exynos4}/clk.h | 0 .../asm/{arch-s5pc2xx => arch-exynos4}/clock.h | 2 +- .../asm/{arch-s5pc2xx => arch-exynos4}/cpu.h | 62 ++++++++++---------- .../asm/{arch-s5pc2xx => arch-exynos4}/gpio.h | 28 +++++----- .../asm/{arch-s5pc2xx => arch-exynos4}/mmc.h | 0 .../asm/{arch-s5pc2xx => arch-exynos4}/pwm.h | 0 .../asm/{arch-s5pc2xx => arch-exynos4}/sromc.h | 0 .../asm/{arch-s5pc2xx => arch-exynos4}/sys_proto.h | 0 .../asm/{arch-s5pc2xx => arch-exynos4}/uart.h | 0 board/samsung/origen/lowlevel_init.S | 26 ++++---- board/samsung/origen/mem_setup.S | 12 ++-- board/samsung/origen/origen.c | 8 +- board/samsung/origen/origen_setup.h | 8 +- board/samsung/smdkv310/lowlevel_init.S | 22 ++++---- board/samsung/smdkv310/mem_setup.S | 8 +- board/samsung/smdkv310/smdkv310.c | 8 +- board/samsung/universal_c210/lowlevel_init.S | 24 ++++---- board/samsung/universal_c210/universal.c | 8 +- boards.cfg | 6 +- include/configs/origen.h | 6 +- include/configs/s5pc210_universal.h | 10 ++-- include/configs/smdkv310.h | 6 +- 28 files changed, 151 insertions(+), 151 deletions(-) rename arch/arm/cpu/armv7/{s5pc2xx => exynos4}/Makefile (100%) rename arch/arm/cpu/armv7/{s5pc2xx => exynos4}/clock.c (80%) rename arch/arm/cpu/armv7/{s5pc2xx => exynos4}/soc.c (100%) rename arch/arm/include/asm/{arch-s5pc2xx => arch-exynos4}/adc.h (100%) rename arch/arm/include/asm/{arch-s5pc2xx => arch-exynos4}/clk.h (100%) rename arch/arm/include/asm/{arch-s5pc2xx => arch-exynos4}/clock.h (99%) rename arch/arm/include/asm/{arch-s5pc2xx => arch-exynos4}/cpu.h (64%) rename arch/arm/include/asm/{arch-s5pc2xx => arch-exynos4}/gpio.h (83%) rename arch/arm/include/asm/{arch-s5pc2xx => arch-exynos4}/mmc.h (100%) rename arch/arm/include/asm/{arch-s5pc2xx => arch-exynos4}/pwm.h (100%) rename arch/arm/include/asm/{arch-s5pc2xx => arch-exynos4}/sromc.h (100%) rename arch/arm/include/asm/{arch-s5pc2xx => arch-exynos4}/sys_proto.h (100%) rename arch/arm/include/asm/{arch-s5pc2xx => arch-exynos4}/uart.h (100%) diff --git a/MAINTAINERS b/MAINTAINERS index 37bbb34..d493e4e 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -691,12 +691,12 @@ Minkyu Kang <mk7.kang(a)samsung.com> SMDKC100 ARM ARMV7 (S5PC100 SoC) s5p_goni ARM ARMV7 (S5PC110 SoC) - s5pc210_universal ARM ARMV7 (S5PC210 SoC) + s5pc210_universal ARM ARMV7 (EXYNOS4210 SoC) Chander Kashyap <k.chander(a)samsung.com> - origen ARM ARMV7 (S5PC210 SoC) - SMDKV310 ARM ARMV7 (S5PC210 SoC) + origen ARM ARMV7 (EXYNOS4210 SoC) + SMDKV310 ARM ARMV7 (EXYNOS4210 SoC) Torsten Koschorrek <koschorrek(a)synertronixx.de> scb9328 ARM920T (i.MXL) diff --git a/Makefile b/Makefile index fb658f4..646b105 100644 --- a/Makefile +++ b/Makefile @@ -296,7 +296,7 @@ endif ifeq ($(SOC),s5pc1xx) LIBS += $(CPUDIR)/s5p-common/libs5p-common.o endif -ifeq ($(SOC),s5pc2xx) +ifeq ($(SOC),exynos4) LIBS += $(CPUDIR)/s5p-common/libs5p-common.o endif diff --git a/arch/arm/cpu/armv7/s5pc2xx/Makefile b/arch/arm/cpu/armv7/exynos4/Makefile similarity index 100% rename from arch/arm/cpu/armv7/s5pc2xx/Makefile rename to arch/arm/cpu/armv7/exynos4/Makefile diff --git a/arch/arm/cpu/armv7/s5pc2xx/clock.c b/arch/arm/cpu/armv7/exynos4/clock.c similarity index 80% rename from arch/arm/cpu/armv7/s5pc2xx/clock.c rename to arch/arm/cpu/armv7/exynos4/clock.c index 5ecd475..668166a 100644 --- a/arch/arm/cpu/armv7/s5pc2xx/clock.c +++ b/arch/arm/cpu/armv7/exynos4/clock.c @@ -30,11 +30,11 @@ #define CONFIG_SYS_CLK_FREQ_C210 24000000 #endif -/* s5pc210: return pll clock frequency */ -static unsigned long s5pc210_get_pll_clk(int pllreg) +/* exynos4210: return pll clock frequency */ +static unsigned long exynos4210_get_pll_clk(int pllreg) { - struct s5pc210_clock *clk = - (struct s5pc210_clock *)samsung_get_base_clock(); + struct exynos4210_clock *clk = + (struct exynos4210_clock *)samsung_get_base_clock(); unsigned long r, m, p, s, k = 0, mask, fout; unsigned int freq; @@ -96,11 +96,11 @@ static unsigned long s5pc210_get_pll_clk(int pllreg) return fout; } -/* s5pc210: return ARM clock frequency */ -static unsigned long s5pc210_get_arm_clk(void) +/* exynos4210: return ARM clock frequency */ +static unsigned long exynos4210_get_arm_clk(void) { - struct s5pc210_clock *clk = - (struct s5pc210_clock *)samsung_get_base_clock(); + struct exynos4210_clock *clk = + (struct exynos4210_clock *)samsung_get_base_clock(); unsigned long div; unsigned long dout_apll; unsigned int apll_ratio; @@ -115,11 +115,11 @@ static unsigned long s5pc210_get_arm_clk(void) return dout_apll; } -/* s5pc210: return pwm clock frequency */ -static unsigned long s5pc210_get_pwm_clk(void) +/* exynos4210: return pwm clock frequency */ +static unsigned long exynos4210_get_pwm_clk(void) { - struct s5pc210_clock *clk = - (struct s5pc210_clock *)samsung_get_base_clock(); + struct exynos4210_clock *clk = + (struct exynos4210_clock *)samsung_get_base_clock(); unsigned long pclk, sclk; unsigned int sel; unsigned int ratio; @@ -158,11 +158,11 @@ static unsigned long s5pc210_get_pwm_clk(void) return pclk; } -/* s5pc210: return uart clock frequency */ -static unsigned long s5pc210_get_uart_clk(int dev_index) +/* exynos4210: return uart clock frequency */ +static unsigned long exynos4210_get_uart_clk(int dev_index) { - struct s5pc210_clock *clk = - (struct s5pc210_clock *)samsung_get_base_clock(); + struct exynos4210_clock *clk = + (struct exynos4210_clock *)samsung_get_base_clock(); unsigned long uclk, sclk; unsigned int sel; unsigned int ratio; @@ -205,11 +205,11 @@ static unsigned long s5pc210_get_uart_clk(int dev_index) return uclk; } -/* s5pc210: set the mmc clock */ -static void s5pc210_set_mmc_clk(int dev_index, unsigned int div) +/* exynos4210: set the mmc clock */ +static void exynos4210_set_mmc_clk(int dev_index, unsigned int div) { - struct s5pc210_clock *clk = - (struct s5pc210_clock *)samsung_get_base_clock(); + struct exynos4210_clock *clk = + (struct exynos4210_clock *)samsung_get_base_clock(); unsigned int addr; unsigned int val; @@ -234,25 +234,25 @@ static void s5pc210_set_mmc_clk(int dev_index, unsigned int div) unsigned long get_pll_clk(int pllreg) { - return s5pc210_get_pll_clk(pllreg); + return exynos4210_get_pll_clk(pllreg); } unsigned long get_arm_clk(void) { - return s5pc210_get_arm_clk(); + return exynos4210_get_arm_clk(); } unsigned long get_pwm_clk(void) { - return s5pc210_get_pwm_clk(); + return exynos4210_get_pwm_clk(); } unsigned long get_uart_clk(int dev_index) { - return s5pc210_get_uart_clk(dev_index); + return exynos4210_get_uart_clk(dev_index); } void set_mmc_clk(int dev_index, unsigned int div) { - s5pc210_set_mmc_clk(dev_index, div); + exynos4210_set_mmc_clk(dev_index, div); } diff --git a/arch/arm/cpu/armv7/s5pc2xx/soc.c b/arch/arm/cpu/armv7/exynos4/soc.c similarity index 100% rename from arch/arm/cpu/armv7/s5pc2xx/soc.c rename to arch/arm/cpu/armv7/exynos4/soc.c diff --git a/arch/arm/include/asm/arch-s5pc2xx/adc.h b/arch/arm/include/asm/arch-exynos4/adc.h similarity index 100% rename from arch/arm/include/asm/arch-s5pc2xx/adc.h rename to arch/arm/include/asm/arch-exynos4/adc.h diff --git a/arch/arm/include/asm/arch-s5pc2xx/clk.h b/arch/arm/include/asm/arch-exynos4/clk.h similarity index 100% rename from arch/arm/include/asm/arch-s5pc2xx/clk.h rename to arch/arm/include/asm/arch-exynos4/clk.h diff --git a/arch/arm/include/asm/arch-s5pc2xx/clock.h b/arch/arm/include/asm/arch-exynos4/clock.h similarity index 99% rename from arch/arm/include/asm/arch-s5pc2xx/clock.h rename to arch/arm/include/asm/arch-exynos4/clock.h index 0ff8cf8..b4190a5 100644 --- a/arch/arm/include/asm/arch-s5pc2xx/clock.h +++ b/arch/arm/include/asm/arch-exynos4/clock.h @@ -23,7 +23,7 @@ #define __ASM_ARM_ARCH_CLOCK_H_ #ifndef __ASSEMBLY__ -struct s5pc210_clock { +struct exynos4210_clock { unsigned char res1[0x4200]; unsigned int src_leftbus; unsigned char res2[0x1fc]; diff --git a/arch/arm/include/asm/arch-s5pc2xx/cpu.h b/arch/arm/include/asm/arch-exynos4/cpu.h similarity index 64% rename from arch/arm/include/asm/arch-s5pc2xx/cpu.h rename to arch/arm/include/asm/arch-exynos4/cpu.h index f9015c7..905f38c 100644 --- a/arch/arm/include/asm/arch-s5pc2xx/cpu.h +++ b/arch/arm/include/asm/arch-exynos4/cpu.h @@ -19,33 +19,33 @@ * */ -#ifndef _S5PC2XX_CPU_H -#define _S5PC2XX_CPU_H +#ifndef _EXYNOS4_CPU_H +#define _EXYNOS4_CPU_H #define S5PC2XX_ADDR_BASE 0x10000000 -/* S5PC210 */ -#define S5PC210_GPIO_PART3_BASE 0x03860000 -#define S5PC210_PRO_ID 0x10000000 -#define S5PC210_POWER_BASE 0x10020000 -#define S5PC210_SWRESET 0x10020400 -#define S5PC210_CLOCK_BASE 0x10030000 -#define S5PC210_SYSTIMER_BASE 0x10050000 -#define S5PC210_WATCHDOG_BASE 0x10060000 -#define S5PC210_MIU_BASE 0x10600000 -#define S5PC210_DMC0_BASE 0x10400000 -#define S5PC210_DMC1_BASE 0x10410000 -#define S5PC210_GPIO_PART2_BASE 0x11000000 -#define S5PC210_GPIO_PART1_BASE 0x11400000 -#define S5PC210_FIMD_BASE 0x11C00000 -#define S5PC210_USBOTG_BASE 0x12480000 -#define S5PC210_MMC_BASE 0x12510000 -#define S5PC210_SROMC_BASE 0x12570000 -#define S5PC210_USBPHY_BASE 0x125B0000 -#define S5PC210_UART_BASE 0x13800000 -#define S5PC210_ADC_BASE 0x13910000 -#define S5PC210_PWMTIMER_BASE 0x139D0000 -#define S5PC210_MODEM_BASE 0x13A00000 +/* EXYNOS4210 */ +#define EXYNOS4210_GPIO_PART3_BASE 0x03860000 +#define EXYNOS4210_PRO_ID 0x10000000 +#define EXYNOS4210_POWER_BASE 0x10020000 +#define EXYNOS4210_SWRESET 0x10020400 +#define EXYNOS4210_CLOCK_BASE 0x10030000 +#define EXYNOS4210_SYSTIMER_BASE 0x10050000 +#define EXYNOS4210_WATCHDOG_BASE 0x10060000 +#define EXYNOS4210_MIU_BASE 0x10600000 +#define EXYNOS4210_DMC0_BASE 0x10400000 +#define EXYNOS4210_DMC1_BASE 0x10410000 +#define EXYNOS4210_GPIO_PART2_BASE 0x11000000 +#define EXYNOS4210_GPIO_PART1_BASE 0x11400000 +#define EXYNOS4210_FIMD_BASE 0x11C00000 +#define EXYNOS4210_USBOTG_BASE 0x12480000 +#define EXYNOS4210_MMC_BASE 0x12510000 +#define EXYNOS4210_SROMC_BASE 0x12570000 +#define EXYNOS4210_USBPHY_BASE 0x125B0000 +#define EXYNOS4210_UART_BASE 0x13800000 +#define EXYNOS4210_ADC_BASE 0x13910000 +#define EXYNOS4210_PWMTIMER_BASE 0x139D0000 +#define EXYNOS4210_MODEM_BASE 0x13A00000 #ifndef __ASSEMBLY__ #include <asm/io.h> @@ -60,12 +60,12 @@ static inline int s5p_get_cpu_rev(void) static inline void s5p_set_cpu_id(void) { - s5p_cpu_id = readl(S5PC210_PRO_ID); + s5p_cpu_id = readl(EXYNOS4210_PRO_ID); s5p_cpu_id = (0xC000 | ((s5p_cpu_id & 0x00FFF000) >> 12)); /* - * 0xC200: S5PC210 EVT0 - * 0xC210: S5PC210 EVT1 + * 0xC200: EXYNOS4210 EVT0 + * 0xC210: EXYNOS4210 EVT1 */ if (s5p_cpu_id == 0xC200) { s5p_cpu_id |= 0x10; @@ -81,13 +81,13 @@ static inline int cpu_is_##type(void) \ return s5p_cpu_id == id ? 1 : 0; \ } -IS_SAMSUNG_TYPE(s5pc210, 0xc210) +IS_SAMSUNG_TYPE(exynos4210, 0xc210) #define SAMSUNG_BASE(device, base) \ static inline unsigned int samsung_get_base_##device(void) \ { \ - if (cpu_is_s5pc210()) \ - return S5PC210_##base; \ + if (cpu_is_exynos4210()) \ + return EXYNOS4210_##base; \ else \ return 0; \ } @@ -110,4 +110,4 @@ SAMSUNG_BASE(usb_otg, USBOTG_BASE) SAMSUNG_BASE(watchdog, WATCHDOG_BASE) #endif -#endif /* _S5PC2XX_CPU_H */ +#endif /* _EXYNOS4_CPU_H */ diff --git a/arch/arm/include/asm/arch-s5pc2xx/gpio.h b/arch/arm/include/asm/arch-exynos4/gpio.h similarity index 83% rename from arch/arm/include/asm/arch-s5pc2xx/gpio.h rename to arch/arm/include/asm/arch-exynos4/gpio.h index 8be620c..a222cd7 100644 --- a/arch/arm/include/asm/arch-s5pc2xx/gpio.h +++ b/arch/arm/include/asm/arch-exynos4/gpio.h @@ -32,7 +32,7 @@ struct s5p_gpio_bank { unsigned char res1[8]; }; -struct s5pc210_gpio_part1 { +struct exynos4210_gpio_part1 { struct s5p_gpio_bank a0; struct s5p_gpio_bank a1; struct s5p_gpio_bank b; @@ -51,7 +51,7 @@ struct s5pc210_gpio_part1 { struct s5p_gpio_bank f3; }; -struct s5pc210_gpio_part2 { +struct exynos4210_gpio_part2 { struct s5p_gpio_bank j0; struct s5p_gpio_bank j1; struct s5p_gpio_bank k0; @@ -75,7 +75,7 @@ struct s5pc210_gpio_part2 { struct s5p_gpio_bank x3; }; -struct s5pc210_gpio_part3 { +struct exynos4210_gpio_part3 { struct s5p_gpio_bank z; }; @@ -92,27 +92,27 @@ void s5p_gpio_set_rate(struct s5p_gpio_bank *bank, int gpio, int mode); /* GPIO pins per bank */ #define GPIO_PER_BANK 8 -#define s5pc210_gpio_part1_get_nr(bank, pin) \ - ((((((unsigned int) &(((struct s5pc210_gpio_part1 *) \ - S5PC210_GPIO_PART1_BASE)->bank)) \ - - S5PC210_GPIO_PART1_BASE) / sizeof(struct s5p_gpio_bank)) \ +#define exynos4210_gpio_part1_get_nr(bank, pin) \ + ((((((unsigned int) &(((struct exynos4210_gpio_part1 *) \ + EXYNOS4210_GPIO_PART1_BASE)->bank)) \ + - EXYNOS4210_GPIO_PART1_BASE) / sizeof(struct s5p_gpio_bank)) \ * GPIO_PER_BANK) + pin) -#define GPIO_PART1_MAX ((sizeof(struct s5pc210_gpio_part1) \ +#define GPIO_PART1_MAX ((sizeof(struct exynos4210_gpio_part1) \ / sizeof(struct s5p_gpio_bank)) * GPIO_PER_BANK) -#define s5pc210_gpio_part2_get_nr(bank, pin) \ - (((((((unsigned int) &(((struct s5pc210_gpio_part2 *) \ - S5PC210_GPIO_PART2_BASE)->bank)) \ - - S5PC210_GPIO_PART2_BASE) / sizeof(struct s5p_gpio_bank)) \ +#define exynos4210_gpio_part2_get_nr(bank, pin) \ + (((((((unsigned int) &(((struct exynos4210_gpio_part2 *) \ + EXYNOS4210_GPIO_PART2_BASE)->bank)) \ + - EXYNOS4210_GPIO_PART2_BASE) / sizeof(struct s5p_gpio_bank)) \ * GPIO_PER_BANK) + pin) + GPIO_PART1_MAX) static inline unsigned int s5p_gpio_base(int nr) { if (nr < GPIO_PART1_MAX) - return S5PC210_GPIO_PART1_BASE; + return EXYNOS4210_GPIO_PART1_BASE; else - return S5PC210_GPIO_PART2_BASE; + return EXYNOS4210_GPIO_PART2_BASE; return 0; } diff --git a/arch/arm/include/asm/arch-s5pc2xx/mmc.h b/arch/arm/include/asm/arch-exynos4/mmc.h similarity index 100% rename from arch/arm/include/asm/arch-s5pc2xx/mmc.h rename to arch/arm/include/asm/arch-exynos4/mmc.h diff --git a/arch/arm/include/asm/arch-s5pc2xx/pwm.h b/arch/arm/include/asm/arch-exynos4/pwm.h similarity index 100% rename from arch/arm/include/asm/arch-s5pc2xx/pwm.h rename to arch/arm/include/asm/arch-exynos4/pwm.h diff --git a/arch/arm/include/asm/arch-s5pc2xx/sromc.h b/arch/arm/include/asm/arch-exynos4/sromc.h similarity index 100% rename from arch/arm/include/asm/arch-s5pc2xx/sromc.h rename to arch/arm/include/asm/arch-exynos4/sromc.h diff --git a/arch/arm/include/asm/arch-s5pc2xx/sys_proto.h b/arch/arm/include/asm/arch-exynos4/sys_proto.h similarity index 100% rename from arch/arm/include/asm/arch-s5pc2xx/sys_proto.h rename to arch/arm/include/asm/arch-exynos4/sys_proto.h diff --git a/arch/arm/include/asm/arch-s5pc2xx/uart.h b/arch/arm/include/asm/arch-exynos4/uart.h similarity index 100% rename from arch/arm/include/asm/arch-s5pc2xx/uart.h rename to arch/arm/include/asm/arch-exynos4/uart.h diff --git a/board/samsung/origen/lowlevel_init.S b/board/samsung/origen/lowlevel_init.S index ddca1e2..a7fb934 100644 --- a/board/samsung/origen/lowlevel_init.S +++ b/board/samsung/origen/lowlevel_init.S @@ -1,5 +1,5 @@ /* - * Lowlevel setup for ORIGEN board based on S5PV310 + * Lowlevel setup for ORIGEN board based on EXYNOS4210 * * Copyright (C) 2011 Samsung Electronics * @@ -43,11 +43,11 @@ lowlevel_init: /* r5 has always zero */ mov r5, #0 - ldr r7, =S5PC210_GPIO_PART1_BASE - ldr r6, =S5PC210_GPIO_PART2_BASE + ldr r7, =EXYNOS4210_GPIO_PART1_BASE + ldr r6, =EXYNOS4210_GPIO_PART2_BASE /* check reset status */ - ldr r0, =(S5PC210_POWER_BASE + INFORM1_OFFSET) + ldr r0, =(EXYNOS4210_POWER_BASE + INFORM1_OFFSET) ldr r1, [r0] /* AFTR wakeup reset */ @@ -97,9 +97,9 @@ wakeup_reset: exit_wakeup: /* Load return address and jump to kernel */ - ldr r0, =(S5PC210_POWER_BASE + INFORM0_OFFSET) + ldr r0, =(EXYNOS4210_POWER_BASE + INFORM0_OFFSET) - /* r1 = physical address of s5pc210_cpu_resume function */ + /* r1 = physical address of exynos4210_cpu_resume function */ ldr r1, [r0] /* Jump to kernel*/ @@ -113,7 +113,7 @@ exit_wakeup: */ system_clock_init: push {lr} - ldr r0, =S5PC210_CLOCK_BASE + ldr r0, =EXYNOS4210_CLOCK_BASE /* APLL(1), MPLL(1), CORE(0), HPM(0) */ ldr r1, =CLK_SRC_CPU_VAL @@ -290,13 +290,13 @@ uart_asm_init: /* setup UART0-UART3 GPIOs (part1) */ mov r0, r7 - ldr r1, =S5PC210_GPIO_A0_CON_VAL - str r1, [r0, #S5PC210_GPIO_A0_CON_OFFSET] - ldr r1, =S5PC210_GPIO_A1_CON_VAL - str r1, [r0, #S5PC210_GPIO_A1_CON_OFFSET] + ldr r1, =EXYNOS4210_GPIO_A0_CON_VAL + str r1, [r0, #EXYNOS4210_GPIO_A0_CON_OFFSET] + ldr r1, =EXYNOS4210_GPIO_A1_CON_VAL + str r1, [r0, #EXYNOS4210_GPIO_A1_CON_OFFSET] - ldr r0, =S5PC210_UART_BASE - add r0, r0, #S5PC210_DEFAULT_UART_OFFSET + ldr r0, =EXYNOS4210_UART_BASE + add r0, r0, #EXYNOS4210_DEFAULT_UART_OFFSET ldr r1, =ULCON_VAL str r1, [r0, #ULCON_OFFSET] diff --git a/board/samsung/origen/mem_setup.S b/board/samsung/origen/mem_setup.S index a798848..6a41046 100644 --- a/board/samsung/origen/mem_setup.S +++ b/board/samsung/origen/mem_setup.S @@ -1,5 +1,5 @@ /* - * Memory setup for ORIGEN board based on S5PV310 + * Memory setup for ORIGEN board based on EXYNOS4210 * * Copyright (C) 2011 Samsung Electronics * @@ -38,7 +38,7 @@ mem_ctrl_asm_init: str r1, [r0] #ifdef SET_MIU - ldr r0, =S5PC210_MIU_BASE + ldr r0, =EXYNOS4210_MIU_BASE /* Interleave: 2Bit, Interleave_bit1: 0x21, Interleave_bit2: 0x7 */ ldr r1, =0x20001507 str r1, [r0, #APB_SFR_INTERLEAVE_CONF_OFFSET] @@ -48,7 +48,7 @@ mem_ctrl_asm_init: str r1, [r0, #APB_SFR_ARBRITATION_CONF_OFFSET] #endif /* DREX0 */ - ldr r0, =S5PC210_DMC0_BASE + ldr r0, =EXYNOS4210_DMC0_BASE /* * DLL Parameter Setting: @@ -229,7 +229,7 @@ mem_ctrl_asm_init: bne 8b /* DREX1 */ - ldr r0, =S5PC210_DMC1_BASE @0x10410000 + ldr r0, =EXYNOS4210_DMC1_BASE @0x10410000 /* * DLL Parameter Setting: @@ -410,11 +410,11 @@ mem_ctrl_asm_init: bne 8b /* turn on DREX0, DREX1 */ - ldr r0, =S5PC210_DMC0_BASE + ldr r0, =EXYNOS4210_DMC0_BASE ldr r1, =0x0FFF303a str r1, [r0, #DMC_CONCONTROL] - ldr r0, =S5PC210_DMC1_BASE + ldr r0, =EXYNOS4210_DMC1_BASE ldr r1, =0x0FFF303a str r1, [r0, #DMC_CONCONTROL] diff --git a/board/samsung/origen/origen.c b/board/samsung/origen/origen.c index 8882646..14cbb9b 100644 --- a/board/samsung/origen/origen.c +++ b/board/samsung/origen/origen.c @@ -27,13 +27,13 @@ #include <asm/arch/mmc.h> DECLARE_GLOBAL_DATA_PTR; -struct s5pc210_gpio_part1 *gpio1; -struct s5pc210_gpio_part2 *gpio2; +struct exynos4210_gpio_part1 *gpio1; +struct exynos4210_gpio_part2 *gpio2; int board_init(void) { - gpio1 = (struct s5pc210_gpio_part1 *) S5PC210_GPIO_PART1_BASE; - gpio2 = (struct s5pc210_gpio_part2 *) S5PC210_GPIO_PART2_BASE; + gpio1 = (struct exynos4210_gpio_part1 *) EXYNOS4210_GPIO_PART1_BASE; + gpio2 = (struct exynos4210_gpio_part2 *) EXYNOS4210_GPIO_PART2_BASE; gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL); return 0; diff --git a/board/samsung/origen/origen_setup.h b/board/samsung/origen/origen_setup.h index 63d85d8..fa9146f 100644 --- a/board/samsung/origen/origen_setup.h +++ b/board/samsung/origen/origen_setup.h @@ -98,8 +98,8 @@ #define INFORM1_OFFSET 0x804 /* GPIO Offsets for UART: GPIO Contol Register */ -#define S5PC210_GPIO_A0_CON_OFFSET 0x00 -#define S5PC210_GPIO_A1_CON_OFFSET 0x20 +#define EXYNOS4210_GPIO_A0_CON_OFFSET 0x00 +#define EXYNOS4210_GPIO_A1_CON_OFFSET 0x20 /* UART Register offsets */ #define ULCON_OFFSET 0x00 @@ -416,8 +416,8 @@ * UART GPIO_A0/GPIO_A1 Control Register Value * 0x2: UART Function */ -#define S5PC210_GPIO_A0_CON_VAL 0x22222222 -#define S5PC210_GPIO_A1_CON_VAL 0x222222 +#define EXYNOS4210_GPIO_A0_CON_VAL 0x22222222 +#define EXYNOS4210_GPIO_A1_CON_VAL 0x222222 /* ULCON: UART Line Control Value 8N1 */ #define WORD_LEN_5_BIT 0x00 diff --git a/board/samsung/smdkv310/lowlevel_init.S b/board/samsung/smdkv310/lowlevel_init.S index 58b737b..10f1b89 100644 --- a/board/samsung/smdkv310/lowlevel_init.S +++ b/board/samsung/smdkv310/lowlevel_init.S @@ -1,5 +1,5 @@ /* - * Lowlevel setup for SMDKV310 board based on S5PC210 + * Lowlevel setup for SMDKV310 board based on EXYNOS4210 * * Copyright (C) 2011 Samsung Electronics * @@ -45,11 +45,11 @@ lowlevel_init: /* r5 has always zero */ mov r5, #0 - ldr r7, =S5PC210_GPIO_PART1_BASE - ldr r6, =S5PC210_GPIO_PART2_BASE + ldr r7, =EXYNOS4210_GPIO_PART1_BASE + ldr r6, =EXYNOS4210_GPIO_PART2_BASE /* check reset status */ - ldr r0, =(S5PC210_POWER_BASE + 0x81C) @ INFORM7 + ldr r0, =(EXYNOS4210_POWER_BASE + 0x81C) @ INFORM7 ldr r1, [r0] /* AFTR wakeup reset */ @@ -95,9 +95,9 @@ wakeup_reset: exit_wakeup: /* Load return address and jump to kernel */ - ldr r0, =(S5PC210_POWER_BASE + 0x800) @ INFORM0 + ldr r0, =(EXYNOS4210_POWER_BASE + 0x800) @ INFORM0 - /* r1 = physical address of s5pc210_cpu_resume function */ + /* r1 = physical address of exynos4210_cpu_resume function */ ldr r1, [r0] /* Jump to kernel*/ @@ -111,7 +111,7 @@ exit_wakeup: */ system_clock_init: push {lr} - ldr r0, =S5PC210_CLOCK_BASE + ldr r0, =EXYNOS4210_CLOCK_BASE /* APLL(1), MPLL(1), CORE(0), HPM(0) */ ldr r1, =0x0101 @@ -388,12 +388,12 @@ uart_asm_init: /* setup UART0-UART3 GPIOs (part1) */ mov r0, r7 ldr r1, =0x22222222 - str r1, [r0, #0x00] @ S5PC210_GPIO_A0_OFFSET + str r1, [r0, #0x00] @ EXYNOS4210_GPIO_A0_OFFSET ldr r1, =0x00222222 - str r1, [r0, #0x20] @ S5PC210_GPIO_A1_OFFSET + str r1, [r0, #0x20] @ EXYNOS4210_GPIO_A1_OFFSET - ldr r0, =S5PC210_UART_BASE - add r0, r0, #S5PC210_DEFAULT_UART_OFFSET + ldr r0, =EXYNOS4210_UART_BASE + add r0, r0, #EXYNOS4210_DEFAULT_UART_OFFSET ldr r1, =0x3C5 str r1, [r0, #0x4] diff --git a/board/samsung/smdkv310/mem_setup.S b/board/samsung/smdkv310/mem_setup.S index 73aebe3..df62f5f 100644 --- a/board/samsung/smdkv310/mem_setup.S +++ b/board/samsung/smdkv310/mem_setup.S @@ -1,5 +1,5 @@ /* - * Memory setup for SMDKV310 board based on S5PC210 + * Memory setup for SMDKV310 board based on EXYNOS4210 * * Copyright (C) 2011 Samsung Electronics * @@ -54,7 +54,7 @@ mem_ctrl_asm_init: str r1, [r0] #ifdef SET_MIU - ldr r0, =S5PC210_MIU_BASE @0x10600000 + ldr r0, =EXYNOS4210_MIU_BASE @0x10600000 #ifdef CONFIG_MIU_1BIT_INTERLEAVED ldr r1, =0x0000000c str r1, [r0, #0x400] @MIU_INTLV_CONFIG @@ -89,7 +89,7 @@ mem_ctrl_asm_init: #endif #endif /* DREX0 */ - ldr r0, =S5PC210_DMC0_BASE @0x10400000 + ldr r0, =EXYNOS4210_DMC0_BASE @0x10400000 ldr r1, =0xe0000086 str r1, [r0, #0x1C] @DMC_PHYCONTROL1 @@ -221,7 +221,7 @@ mem_ctrl_asm_init: bne 8b /* DREX1 */ - ldr r0, =S5PC210_DMC1_BASE @0x10410000 + ldr r0, =EXYNOS4210_DMC1_BASE @0x10410000 ldr r1, =0xe0000086 str r1, [r0, #0x1C] @DMC_PHYCONTROL1 diff --git a/board/samsung/smdkv310/smdkv310.c b/board/samsung/smdkv310/smdkv310.c index d9caca7..44cd549 100644 --- a/board/samsung/smdkv310/smdkv310.c +++ b/board/samsung/smdkv310/smdkv310.c @@ -29,8 +29,8 @@ #include <asm/arch/sromc.h> DECLARE_GLOBAL_DATA_PTR; -struct s5pc210_gpio_part1 *gpio1; -struct s5pc210_gpio_part2 *gpio2; +struct exynos4210_gpio_part1 *gpio1; +struct exynos4210_gpio_part2 *gpio2; static void smc9115_pre_init(void) { @@ -52,8 +52,8 @@ static void smc9115_pre_init(void) int board_init(void) { - gpio1 = (struct s5pc210_gpio_part1 *) S5PC210_GPIO_PART1_BASE; - gpio2 = (struct s5pc210_gpio_part2 *) S5PC210_GPIO_PART2_BASE; + gpio1 = (struct exynos4210_gpio_part1 *) EXYNOS4210_GPIO_PART1_BASE; + gpio2 = (struct exynos4210_gpio_part2 *) EXYNOS4210_GPIO_PART2_BASE; smc9115_pre_init(); diff --git a/board/samsung/universal_c210/lowlevel_init.S b/board/samsung/universal_c210/lowlevel_init.S index 67635bb..76bbba5 100644 --- a/board/samsung/universal_c210/lowlevel_init.S +++ b/board/samsung/universal_c210/lowlevel_init.S @@ -1,5 +1,5 @@ /* - * Lowlevel setup for universal board based on S5PC210 + * Lowlevel setup for universal board based on EXYNOS4210 * * Copyright (C) 2010 Samsung Electronics * Kyungmin Park <kyungmin.park(a)samsung.com> @@ -43,11 +43,11 @@ lowlevel_init: /* r5 has always zero */ mov r5, #0 - ldr r7, =S5PC210_GPIO_PART1_BASE - ldr r6, =S5PC210_GPIO_PART2_BASE + ldr r7, =EXYNOS4210_GPIO_PART1_BASE + ldr r6, =EXYNOS4210_GPIO_PART2_BASE /* System Timer */ - ldr r0, =S5PC210_SYSTIMER_BASE + ldr r0, =EXYNOS4210_SYSTIMER_BASE ldr r1, =0x5000 str r1, [r0, #0x0] ldr r1, =0xffffffff @@ -57,7 +57,7 @@ lowlevel_init: /* PMIC manual reset */ /* nPOWER: XEINT_23: GPX2[7] */ - add r0, r6, #0xC40 @ S5PC210_GPIO_X2_OFFSET + add r0, r6, #0xC40 @ EXYNOS4210_GPIO_X2_OFFSET ldr r1, [r0, #0x0] bic r1, r1, #(0xf << 28) @ 28 = 7 * 4-bit orr r1, r1, #(0x1 << 28) @ Output @@ -71,7 +71,7 @@ lowlevel_init: bl system_clock_init /* Disable Watchdog */ - ldr r0, =S5PC210_WATCHDOG_BASE @0x10060000 + ldr r0, =EXYNOS4210_WATCHDOG_BASE @0x10060000 str r5, [r0] /* UART */ @@ -99,12 +99,12 @@ uart_asm_init: */ mov r0, r7 ldr r1, =0x22222222 - str r1, [r0, #0x00] @ S5PC210_GPIO_A0_OFFSET + str r1, [r0, #0x00] @ EXYNOS4210_GPIO_A0_OFFSET ldr r1, =0x00223322 - str r1, [r0, #0x20] @ S5PC210_GPIO_A1_OFFSET + str r1, [r0, #0x20] @ EXYNOS4210_GPIO_A1_OFFSET - /* UART_SEL GPY4[7] (part2) at S5PC210 */ - add r0, r6, #0x1A0 @ S5PC210_GPIO_Y4_OFFSET + /* UART_SEL GPY4[7] (part2) at EXYNOS4210 */ + add r0, r6, #0x1A0 @ EXYNOS4210_GPIO_Y4_OFFSET ldr r1, [r0, #0x0] bic r1, r1, #(0xf << 28) @ 28 = 7 * 4-bit orr r1, r1, #(0x1 << 28) @@ -125,7 +125,7 @@ uart_asm_init: nop system_clock_init: - ldr r0, =S5PC210_CLOCK_BASE + ldr r0, =EXYNOS4210_CLOCK_BASE /* APLL(1), MPLL(1), CORE(0), HPM(0) */ ldr r1, =0x0101 @@ -326,7 +326,7 @@ system_clock_init: nop system_power_init: - ldr r0, =S5PC210_POWER_BASE @ 0x10020000 + ldr r0, =EXYNOS4210_POWER_BASE @ 0x10020000 ldr r2, =0x330C @ PS_HOLD_CONTROL ldr r1, [r0, r2] diff --git a/board/samsung/universal_c210/universal.c b/board/samsung/universal_c210/universal.c index d767eaa..0542a16 100644 --- a/board/samsung/universal_c210/universal.c +++ b/board/samsung/universal_c210/universal.c @@ -31,8 +31,8 @@ DECLARE_GLOBAL_DATA_PTR; -struct s5pc210_gpio_part1 *gpio1; -struct s5pc210_gpio_part2 *gpio2; +struct exynos4210_gpio_part1 *gpio1; +struct exynos4210_gpio_part2 *gpio2; unsigned int board_rev; u32 get_board_rev(void) @@ -49,8 +49,8 @@ static void check_hw_revision(void); int board_init(void) { - gpio1 = (struct s5pc210_gpio_part1 *) S5PC210_GPIO_PART1_BASE; - gpio2 = (struct s5pc210_gpio_part2 *) S5PC210_GPIO_PART2_BASE; + gpio1 = (struct exynos4210_gpio_part1 *) EXYNOS4210_GPIO_PART1_BASE; + gpio2 = (struct exynos4210_gpio_part2 *) EXYNOS4210_GPIO_PART2_BASE; gd->bd->bi_arch_number = MACH_TYPE_UNIVERSAL_C210; gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; diff --git a/boards.cfg b/boards.cfg index 7c63449..98b1b3c 100644 --- a/boards.cfg +++ b/boards.cfg @@ -201,9 +201,9 @@ omap4_sdp4430 arm armv7 sdp4430 ti omap5_evm arm armv7 omap5_evm ti omap5 s5p_goni arm armv7 goni samsung s5pc1xx smdkc100 arm armv7 smdkc100 samsung s5pc1xx -origen arm armv7 origen samsung s5pc2xx -s5pc210_universal arm armv7 universal_c210 samsung s5pc2xx -smdkv310 arm armv7 smdkv310 samsung s5pc2xx +origen arm armv7 origen samsung exynos4 +s5pc210_universal arm armv7 universal_c210 samsung exynos4 +smdkv310 arm armv7 smdkv310 samsung exynos4 harmony arm armv7 harmony nvidia tegra2 seaboard arm armv7 seaboard nvidia tegra2 u8500_href arm armv7 u8500 st-ericsson u8500 diff --git a/include/configs/origen.h b/include/configs/origen.h index 380ef4f..6099e87 100644 --- a/include/configs/origen.h +++ b/include/configs/origen.h @@ -1,7 +1,7 @@ /* * Copyright (C) 2011 Samsung Electronics * - * Configuration settings for the SAMSUNG ORIGEN (S5PV310) board. + * Configuration settings for the SAMSUNG ORIGEN (EXYNOS4210) board. * * See file CREDITS for list of people who contributed to this * project. @@ -28,7 +28,7 @@ /* High Level Configuration Options */ #define CONFIG_SAMSUNG 1 /* SAMSUNG core */ #define CONFIG_S5P 1 /* S5P Family */ -#define CONFIG_S5PC210 1 /* which is in a S5PC210 SoC */ +#define CONFIG_EXYNOS4210 1 /* which is a EXYNOS4210 SoC */ #define CONFIG_ORIGEN 1 /* working with ORIGEN*/ #include <asm/arch/cpu.h> /* get chip and board defs */ @@ -68,7 +68,7 @@ #define CONFIG_SERIAL_MULTI 1 #define CONFIG_SERIAL2 1 /* use SERIAL 2 */ #define CONFIG_BAUDRATE 115200 -#define S5PC210_DEFAULT_UART_OFFSET 0x020000 +#define EXYNOS4210_DEFAULT_UART_OFFSET 0x020000 /* SD/MMC configuration */ #define CONFIG_GENERIC_MMC 1 diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h index cc14f97..0e390bd 100644 --- a/include/configs/s5pc210_universal.h +++ b/include/configs/s5pc210_universal.h @@ -2,7 +2,7 @@ * Copyright (C) 2010 Samsung Electronics * Minkyu Kang <mk7.kang(a)samsung.com> * - * Configuation settings for the SAMSUNG Universal (s5pc100) board. + * Configuation settings for the SAMSUNG Universal (EXYNOS4210) board. * * See file CREDITS for list of people who contributed to this * project. @@ -32,7 +32,7 @@ */ #define CONFIG_SAMSUNG 1 /* in a SAMSUNG core */ #define CONFIG_S5P 1 /* which is in a S5P Family */ -#define CONFIG_S5PC210 1 /* which is in a S5PC210 */ +#define CONFIG_EXYNOS4210 1 /* which is in a EXYNOS4210 */ #define CONFIG_UNIVERSAL 1 /* working with Universal */ #include <asm/arch/cpu.h> /* get chip and board defs */ @@ -47,7 +47,7 @@ #define CONFIG_SYS_SDRAM_BASE 0x40000000 #define CONFIG_SYS_TEXT_BASE 0x44800000 -/* input clock of PLL: Universal has 24MHz input clock at S5PC210 */ +/* input clock of PLL: Universal has 24MHz input clock at EXYNOS4210 */ #define CONFIG_SYS_CLK_FREQ_C210 24000000 #define CONFIG_SETUP_MEMORY_TAGS @@ -249,8 +249,8 @@ /* * I2C Settings */ -#define CONFIG_SOFT_I2C_GPIO_SCL s5pc210_gpio_part1_get_nr(b, 7) -#define CONFIG_SOFT_I2C_GPIO_SDA s5pc210_gpio_part1_get_nr(b, 6) +#define CONFIG_SOFT_I2C_GPIO_SCL exynos4210_gpio_part1_get_nr(b, 7) +#define CONFIG_SOFT_I2C_GPIO_SDA exynos4210_gpio_part1_get_nr(b, 6) #define CONFIG_SOFT_I2C #define CONFIG_SOFT_I2C_READ_REPEATED_START diff --git a/include/configs/smdkv310.h b/include/configs/smdkv310.h index fc8bb06..f81e4d7 100644 --- a/include/configs/smdkv310.h +++ b/include/configs/smdkv310.h @@ -1,7 +1,7 @@ /* * Copyright (C) 2011 Samsung Electronics * - * Configuration settings for the SAMSUNG SMDKV310 (S5PC210) board. + * Configuration settings for the SAMSUNG SMDKV310 (EXYNOS4210) board. * * See file CREDITS for list of people who contributed to this * project. @@ -28,7 +28,7 @@ /* High Level Configuration Options */ #define CONFIG_SAMSUNG 1 /* in a SAMSUNG core */ #define CONFIG_S5P 1 /* S5P Family */ -#define CONFIG_S5PC210 1 /* which is in a S5PC210 SoC */ +#define CONFIG_EXYNOS4210 1 /* which is a EXYNOS4210 SoC */ #define CONFIG_SMDKV310 1 /* working with SMDKV310*/ #include <asm/arch/cpu.h> /* get chip and board defs */ @@ -65,7 +65,7 @@ #define CONFIG_SERIAL_MULTI 1 #define CONFIG_SERIAL1 1 /* use SERIAL 1 */ #define CONFIG_BAUDRATE 115200 -#define S5PC210_DEFAULT_UART_OFFSET 0x010000 +#define EXYNOS4210_DEFAULT_UART_OFFSET 0x010000 /* SD/MMC configuration */ #define CONFIG_GENERIC_MMC 1 -- 1.7.5.4

13 years, 5 months

ICS changes to use mksh

by yong qin

Hi, All ICS has changed its default shell to mksh. and the source of mksh is under ${AOSP}/external/mksh. In ICS, mksh use /system/etc/mkshrc as the default profile if we log into android with adb shell or on the serial console. so if we want to export some environment variable like(PS1), we can change this file. and we can change the default profile file path by changing MKSHRC_PATH in Android.mk. if we don't log in, like just run "adb shell cmd", then the mkshrc will not be used. It says that mksh is *mostly* bourne shell compatible and is also POSIX sh compatible, but I'm not familiar with mksh, so if you are interested in it, you can go to the homepage get more information. this is the home page https://www.mirbsd.org/mksh.htm. Thanks, Yongqin Liu

13 years, 5 months

[PATCH v2] S5PC2XX: Rename S5pc2XX to exynos4

by Chander Kashyap

As per new conventions Samsung SoC's are named as Exynos. Cortex-A9 based Soc's are named as exynos4. s5pc2xx is cortex-A9 based, hence renamed to exynos4. This is done as per kernel naming convetions. Similerly s5pc210 is now exynos4210. Hence S5PC210/s5pc210 suffix/prefix has been renamed to EXYNOS4210/exynos4210. Signed-off-by: Chander Kashyap <chander.kashyap(a)linaro.org> --- Changes for v2: - Removed renaming of s5p-common to exynos4-common - Renamed s5pc210 prefixes to exynos4210 MAINTAINERS | 6 +- Makefile | 2 +- arch/arm/cpu/armv7/{s5pc2xx => exynos4}/Makefile | 0 arch/arm/cpu/armv7/{s5pc2xx => exynos4}/clock.c | 50 ++++++++-------- arch/arm/cpu/armv7/{s5pc2xx => exynos4}/soc.c | 0 .../asm/{arch-s5pc2xx => arch-exynos4}/adc.h | 0 .../asm/{arch-s5pc2xx => arch-exynos4}/clk.h | 0 .../asm/{arch-s5pc2xx => arch-exynos4}/clock.h | 2 +- .../asm/{arch-s5pc2xx => arch-exynos4}/cpu.h | 62 ++++++++++---------- .../asm/{arch-s5pc2xx => arch-exynos4}/gpio.h | 28 +++++----- .../asm/{arch-s5pc2xx => arch-exynos4}/mmc.h | 0 .../asm/{arch-s5pc2xx => arch-exynos4}/pwm.h | 0 .../asm/{arch-s5pc2xx => arch-exynos4}/sromc.h | 0 .../asm/{arch-s5pc2xx => arch-exynos4}/sys_proto.h | 0 .../asm/{arch-s5pc2xx => arch-exynos4}/uart.h | 0 board/samsung/origen/lowlevel_init.S | 26 ++++---- board/samsung/origen/mem_setup.S | 12 ++-- board/samsung/origen/origen.c | 8 +- board/samsung/origen/origen_setup.h | 8 +- board/samsung/smdkv310/lowlevel_init.S | 22 ++++---- board/samsung/smdkv310/mem_setup.S | 8 +- board/samsung/smdkv310/smdkv310.c | 8 +- board/samsung/universal_c210/lowlevel_init.S | 24 ++++---- board/samsung/universal_c210/universal.c | 8 +- boards.cfg | 6 +- include/configs/origen.h | 6 +- include/configs/s5pc210_universal.h | 10 ++-- include/configs/smdkv310.h | 6 +- 28 files changed, 151 insertions(+), 151 deletions(-) rename arch/arm/cpu/armv7/{s5pc2xx => exynos4}/Makefile (100%) rename arch/arm/cpu/armv7/{s5pc2xx => exynos4}/clock.c (80%) rename arch/arm/cpu/armv7/{s5pc2xx => exynos4}/soc.c (100%) rename arch/arm/include/asm/{arch-s5pc2xx => arch-exynos4}/adc.h (100%) rename arch/arm/include/asm/{arch-s5pc2xx => arch-exynos4}/clk.h (100%) rename arch/arm/include/asm/{arch-s5pc2xx => arch-exynos4}/clock.h (99%) rename arch/arm/include/asm/{arch-s5pc2xx => arch-exynos4}/cpu.h (64%) rename arch/arm/include/asm/{arch-s5pc2xx => arch-exynos4}/gpio.h (83%) rename arch/arm/include/asm/{arch-s5pc2xx => arch-exynos4}/mmc.h (100%) rename arch/arm/include/asm/{arch-s5pc2xx => arch-exynos4}/pwm.h (100%) rename arch/arm/include/asm/{arch-s5pc2xx => arch-exynos4}/sromc.h (100%) rename arch/arm/include/asm/{arch-s5pc2xx => arch-exynos4}/sys_proto.h (100%) rename arch/arm/include/asm/{arch-s5pc2xx => arch-exynos4}/uart.h (100%) diff --git a/MAINTAINERS b/MAINTAINERS index 030fe4a..36f8400 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -690,12 +690,12 @@ Minkyu Kang <mk7.kang(a)samsung.com> SMDKC100 ARM ARMV7 (S5PC100 SoC) s5p_goni ARM ARMV7 (S5PC110 SoC) - s5pc210_universal ARM ARMV7 (S5PC210 SoC) + s5pc210_universal ARM ARMV7 (EXYNOS4210 SoC) Chander Kashyap <k.chander(a)samsung.com> - origen ARM ARMV7 (S5PC210 SoC) - SMDKV310 ARM ARMV7 (S5PC210 SoC) + origen ARM ARMV7 (EXYNOS4210 SoC) + SMDKV310 ARM ARMV7 (EXYNOS4210 SoC) Torsten Koschorrek <koschorrek(a)synertronixx.de> scb9328 ARM920T (i.MXL) diff --git a/Makefile b/Makefile index 294c762..641b644 100644 --- a/Makefile +++ b/Makefile @@ -303,7 +303,7 @@ endif ifeq ($(SOC),s5pc1xx) LIBS += $(CPUDIR)/s5p-common/libs5p-common.o endif -ifeq ($(SOC),s5pc2xx) +ifeq ($(SOC),exynos4) LIBS += $(CPUDIR)/s5p-common/libs5p-common.o endif diff --git a/arch/arm/cpu/armv7/s5pc2xx/Makefile b/arch/arm/cpu/armv7/exynos4/Makefile similarity index 100% rename from arch/arm/cpu/armv7/s5pc2xx/Makefile rename to arch/arm/cpu/armv7/exynos4/Makefile diff --git a/arch/arm/cpu/armv7/s5pc2xx/clock.c b/arch/arm/cpu/armv7/exynos4/clock.c similarity index 80% rename from arch/arm/cpu/armv7/s5pc2xx/clock.c rename to arch/arm/cpu/armv7/exynos4/clock.c index 5ecd475..668166a 100644 --- a/arch/arm/cpu/armv7/s5pc2xx/clock.c +++ b/arch/arm/cpu/armv7/exynos4/clock.c @@ -30,11 +30,11 @@ #define CONFIG_SYS_CLK_FREQ_C210 24000000 #endif -/* s5pc210: return pll clock frequency */ -static unsigned long s5pc210_get_pll_clk(int pllreg) +/* exynos4210: return pll clock frequency */ +static unsigned long exynos4210_get_pll_clk(int pllreg) { - struct s5pc210_clock *clk = - (struct s5pc210_clock *)samsung_get_base_clock(); + struct exynos4210_clock *clk = + (struct exynos4210_clock *)samsung_get_base_clock(); unsigned long r, m, p, s, k = 0, mask, fout; unsigned int freq; @@ -96,11 +96,11 @@ static unsigned long s5pc210_get_pll_clk(int pllreg) return fout; } -/* s5pc210: return ARM clock frequency */ -static unsigned long s5pc210_get_arm_clk(void) +/* exynos4210: return ARM clock frequency */ +static unsigned long exynos4210_get_arm_clk(void) { - struct s5pc210_clock *clk = - (struct s5pc210_clock *)samsung_get_base_clock(); + struct exynos4210_clock *clk = + (struct exynos4210_clock *)samsung_get_base_clock(); unsigned long div; unsigned long dout_apll; unsigned int apll_ratio; @@ -115,11 +115,11 @@ static unsigned long s5pc210_get_arm_clk(void) return dout_apll; } -/* s5pc210: return pwm clock frequency */ -static unsigned long s5pc210_get_pwm_clk(void) +/* exynos4210: return pwm clock frequency */ +static unsigned long exynos4210_get_pwm_clk(void) { - struct s5pc210_clock *clk = - (struct s5pc210_clock *)samsung_get_base_clock(); + struct exynos4210_clock *clk = + (struct exynos4210_clock *)samsung_get_base_clock(); unsigned long pclk, sclk; unsigned int sel; unsigned int ratio; @@ -158,11 +158,11 @@ static unsigned long s5pc210_get_pwm_clk(void) return pclk; } -/* s5pc210: return uart clock frequency */ -static unsigned long s5pc210_get_uart_clk(int dev_index) +/* exynos4210: return uart clock frequency */ +static unsigned long exynos4210_get_uart_clk(int dev_index) { - struct s5pc210_clock *clk = - (struct s5pc210_clock *)samsung_get_base_clock(); + struct exynos4210_clock *clk = + (struct exynos4210_clock *)samsung_get_base_clock(); unsigned long uclk, sclk; unsigned int sel; unsigned int ratio; @@ -205,11 +205,11 @@ static unsigned long s5pc210_get_uart_clk(int dev_index) return uclk; } -/* s5pc210: set the mmc clock */ -static void s5pc210_set_mmc_clk(int dev_index, unsigned int div) +/* exynos4210: set the mmc clock */ +static void exynos4210_set_mmc_clk(int dev_index, unsigned int div) { - struct s5pc210_clock *clk = - (struct s5pc210_clock *)samsung_get_base_clock(); + struct exynos4210_clock *clk = + (struct exynos4210_clock *)samsung_get_base_clock(); unsigned int addr; unsigned int val; @@ -234,25 +234,25 @@ static void s5pc210_set_mmc_clk(int dev_index, unsigned int div) unsigned long get_pll_clk(int pllreg) { - return s5pc210_get_pll_clk(pllreg); + return exynos4210_get_pll_clk(pllreg); } unsigned long get_arm_clk(void) { - return s5pc210_get_arm_clk(); + return exynos4210_get_arm_clk(); } unsigned long get_pwm_clk(void) { - return s5pc210_get_pwm_clk(); + return exynos4210_get_pwm_clk(); } unsigned long get_uart_clk(int dev_index) { - return s5pc210_get_uart_clk(dev_index); + return exynos4210_get_uart_clk(dev_index); } void set_mmc_clk(int dev_index, unsigned int div) { - s5pc210_set_mmc_clk(dev_index, div); + exynos4210_set_mmc_clk(dev_index, div); } diff --git a/arch/arm/cpu/armv7/s5pc2xx/soc.c b/arch/arm/cpu/armv7/exynos4/soc.c similarity index 100% rename from arch/arm/cpu/armv7/s5pc2xx/soc.c rename to arch/arm/cpu/armv7/exynos4/soc.c diff --git a/arch/arm/include/asm/arch-s5pc2xx/adc.h b/arch/arm/include/asm/arch-exynos4/adc.h similarity index 100% rename from arch/arm/include/asm/arch-s5pc2xx/adc.h rename to arch/arm/include/asm/arch-exynos4/adc.h diff --git a/arch/arm/include/asm/arch-s5pc2xx/clk.h b/arch/arm/include/asm/arch-exynos4/clk.h similarity index 100% rename from arch/arm/include/asm/arch-s5pc2xx/clk.h rename to arch/arm/include/asm/arch-exynos4/clk.h diff --git a/arch/arm/include/asm/arch-s5pc2xx/clock.h b/arch/arm/include/asm/arch-exynos4/clock.h similarity index 99% rename from arch/arm/include/asm/arch-s5pc2xx/clock.h rename to arch/arm/include/asm/arch-exynos4/clock.h index 0ff8cf8..b4190a5 100644 --- a/arch/arm/include/asm/arch-s5pc2xx/clock.h +++ b/arch/arm/include/asm/arch-exynos4/clock.h @@ -23,7 +23,7 @@ #define __ASM_ARM_ARCH_CLOCK_H_ #ifndef __ASSEMBLY__ -struct s5pc210_clock { +struct exynos4210_clock { unsigned char res1[0x4200]; unsigned int src_leftbus; unsigned char res2[0x1fc]; diff --git a/arch/arm/include/asm/arch-s5pc2xx/cpu.h b/arch/arm/include/asm/arch-exynos4/cpu.h similarity index 64% rename from arch/arm/include/asm/arch-s5pc2xx/cpu.h rename to arch/arm/include/asm/arch-exynos4/cpu.h index f9015c7..905f38c 100644 --- a/arch/arm/include/asm/arch-s5pc2xx/cpu.h +++ b/arch/arm/include/asm/arch-exynos4/cpu.h @@ -19,33 +19,33 @@ * */ -#ifndef _S5PC2XX_CPU_H -#define _S5PC2XX_CPU_H +#ifndef _EXYNOS4_CPU_H +#define _EXYNOS4_CPU_H #define S5PC2XX_ADDR_BASE 0x10000000 -/* S5PC210 */ -#define S5PC210_GPIO_PART3_BASE 0x03860000 -#define S5PC210_PRO_ID 0x10000000 -#define S5PC210_POWER_BASE 0x10020000 -#define S5PC210_SWRESET 0x10020400 -#define S5PC210_CLOCK_BASE 0x10030000 -#define S5PC210_SYSTIMER_BASE 0x10050000 -#define S5PC210_WATCHDOG_BASE 0x10060000 -#define S5PC210_MIU_BASE 0x10600000 -#define S5PC210_DMC0_BASE 0x10400000 -#define S5PC210_DMC1_BASE 0x10410000 -#define S5PC210_GPIO_PART2_BASE 0x11000000 -#define S5PC210_GPIO_PART1_BASE 0x11400000 -#define S5PC210_FIMD_BASE 0x11C00000 -#define S5PC210_USBOTG_BASE 0x12480000 -#define S5PC210_MMC_BASE 0x12510000 -#define S5PC210_SROMC_BASE 0x12570000 -#define S5PC210_USBPHY_BASE 0x125B0000 -#define S5PC210_UART_BASE 0x13800000 -#define S5PC210_ADC_BASE 0x13910000 -#define S5PC210_PWMTIMER_BASE 0x139D0000 -#define S5PC210_MODEM_BASE 0x13A00000 +/* EXYNOS4210 */ +#define EXYNOS4210_GPIO_PART3_BASE 0x03860000 +#define EXYNOS4210_PRO_ID 0x10000000 +#define EXYNOS4210_POWER_BASE 0x10020000 +#define EXYNOS4210_SWRESET 0x10020400 +#define EXYNOS4210_CLOCK_BASE 0x10030000 +#define EXYNOS4210_SYSTIMER_BASE 0x10050000 +#define EXYNOS4210_WATCHDOG_BASE 0x10060000 +#define EXYNOS4210_MIU_BASE 0x10600000 +#define EXYNOS4210_DMC0_BASE 0x10400000 +#define EXYNOS4210_DMC1_BASE 0x10410000 +#define EXYNOS4210_GPIO_PART2_BASE 0x11000000 +#define EXYNOS4210_GPIO_PART1_BASE 0x11400000 +#define EXYNOS4210_FIMD_BASE 0x11C00000 +#define EXYNOS4210_USBOTG_BASE 0x12480000 +#define EXYNOS4210_MMC_BASE 0x12510000 +#define EXYNOS4210_SROMC_BASE 0x12570000 +#define EXYNOS4210_USBPHY_BASE 0x125B0000 +#define EXYNOS4210_UART_BASE 0x13800000 +#define EXYNOS4210_ADC_BASE 0x13910000 +#define EXYNOS4210_PWMTIMER_BASE 0x139D0000 +#define EXYNOS4210_MODEM_BASE 0x13A00000 #ifndef __ASSEMBLY__ #include <asm/io.h> @@ -60,12 +60,12 @@ static inline int s5p_get_cpu_rev(void) static inline void s5p_set_cpu_id(void) { - s5p_cpu_id = readl(S5PC210_PRO_ID); + s5p_cpu_id = readl(EXYNOS4210_PRO_ID); s5p_cpu_id = (0xC000 | ((s5p_cpu_id & 0x00FFF000) >> 12)); /* - * 0xC200: S5PC210 EVT0 - * 0xC210: S5PC210 EVT1 + * 0xC200: EXYNOS4210 EVT0 + * 0xC210: EXYNOS4210 EVT1 */ if (s5p_cpu_id == 0xC200) { s5p_cpu_id |= 0x10; @@ -81,13 +81,13 @@ static inline int cpu_is_##type(void) \ return s5p_cpu_id == id ? 1 : 0; \ } -IS_SAMSUNG_TYPE(s5pc210, 0xc210) +IS_SAMSUNG_TYPE(exynos4210, 0xc210) #define SAMSUNG_BASE(device, base) \ static inline unsigned int samsung_get_base_##device(void) \ { \ - if (cpu_is_s5pc210()) \ - return S5PC210_##base; \ + if (cpu_is_exynos4210()) \ + return EXYNOS4210_##base; \ else \ return 0; \ } @@ -110,4 +110,4 @@ SAMSUNG_BASE(usb_otg, USBOTG_BASE) SAMSUNG_BASE(watchdog, WATCHDOG_BASE) #endif -#endif /* _S5PC2XX_CPU_H */ +#endif /* _EXYNOS4_CPU_H */ diff --git a/arch/arm/include/asm/arch-s5pc2xx/gpio.h b/arch/arm/include/asm/arch-exynos4/gpio.h similarity index 83% rename from arch/arm/include/asm/arch-s5pc2xx/gpio.h rename to arch/arm/include/asm/arch-exynos4/gpio.h index 8be620c..a222cd7 100644 --- a/arch/arm/include/asm/arch-s5pc2xx/gpio.h +++ b/arch/arm/include/asm/arch-exynos4/gpio.h @@ -32,7 +32,7 @@ struct s5p_gpio_bank { unsigned char res1[8]; }; -struct s5pc210_gpio_part1 { +struct exynos4210_gpio_part1 { struct s5p_gpio_bank a0; struct s5p_gpio_bank a1; struct s5p_gpio_bank b; @@ -51,7 +51,7 @@ struct s5pc210_gpio_part1 { struct s5p_gpio_bank f3; }; -struct s5pc210_gpio_part2 { +struct exynos4210_gpio_part2 { struct s5p_gpio_bank j0; struct s5p_gpio_bank j1; struct s5p_gpio_bank k0; @@ -75,7 +75,7 @@ struct s5pc210_gpio_part2 { struct s5p_gpio_bank x3; }; -struct s5pc210_gpio_part3 { +struct exynos4210_gpio_part3 { struct s5p_gpio_bank z; }; @@ -92,27 +92,27 @@ void s5p_gpio_set_rate(struct s5p_gpio_bank *bank, int gpio, int mode); /* GPIO pins per bank */ #define GPIO_PER_BANK 8 -#define s5pc210_gpio_part1_get_nr(bank, pin) \ - ((((((unsigned int) &(((struct s5pc210_gpio_part1 *) \ - S5PC210_GPIO_PART1_BASE)->bank)) \ - - S5PC210_GPIO_PART1_BASE) / sizeof(struct s5p_gpio_bank)) \ +#define exynos4210_gpio_part1_get_nr(bank, pin) \ + ((((((unsigned int) &(((struct exynos4210_gpio_part1 *) \ + EXYNOS4210_GPIO_PART1_BASE)->bank)) \ + - EXYNOS4210_GPIO_PART1_BASE) / sizeof(struct s5p_gpio_bank)) \ * GPIO_PER_BANK) + pin) -#define GPIO_PART1_MAX ((sizeof(struct s5pc210_gpio_part1) \ +#define GPIO_PART1_MAX ((sizeof(struct exynos4210_gpio_part1) \ / sizeof(struct s5p_gpio_bank)) * GPIO_PER_BANK) -#define s5pc210_gpio_part2_get_nr(bank, pin) \ - (((((((unsigned int) &(((struct s5pc210_gpio_part2 *) \ - S5PC210_GPIO_PART2_BASE)->bank)) \ - - S5PC210_GPIO_PART2_BASE) / sizeof(struct s5p_gpio_bank)) \ +#define exynos4210_gpio_part2_get_nr(bank, pin) \ + (((((((unsigned int) &(((struct exynos4210_gpio_part2 *) \ + EXYNOS4210_GPIO_PART2_BASE)->bank)) \ + - EXYNOS4210_GPIO_PART2_BASE) / sizeof(struct s5p_gpio_bank)) \ * GPIO_PER_BANK) + pin) + GPIO_PART1_MAX) static inline unsigned int s5p_gpio_base(int nr) { if (nr < GPIO_PART1_MAX) - return S5PC210_GPIO_PART1_BASE; + return EXYNOS4210_GPIO_PART1_BASE; else - return S5PC210_GPIO_PART2_BASE; + return EXYNOS4210_GPIO_PART2_BASE; return 0; } diff --git a/arch/arm/include/asm/arch-s5pc2xx/mmc.h b/arch/arm/include/asm/arch-exynos4/mmc.h similarity index 100% rename from arch/arm/include/asm/arch-s5pc2xx/mmc.h rename to arch/arm/include/asm/arch-exynos4/mmc.h diff --git a/arch/arm/include/asm/arch-s5pc2xx/pwm.h b/arch/arm/include/asm/arch-exynos4/pwm.h similarity index 100% rename from arch/arm/include/asm/arch-s5pc2xx/pwm.h rename to arch/arm/include/asm/arch-exynos4/pwm.h diff --git a/arch/arm/include/asm/arch-s5pc2xx/sromc.h b/arch/arm/include/asm/arch-exynos4/sromc.h similarity index 100% rename from arch/arm/include/asm/arch-s5pc2xx/sromc.h rename to arch/arm/include/asm/arch-exynos4/sromc.h diff --git a/arch/arm/include/asm/arch-s5pc2xx/sys_proto.h b/arch/arm/include/asm/arch-exynos4/sys_proto.h similarity index 100% rename from arch/arm/include/asm/arch-s5pc2xx/sys_proto.h rename to arch/arm/include/asm/arch-exynos4/sys_proto.h diff --git a/arch/arm/include/asm/arch-s5pc2xx/uart.h b/arch/arm/include/asm/arch-exynos4/uart.h similarity index 100% rename from arch/arm/include/asm/arch-s5pc2xx/uart.h rename to arch/arm/include/asm/arch-exynos4/uart.h diff --git a/board/samsung/origen/lowlevel_init.S b/board/samsung/origen/lowlevel_init.S index ddca1e2..a7fb934 100644 --- a/board/samsung/origen/lowlevel_init.S +++ b/board/samsung/origen/lowlevel_init.S @@ -1,5 +1,5 @@ /* - * Lowlevel setup for ORIGEN board based on S5PV310 + * Lowlevel setup for ORIGEN board based on EXYNOS4210 * * Copyright (C) 2011 Samsung Electronics * @@ -43,11 +43,11 @@ lowlevel_init: /* r5 has always zero */ mov r5, #0 - ldr r7, =S5PC210_GPIO_PART1_BASE - ldr r6, =S5PC210_GPIO_PART2_BASE + ldr r7, =EXYNOS4210_GPIO_PART1_BASE + ldr r6, =EXYNOS4210_GPIO_PART2_BASE /* check reset status */ - ldr r0, =(S5PC210_POWER_BASE + INFORM1_OFFSET) + ldr r0, =(EXYNOS4210_POWER_BASE + INFORM1_OFFSET) ldr r1, [r0] /* AFTR wakeup reset */ @@ -97,9 +97,9 @@ wakeup_reset: exit_wakeup: /* Load return address and jump to kernel */ - ldr r0, =(S5PC210_POWER_BASE + INFORM0_OFFSET) + ldr r0, =(EXYNOS4210_POWER_BASE + INFORM0_OFFSET) - /* r1 = physical address of s5pc210_cpu_resume function */ + /* r1 = physical address of exynos4210_cpu_resume function */ ldr r1, [r0] /* Jump to kernel*/ @@ -113,7 +113,7 @@ exit_wakeup: */ system_clock_init: push {lr} - ldr r0, =S5PC210_CLOCK_BASE + ldr r0, =EXYNOS4210_CLOCK_BASE /* APLL(1), MPLL(1), CORE(0), HPM(0) */ ldr r1, =CLK_SRC_CPU_VAL @@ -290,13 +290,13 @@ uart_asm_init: /* setup UART0-UART3 GPIOs (part1) */ mov r0, r7 - ldr r1, =S5PC210_GPIO_A0_CON_VAL - str r1, [r0, #S5PC210_GPIO_A0_CON_OFFSET] - ldr r1, =S5PC210_GPIO_A1_CON_VAL - str r1, [r0, #S5PC210_GPIO_A1_CON_OFFSET] + ldr r1, =EXYNOS4210_GPIO_A0_CON_VAL + str r1, [r0, #EXYNOS4210_GPIO_A0_CON_OFFSET] + ldr r1, =EXYNOS4210_GPIO_A1_CON_VAL + str r1, [r0, #EXYNOS4210_GPIO_A1_CON_OFFSET] - ldr r0, =S5PC210_UART_BASE - add r0, r0, #S5PC210_DEFAULT_UART_OFFSET + ldr r0, =EXYNOS4210_UART_BASE + add r0, r0, #EXYNOS4210_DEFAULT_UART_OFFSET ldr r1, =ULCON_VAL str r1, [r0, #ULCON_OFFSET] diff --git a/board/samsung/origen/mem_setup.S b/board/samsung/origen/mem_setup.S index a798848..6a41046 100644 --- a/board/samsung/origen/mem_setup.S +++ b/board/samsung/origen/mem_setup.S @@ -1,5 +1,5 @@ /* - * Memory setup for ORIGEN board based on S5PV310 + * Memory setup for ORIGEN board based on EXYNOS4210 * * Copyright (C) 2011 Samsung Electronics * @@ -38,7 +38,7 @@ mem_ctrl_asm_init: str r1, [r0] #ifdef SET_MIU - ldr r0, =S5PC210_MIU_BASE + ldr r0, =EXYNOS4210_MIU_BASE /* Interleave: 2Bit, Interleave_bit1: 0x21, Interleave_bit2: 0x7 */ ldr r1, =0x20001507 str r1, [r0, #APB_SFR_INTERLEAVE_CONF_OFFSET] @@ -48,7 +48,7 @@ mem_ctrl_asm_init: str r1, [r0, #APB_SFR_ARBRITATION_CONF_OFFSET] #endif /* DREX0 */ - ldr r0, =S5PC210_DMC0_BASE + ldr r0, =EXYNOS4210_DMC0_BASE /* * DLL Parameter Setting: @@ -229,7 +229,7 @@ mem_ctrl_asm_init: bne 8b /* DREX1 */ - ldr r0, =S5PC210_DMC1_BASE @0x10410000 + ldr r0, =EXYNOS4210_DMC1_BASE @0x10410000 /* * DLL Parameter Setting: @@ -410,11 +410,11 @@ mem_ctrl_asm_init: bne 8b /* turn on DREX0, DREX1 */ - ldr r0, =S5PC210_DMC0_BASE + ldr r0, =EXYNOS4210_DMC0_BASE ldr r1, =0x0FFF303a str r1, [r0, #DMC_CONCONTROL] - ldr r0, =S5PC210_DMC1_BASE + ldr r0, =EXYNOS4210_DMC1_BASE ldr r1, =0x0FFF303a str r1, [r0, #DMC_CONCONTROL] diff --git a/board/samsung/origen/origen.c b/board/samsung/origen/origen.c index 8882646..14cbb9b 100644 --- a/board/samsung/origen/origen.c +++ b/board/samsung/origen/origen.c @@ -27,13 +27,13 @@ #include <asm/arch/mmc.h> DECLARE_GLOBAL_DATA_PTR; -struct s5pc210_gpio_part1 *gpio1; -struct s5pc210_gpio_part2 *gpio2; +struct exynos4210_gpio_part1 *gpio1; +struct exynos4210_gpio_part2 *gpio2; int board_init(void) { - gpio1 = (struct s5pc210_gpio_part1 *) S5PC210_GPIO_PART1_BASE; - gpio2 = (struct s5pc210_gpio_part2 *) S5PC210_GPIO_PART2_BASE; + gpio1 = (struct exynos4210_gpio_part1 *) EXYNOS4210_GPIO_PART1_BASE; + gpio2 = (struct exynos4210_gpio_part2 *) EXYNOS4210_GPIO_PART2_BASE; gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL); return 0; diff --git a/board/samsung/origen/origen_setup.h b/board/samsung/origen/origen_setup.h index 63d85d8..fa9146f 100644 --- a/board/samsung/origen/origen_setup.h +++ b/board/samsung/origen/origen_setup.h @@ -98,8 +98,8 @@ #define INFORM1_OFFSET 0x804 /* GPIO Offsets for UART: GPIO Contol Register */ -#define S5PC210_GPIO_A0_CON_OFFSET 0x00 -#define S5PC210_GPIO_A1_CON_OFFSET 0x20 +#define EXYNOS4210_GPIO_A0_CON_OFFSET 0x00 +#define EXYNOS4210_GPIO_A1_CON_OFFSET 0x20 /* UART Register offsets */ #define ULCON_OFFSET 0x00 @@ -416,8 +416,8 @@ * UART GPIO_A0/GPIO_A1 Control Register Value * 0x2: UART Function */ -#define S5PC210_GPIO_A0_CON_VAL 0x22222222 -#define S5PC210_GPIO_A1_CON_VAL 0x222222 +#define EXYNOS4210_GPIO_A0_CON_VAL 0x22222222 +#define EXYNOS4210_GPIO_A1_CON_VAL 0x222222 /* ULCON: UART Line Control Value 8N1 */ #define WORD_LEN_5_BIT 0x00 diff --git a/board/samsung/smdkv310/lowlevel_init.S b/board/samsung/smdkv310/lowlevel_init.S index 58b737b..10f1b89 100644 --- a/board/samsung/smdkv310/lowlevel_init.S +++ b/board/samsung/smdkv310/lowlevel_init.S @@ -1,5 +1,5 @@ /* - * Lowlevel setup for SMDKV310 board based on S5PC210 + * Lowlevel setup for SMDKV310 board based on EXYNOS4210 * * Copyright (C) 2011 Samsung Electronics * @@ -45,11 +45,11 @@ lowlevel_init: /* r5 has always zero */ mov r5, #0 - ldr r7, =S5PC210_GPIO_PART1_BASE - ldr r6, =S5PC210_GPIO_PART2_BASE + ldr r7, =EXYNOS4210_GPIO_PART1_BASE + ldr r6, =EXYNOS4210_GPIO_PART2_BASE /* check reset status */ - ldr r0, =(S5PC210_POWER_BASE + 0x81C) @ INFORM7 + ldr r0, =(EXYNOS4210_POWER_BASE + 0x81C) @ INFORM7 ldr r1, [r0] /* AFTR wakeup reset */ @@ -95,9 +95,9 @@ wakeup_reset: exit_wakeup: /* Load return address and jump to kernel */ - ldr r0, =(S5PC210_POWER_BASE + 0x800) @ INFORM0 + ldr r0, =(EXYNOS4210_POWER_BASE + 0x800) @ INFORM0 - /* r1 = physical address of s5pc210_cpu_resume function */ + /* r1 = physical address of exynos4210_cpu_resume function */ ldr r1, [r0] /* Jump to kernel*/ @@ -111,7 +111,7 @@ exit_wakeup: */ system_clock_init: push {lr} - ldr r0, =S5PC210_CLOCK_BASE + ldr r0, =EXYNOS4210_CLOCK_BASE /* APLL(1), MPLL(1), CORE(0), HPM(0) */ ldr r1, =0x0101 @@ -388,12 +388,12 @@ uart_asm_init: /* setup UART0-UART3 GPIOs (part1) */ mov r0, r7 ldr r1, =0x22222222 - str r1, [r0, #0x00] @ S5PC210_GPIO_A0_OFFSET + str r1, [r0, #0x00] @ EXYNOS4210_GPIO_A0_OFFSET ldr r1, =0x00222222 - str r1, [r0, #0x20] @ S5PC210_GPIO_A1_OFFSET + str r1, [r0, #0x20] @ EXYNOS4210_GPIO_A1_OFFSET - ldr r0, =S5PC210_UART_BASE - add r0, r0, #S5PC210_DEFAULT_UART_OFFSET + ldr r0, =EXYNOS4210_UART_BASE + add r0, r0, #EXYNOS4210_DEFAULT_UART_OFFSET ldr r1, =0x3C5 str r1, [r0, #0x4] diff --git a/board/samsung/smdkv310/mem_setup.S b/board/samsung/smdkv310/mem_setup.S index 73aebe3..df62f5f 100644 --- a/board/samsung/smdkv310/mem_setup.S +++ b/board/samsung/smdkv310/mem_setup.S @@ -1,5 +1,5 @@ /* - * Memory setup for SMDKV310 board based on S5PC210 + * Memory setup for SMDKV310 board based on EXYNOS4210 * * Copyright (C) 2011 Samsung Electronics * @@ -54,7 +54,7 @@ mem_ctrl_asm_init: str r1, [r0] #ifdef SET_MIU - ldr r0, =S5PC210_MIU_BASE @0x10600000 + ldr r0, =EXYNOS4210_MIU_BASE @0x10600000 #ifdef CONFIG_MIU_1BIT_INTERLEAVED ldr r1, =0x0000000c str r1, [r0, #0x400] @MIU_INTLV_CONFIG @@ -89,7 +89,7 @@ mem_ctrl_asm_init: #endif #endif /* DREX0 */ - ldr r0, =S5PC210_DMC0_BASE @0x10400000 + ldr r0, =EXYNOS4210_DMC0_BASE @0x10400000 ldr r1, =0xe0000086 str r1, [r0, #0x1C] @DMC_PHYCONTROL1 @@ -221,7 +221,7 @@ mem_ctrl_asm_init: bne 8b /* DREX1 */ - ldr r0, =S5PC210_DMC1_BASE @0x10410000 + ldr r0, =EXYNOS4210_DMC1_BASE @0x10410000 ldr r1, =0xe0000086 str r1, [r0, #0x1C] @DMC_PHYCONTROL1 diff --git a/board/samsung/smdkv310/smdkv310.c b/board/samsung/smdkv310/smdkv310.c index d9caca7..44cd549 100644 --- a/board/samsung/smdkv310/smdkv310.c +++ b/board/samsung/smdkv310/smdkv310.c @@ -29,8 +29,8 @@ #include <asm/arch/sromc.h> DECLARE_GLOBAL_DATA_PTR; -struct s5pc210_gpio_part1 *gpio1; -struct s5pc210_gpio_part2 *gpio2; +struct exynos4210_gpio_part1 *gpio1; +struct exynos4210_gpio_part2 *gpio2; static void smc9115_pre_init(void) { @@ -52,8 +52,8 @@ static void smc9115_pre_init(void) int board_init(void) { - gpio1 = (struct s5pc210_gpio_part1 *) S5PC210_GPIO_PART1_BASE; - gpio2 = (struct s5pc210_gpio_part2 *) S5PC210_GPIO_PART2_BASE; + gpio1 = (struct exynos4210_gpio_part1 *) EXYNOS4210_GPIO_PART1_BASE; + gpio2 = (struct exynos4210_gpio_part2 *) EXYNOS4210_GPIO_PART2_BASE; smc9115_pre_init(); diff --git a/board/samsung/universal_c210/lowlevel_init.S b/board/samsung/universal_c210/lowlevel_init.S index 67635bb..76bbba5 100644 --- a/board/samsung/universal_c210/lowlevel_init.S +++ b/board/samsung/universal_c210/lowlevel_init.S @@ -1,5 +1,5 @@ /* - * Lowlevel setup for universal board based on S5PC210 + * Lowlevel setup for universal board based on EXYNOS4210 * * Copyright (C) 2010 Samsung Electronics * Kyungmin Park <kyungmin.park(a)samsung.com> @@ -43,11 +43,11 @@ lowlevel_init: /* r5 has always zero */ mov r5, #0 - ldr r7, =S5PC210_GPIO_PART1_BASE - ldr r6, =S5PC210_GPIO_PART2_BASE + ldr r7, =EXYNOS4210_GPIO_PART1_BASE + ldr r6, =EXYNOS4210_GPIO_PART2_BASE /* System Timer */ - ldr r0, =S5PC210_SYSTIMER_BASE + ldr r0, =EXYNOS4210_SYSTIMER_BASE ldr r1, =0x5000 str r1, [r0, #0x0] ldr r1, =0xffffffff @@ -57,7 +57,7 @@ lowlevel_init: /* PMIC manual reset */ /* nPOWER: XEINT_23: GPX2[7] */ - add r0, r6, #0xC40 @ S5PC210_GPIO_X2_OFFSET + add r0, r6, #0xC40 @ EXYNOS4210_GPIO_X2_OFFSET ldr r1, [r0, #0x0] bic r1, r1, #(0xf << 28) @ 28 = 7 * 4-bit orr r1, r1, #(0x1 << 28) @ Output @@ -71,7 +71,7 @@ lowlevel_init: bl system_clock_init /* Disable Watchdog */ - ldr r0, =S5PC210_WATCHDOG_BASE @0x10060000 + ldr r0, =EXYNOS4210_WATCHDOG_BASE @0x10060000 str r5, [r0] /* UART */ @@ -99,12 +99,12 @@ uart_asm_init: */ mov r0, r7 ldr r1, =0x22222222 - str r1, [r0, #0x00] @ S5PC210_GPIO_A0_OFFSET + str r1, [r0, #0x00] @ EXYNOS4210_GPIO_A0_OFFSET ldr r1, =0x00223322 - str r1, [r0, #0x20] @ S5PC210_GPIO_A1_OFFSET + str r1, [r0, #0x20] @ EXYNOS4210_GPIO_A1_OFFSET - /* UART_SEL GPY4[7] (part2) at S5PC210 */ - add r0, r6, #0x1A0 @ S5PC210_GPIO_Y4_OFFSET + /* UART_SEL GPY4[7] (part2) at EXYNOS4210 */ + add r0, r6, #0x1A0 @ EXYNOS4210_GPIO_Y4_OFFSET ldr r1, [r0, #0x0] bic r1, r1, #(0xf << 28) @ 28 = 7 * 4-bit orr r1, r1, #(0x1 << 28) @@ -125,7 +125,7 @@ uart_asm_init: nop system_clock_init: - ldr r0, =S5PC210_CLOCK_BASE + ldr r0, =EXYNOS4210_CLOCK_BASE /* APLL(1), MPLL(1), CORE(0), HPM(0) */ ldr r1, =0x0101 @@ -326,7 +326,7 @@ system_clock_init: nop system_power_init: - ldr r0, =S5PC210_POWER_BASE @ 0x10020000 + ldr r0, =EXYNOS4210_POWER_BASE @ 0x10020000 ldr r2, =0x330C @ PS_HOLD_CONTROL ldr r1, [r0, r2] diff --git a/board/samsung/universal_c210/universal.c b/board/samsung/universal_c210/universal.c index d767eaa..0542a16 100644 --- a/board/samsung/universal_c210/universal.c +++ b/board/samsung/universal_c210/universal.c @@ -31,8 +31,8 @@ DECLARE_GLOBAL_DATA_PTR; -struct s5pc210_gpio_part1 *gpio1; -struct s5pc210_gpio_part2 *gpio2; +struct exynos4210_gpio_part1 *gpio1; +struct exynos4210_gpio_part2 *gpio2; unsigned int board_rev; u32 get_board_rev(void) @@ -49,8 +49,8 @@ static void check_hw_revision(void); int board_init(void) { - gpio1 = (struct s5pc210_gpio_part1 *) S5PC210_GPIO_PART1_BASE; - gpio2 = (struct s5pc210_gpio_part2 *) S5PC210_GPIO_PART2_BASE; + gpio1 = (struct exynos4210_gpio_part1 *) EXYNOS4210_GPIO_PART1_BASE; + gpio2 = (struct exynos4210_gpio_part2 *) EXYNOS4210_GPIO_PART2_BASE; gd->bd->bi_arch_number = MACH_TYPE_UNIVERSAL_C210; gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; diff --git a/boards.cfg b/boards.cfg index 8b7a03b..c7d5377 100644 --- a/boards.cfg +++ b/boards.cfg @@ -195,9 +195,9 @@ omap4_panda arm armv7 panda ti omap4_sdp4430 arm armv7 sdp4430 ti omap4 s5p_goni arm armv7 goni samsung s5pc1xx smdkc100 arm armv7 smdkc100 samsung s5pc1xx -origen arm armv7 origen samsung s5pc2xx -s5pc210_universal arm armv7 universal_c210 samsung s5pc2xx -smdkv310 arm armv7 smdkv310 samsung s5pc2xx +origen arm armv7 origen samsung exynos4 +s5pc210_universal arm armv7 universal_c210 samsung exynos4 +smdkv310 arm armv7 smdkv310 samsung exynos4 harmony arm armv7 harmony nvidia tegra2 seaboard arm armv7 seaboard nvidia tegra2 u8500_href arm armv7 u8500 st-ericsson u8500 diff --git a/include/configs/origen.h b/include/configs/origen.h index 380ef4f..6099e87 100644 --- a/include/configs/origen.h +++ b/include/configs/origen.h @@ -1,7 +1,7 @@ /* * Copyright (C) 2011 Samsung Electronics * - * Configuration settings for the SAMSUNG ORIGEN (S5PV310) board. + * Configuration settings for the SAMSUNG ORIGEN (EXYNOS4210) board. * * See file CREDITS for list of people who contributed to this * project. @@ -28,7 +28,7 @@ /* High Level Configuration Options */ #define CONFIG_SAMSUNG 1 /* SAMSUNG core */ #define CONFIG_S5P 1 /* S5P Family */ -#define CONFIG_S5PC210 1 /* which is in a S5PC210 SoC */ +#define CONFIG_EXYNOS4210 1 /* which is a EXYNOS4210 SoC */ #define CONFIG_ORIGEN 1 /* working with ORIGEN*/ #include <asm/arch/cpu.h> /* get chip and board defs */ @@ -68,7 +68,7 @@ #define CONFIG_SERIAL_MULTI 1 #define CONFIG_SERIAL2 1 /* use SERIAL 2 */ #define CONFIG_BAUDRATE 115200 -#define S5PC210_DEFAULT_UART_OFFSET 0x020000 +#define EXYNOS4210_DEFAULT_UART_OFFSET 0x020000 /* SD/MMC configuration */ #define CONFIG_GENERIC_MMC 1 diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h index cc14f97..0e390bd 100644 --- a/include/configs/s5pc210_universal.h +++ b/include/configs/s5pc210_universal.h @@ -2,7 +2,7 @@ * Copyright (C) 2010 Samsung Electronics * Minkyu Kang <mk7.kang(a)samsung.com> * - * Configuation settings for the SAMSUNG Universal (s5pc100) board. + * Configuation settings for the SAMSUNG Universal (EXYNOS4210) board. * * See file CREDITS for list of people who contributed to this * project. @@ -32,7 +32,7 @@ */ #define CONFIG_SAMSUNG 1 /* in a SAMSUNG core */ #define CONFIG_S5P 1 /* which is in a S5P Family */ -#define CONFIG_S5PC210 1 /* which is in a S5PC210 */ +#define CONFIG_EXYNOS4210 1 /* which is in a EXYNOS4210 */ #define CONFIG_UNIVERSAL 1 /* working with Universal */ #include <asm/arch/cpu.h> /* get chip and board defs */ @@ -47,7 +47,7 @@ #define CONFIG_SYS_SDRAM_BASE 0x40000000 #define CONFIG_SYS_TEXT_BASE 0x44800000 -/* input clock of PLL: Universal has 24MHz input clock at S5PC210 */ +/* input clock of PLL: Universal has 24MHz input clock at EXYNOS4210 */ #define CONFIG_SYS_CLK_FREQ_C210 24000000 #define CONFIG_SETUP_MEMORY_TAGS @@ -249,8 +249,8 @@ /* * I2C Settings */ -#define CONFIG_SOFT_I2C_GPIO_SCL s5pc210_gpio_part1_get_nr(b, 7) -#define CONFIG_SOFT_I2C_GPIO_SDA s5pc210_gpio_part1_get_nr(b, 6) +#define CONFIG_SOFT_I2C_GPIO_SCL exynos4210_gpio_part1_get_nr(b, 7) +#define CONFIG_SOFT_I2C_GPIO_SDA exynos4210_gpio_part1_get_nr(b, 6) #define CONFIG_SOFT_I2C #define CONFIG_SOFT_I2C_READ_REPEATED_START diff --git a/include/configs/smdkv310.h b/include/configs/smdkv310.h index fc8bb06..f81e4d7 100644 --- a/include/configs/smdkv310.h +++ b/include/configs/smdkv310.h @@ -1,7 +1,7 @@ /* * Copyright (C) 2011 Samsung Electronics * - * Configuration settings for the SAMSUNG SMDKV310 (S5PC210) board. + * Configuration settings for the SAMSUNG SMDKV310 (EXYNOS4210) board. * * See file CREDITS for list of people who contributed to this * project. @@ -28,7 +28,7 @@ /* High Level Configuration Options */ #define CONFIG_SAMSUNG 1 /* in a SAMSUNG core */ #define CONFIG_S5P 1 /* S5P Family */ -#define CONFIG_S5PC210 1 /* which is in a S5PC210 SoC */ +#define CONFIG_EXYNOS4210 1 /* which is a EXYNOS4210 SoC */ #define CONFIG_SMDKV310 1 /* working with SMDKV310*/ #include <asm/arch/cpu.h> /* get chip and board defs */ @@ -65,7 +65,7 @@ #define CONFIG_SERIAL_MULTI 1 #define CONFIG_SERIAL1 1 /* use SERIAL 1 */ #define CONFIG_BAUDRATE 115200 -#define S5PC210_DEFAULT_UART_OFFSET 0x010000 +#define EXYNOS4210_DEFAULT_UART_OFFSET 0x010000 /* SD/MMC configuration */ #define CONFIG_GENERIC_MMC 1 -- 1.7.5.4

13 years, 5 months

[PATCH 04/11] Power: DA9052 Battery driver v4

by Ashish Jangam

Driver for DA9052 battery charger. This driver depends on DA9052 MFD core dirver for definitions and methods. Tested on Samsung SMDK6410 board with DA9052-BC and DA9053-BA evaluation boards. Signed-off-by: David Dajun Chen <dchen(a)diasemi.com> Signed-off-by: Ashish Jangam <ashish.jangam(a)kpitcummins.com> --- Changes since v3 - Included power_supply.h file - Corrected the definition of DA9052_BAT_THRESHOLD macro - Changed definition of charger_type_enum - Added API da9052_battery_read_end_current - Added API da9052_battery_check_status - Changed the way of handling the interrupts in da9052_bat_irq Changes since v2 - Correct code styling for inline functions - Remove averaging algorithm - Set use_for_apm thru board specific parameter --- drivers/power/Kconfig | 7 + drivers/power/Makefile | 1 + drivers/power/da9052-battery.c | 611 ++++++++++++++++++++++++++++++++++++++++ 3 files changed, 619 insertions(+), 0 deletions(-) create mode 100644 drivers/power/da9052-battery.c diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig index 9f88641..9696502 100644 --- a/drivers/power/Kconfig +++ b/drivers/power/Kconfig @@ -150,6 +150,13 @@ config BATTERY_DA9030 Say Y here to enable support for batteries charger integrated into DA9030 PMIC. +config BATTERY_DA9052 + tristate "Dialog DA9052 Battery" + depends on PMIC_DA9052 + help + Say Y here to enable support for batteries charger integrated into + DA9052 PMIC. + config BATTERY_MAX17040 tristate "Maxim MAX17040 Fuel Gauge" depends on I2C diff --git a/drivers/power/Makefile b/drivers/power/Makefile index b4af13d..c570e20 100644 --- a/drivers/power/Makefile +++ b/drivers/power/Makefile @@ -25,6 +25,7 @@ obj-$(CONFIG_BATTERY_WM97XX) += wm97xx_battery.o obj-$(CONFIG_BATTERY_BQ20Z75) += bq20z75.o obj-$(CONFIG_BATTERY_BQ27x00) += bq27x00_battery.o obj-$(CONFIG_BATTERY_DA9030) += da9030_battery.o +obj-$(CONFIG_BATTERY_DA9052) += da9052-battery.o obj-$(CONFIG_BATTERY_MAX17040) += max17040_battery.o obj-$(CONFIG_BATTERY_MAX17042) += max17042_battery.o obj-$(CONFIG_BATTERY_Z2) += z2_battery.o diff --git a/drivers/power/da9052-battery.c b/drivers/power/da9052-battery.c new file mode 100644 index 0000000..d9096df --- /dev/null +++ b/drivers/power/da9052-battery.c @@ -0,0 +1,611 @@ +/* + * Batttery Driver for Dialog DA9052 PMICs + * + * Copyright(c) 2011 Dialog Semiconductor Ltd. + + * Author: David Dajun Chen <dchen(a)diasemi.com> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + */ + +#include <linux/delay.h> +#include <linux/freezer.h> +#include <linux/fs.h> +#include <linux/jiffies.h> +#include <linux/module.h> +#include <linux/timer.h> +#include <linux/uaccess.h> +#include <linux/platform_device.h> +#include <linux/power_supply.h> + +#include <linux/mfd/da9052/da9052.h> +#include <linux/mfd/da9052/pdata.h> +#include <linux/mfd/da9052/reg.h> + +/* STATIC CONFIGURATION */ +#define DA9052_BAT_CUTOFF_VOLT 2800 +#define DA9052_BAT_THRESHOLD 62000 +#define DA9052_BAT_CAPACITY_LIMIT_LOW 4 +#define DA9052_AVERAGE_SIZE 4 +#define DA9052_LOOK_UP_TABLE_SIZE 68 +#define DA9052_NO_OF_LOOKUP_TABLE 3 + +enum charger_type_enum { + DA9052_NOCHARGER = 1, + DA9052_CHARGER, +}; + +static const u16 temperature_lookup_ref[3] = {10, 25, 40}; +static u32 const vbat_vs_capacity_look_up[3][68][2] = { + /* For temperature 10 degree celisus*/ + { + {4082, 100}, {4036, 98}, + {4020, 96}, {4008, 95}, + {3997, 93}, {3983, 91}, + {3964, 90}, {3943, 88}, + {3926, 87}, {3912, 85}, + {3900, 84}, {3890, 82}, + {3881, 80}, {3873, 79}, + {3865, 77}, {3857, 76}, + {3848, 74}, {3839, 73}, + {3829, 71}, {3820, 70}, + {3811, 68}, {3802, 67}, + {3794, 65}, {3785, 64}, + {3778, 62}, {3770, 61}, + {3763, 59}, {3756, 58}, + {3750, 56}, {3744, 55}, + {3738, 53}, {3732, 52}, + {3727, 50}, {3722, 49}, + {3717, 47}, {3712, 46}, + {3708, 44}, {3703, 43}, + {3700, 41}, {3696, 40}, + {3693, 38}, {3691, 37}, + {3688, 35}, {3686, 34}, + {3683, 32}, {3681, 31}, + {3678, 29}, {3675, 28}, + {3672, 26}, {3669, 25}, + {3665, 23}, {3661, 22}, + {3656, 21}, {3651, 19}, + {3645, 18}, {3639, 16}, + {3631, 15}, {3622, 13}, + {3611, 12}, {3600, 10}, + {3587, 9}, {3572, 7}, + {3548, 6}, {3503, 5}, + {3420, 3}, {3268, 2}, + {2992, 1}, {2746, 0} + }, + /* For temperature 25 degree celisus */ + { + {4102, 100}, {4065, 98}, + {4048, 96}, {4034, 95}, + {4021, 93}, {4011, 92}, + {4001, 90}, {3986, 88}, + {3968, 87}, {3952, 85}, + {3938, 84}, {3926, 82}, + {3916, 81}, {3908, 79}, + {3900, 77}, {3892, 76}, + {3883, 74}, {3874, 73}, + {3864, 71}, {3855, 70}, + {3846, 68}, {3836, 67}, + {3827, 65}, {3819, 64}, + {3810, 62}, {3801, 61}, + {3793, 59}, {3786, 58}, + {3778, 56}, {3772, 55}, + {3765, 53}, {3759, 52}, + {3754, 50}, {3748, 49}, + {3743, 47}, {3738, 46}, + {3733, 44}, {3728, 43}, + {3724, 41}, {3720, 40}, + {3716, 38}, {3712, 37}, + {3709, 35}, {3706, 34}, + {3703, 33}, {3701, 31}, + {3698, 30}, {3696, 28}, + {3693, 27}, {3690, 25}, + {3687, 24}, {3683, 22}, + {3680, 21}, {3675, 19}, + {3671, 18}, {3666, 17}, + {3660, 15}, {3654, 14}, + {3647, 12}, {3639, 11}, + {3630, 9}, {3621, 8}, + {3613, 6}, {3606, 5}, + {3597, 4}, {3582, 2}, + {3546, 1}, {2747, 0} + }, + /* For temperature 40 degree celisus*/ + { + {4114, 100}, {4081, 98}, + {4065, 96}, {4050, 95}, + {4036, 93}, {4024, 92}, + {4013, 90}, {4002, 88}, + {3990, 87}, {3976, 85}, + {3962, 84}, {3950, 82}, + {3939, 81}, {3930, 79}, + {3921, 77}, {3912, 76}, + {3902, 74}, {3893, 73}, + {3883, 71}, {3874, 70}, + {3865, 68}, {3856, 67}, + {3847, 65}, {3838, 64}, + {3829, 62}, {3820, 61}, + {3812, 59}, {3803, 58}, + {3795, 56}, {3787, 55}, + {3780, 53}, {3773, 52}, + {3767, 50}, {3761, 49}, + {3756, 47}, {3751, 46}, + {3746, 44}, {3741, 43}, + {3736, 41}, {3732, 40}, + {3728, 38}, {3724, 37}, + {3720, 35}, {3716, 34}, + {3713, 33}, {3710, 31}, + {3707, 30}, {3704, 28}, + {3701, 27}, {3698, 25}, + {3695, 24}, {3691, 22}, + {3686, 21}, {3681, 19}, + {3676, 18}, {3671, 17}, + {3666, 15}, {3661, 14}, + {3655, 12}, {3648, 11}, + {3640, 9}, {3632, 8}, + {3622, 6}, {3616, 5}, + {3611, 4}, {3604, 2}, + {3594, 1}, {2747, 0} + } +}; + +struct da9052_battery { + struct da9052 *da9052; + struct power_supply psy; + int charger_type; + int status; + int health; +}; + +static inline int volt_reg_to_mV(int value) +{ + return ((value * 1000) / 512) + 2500; +} + +static inline int ichg_reg_to_mA(int value) +{ + return (value * 3900) / 1000; +} + +static int da9052_battery_read_end_current(struct da9052_battery *battery, + int *current_mA) +{ + int ret; + + if (battery->status == POWER_SUPPLY_STATUS_DISCHARGING) + return -EINVAL; + + ret = da9052_reg_read(battery->da9052, DA9052_ICHG_END_REG); + if (ret < 0) + return ret; + + *current_mA = ichg_reg_to_mA(ret & DA9052_ICHGEND_ICHGEND); + + return 0; +} + +static int da9052_battery_read_current(struct da9052_battery *battery, + int *current_mA) +{ + int ret; + + if (battery->status == POWER_SUPPLY_STATUS_DISCHARGING) + return -EINVAL; + + ret = da9052_reg_read(battery->da9052, DA9052_ICHG_AV_REG); + if (ret < 0) + return ret; + + *current_mA = ichg_reg_to_mA(ret & DA9052_ICHGAV_ICHGAV); + + return 0; +} + +static int da9052_battery_check_status(struct da9052_battery *battery, + int *status) +{ + uint8_t v[2] = {0, 0}; + uint8_t bat_status, chg_end; + int ret, chg_current, chg_end_current; + + ret = da9052_group_read(battery->da9052, DA9052_STATUS_A_REG, 2, v); + if (ret < 0) + return ret; + + bat_status = v[0]; + chg_end = v[1]; + + /* Preference to WALL(DCIN) charger unit */ + if (((bat_status & DA9052_STATUSA_DCINSEL) && + (bat_status & DA9052_STATUSA_DCINDET)) + || + ((bat_status & DA9052_STATUSA_VBUSSEL) && + (bat_status & DA9052_STATUSA_VBUSDET)) + ) { + battery->charger_type = DA9052_CHARGER; + + /* If charging end flag is set and Charging current is greater + * than charging end limit then battery is charging + */ + if ((chg_end & DA9052_STATUSB_CHGEND) != 0) { + ret = da9052_battery_read_current(battery, + &chg_current); + if (ret < 0) + return ret; + ret = da9052_battery_read_end_current(battery, + &chg_end_current); + if (ret < 0) + return ret; + + if (chg_current >= chg_end_current) + battery->status = POWER_SUPPLY_STATUS_CHARGING; + else + battery->status = + POWER_SUPPLY_STATUS_NOT_CHARGING; + } + /* If Charging end flag is cleared then battery is charging */ + else + battery->status = POWER_SUPPLY_STATUS_CHARGING; + } else if (bat_status & DA9052_STATUSA_DCINDET || + bat_status & DA9052_STATUSA_VBUSDET) { + battery->charger_type = DA9052_CHARGER; + battery->status = POWER_SUPPLY_STATUS_NOT_CHARGING; + } else { + battery->charger_type = DA9052_NOCHARGER; + battery->status = POWER_SUPPLY_STATUS_DISCHARGING; + } + + if (status != NULL) + *status = battery->status; + return 0; +} + +static int da9052_battery_read_volt(struct da9052_battery *battery, + int *volt_mV) +{ + int voltage; + + voltage = da9052_adc_manual_read(battery->da9052, + DA9052_ADC_MAN_MUXSEL_VBAT); + if (voltage < 0) + return voltage; + + *volt_mV = volt_reg_to_mV(voltage); + + return 0; +} + +static int da9052_battery_check_presence(struct da9052_battery *battery, + int *illegal) +{ + int bat_temp; + + bat_temp = da9052_adc_temperature_read(battery->da9052); + if (bat_temp < 0) + return bat_temp; + + if (bat_temp > DA9052_BAT_THRESHOLD) + *illegal = 1; + else + *illegal = 0; + + return 0; +} + +static int interpolated(int vbat_lower, int vbat_upper, int level_lower, + int level_upper, int bat_voltage) +{ + int temp; + + temp = ((level_upper - level_lower) * 1000) / (vbat_upper - vbat_lower); + temp = level_lower + (((bat_voltage - vbat_lower) * temp) / 1000); + + return temp; +} + +unsigned char select_temperature(unsigned char temp_index, int bat_temperature) +{ + int temp_temperature; + + temp_temperature = (temperature_lookup_ref[temp_index] + + temperature_lookup_ref[temp_index + 1]) / 2; + + if (bat_temperature >= temp_temperature) { + temp_index += 1; + return temp_index; + } else + return temp_index; +} + +static int da9052_battery_read_capacity(struct da9052_battery *battery, + int *capacity) +{ + int bat_temperature, bat_voltage; + int vbat_lower, vbat_upper, level_upper, level_lower; + int ret, flag, index, access_index = 0; + + ret = da9052_battery_read_volt(battery, &bat_voltage); + if (ret < 0) + return ret; + + bat_temperature = da9052_adc_temperature_read(battery->da9052); + if (bat_temperature < 0) + return bat_temperature; + + for (index = 0; index < (DA9052_NO_OF_LOOKUP_TABLE - 1); index++) { + if (bat_temperature <= temperature_lookup_ref[0]) { + access_index = 0; + break; + } else if (bat_temperature > + temperature_lookup_ref[DA9052_NO_OF_LOOKUP_TABLE]) { + access_index = DA9052_NO_OF_LOOKUP_TABLE - 1; + break; + } else if ((bat_temperature >= temperature_lookup_ref[index]) && + (bat_temperature >= temperature_lookup_ref[index + 1] + )) { + access_index = select_temperature(index, + bat_temperature); + break; + } + } + if (bat_voltage >= vbat_vs_capacity_look_up[access_index][0][0]) { + *capacity = 100; + return 0; + } + if (bat_voltage <= vbat_vs_capacity_look_up[access_index] + [DA9052_LOOK_UP_TABLE_SIZE - 1][0]) { + *capacity = 0; + return 0; + } + flag = 0; + + for (index = 0; index < (DA9052_LOOK_UP_TABLE_SIZE-1); index++) { + if ((bat_voltage <= + vbat_vs_capacity_look_up[access_index][index][0]) && + (bat_voltage >= + vbat_vs_capacity_look_up[access_index][index + 1][0])) { + vbat_upper = + vbat_vs_capacity_look_up[access_index][index][0]; + vbat_lower = + vbat_vs_capacity_look_up[access_index][index + 1][0]; + level_upper = + vbat_vs_capacity_look_up[access_index][index][1]; + level_lower = + vbat_vs_capacity_look_up[access_index][index + 1][1]; + flag = 1; + break; + } + } + if (!flag) + return -EIO; + + *capacity = interpolated(vbat_lower, vbat_upper, level_lower, + level_upper, bat_voltage); + + return 0; +} + +static int da9052_battery_check_health(struct da9052_battery *battery, + int *health) +{ + int ret, bat_illegal, capacity; + + ret = da9052_battery_check_presence(battery, &bat_illegal); + if (ret < 0) + return ret; + + if (bat_illegal) { + battery->health = POWER_SUPPLY_HEALTH_UNKNOWN; + return 0; + } + + if (battery->health != POWER_SUPPLY_HEALTH_OVERHEAT) { + ret = da9052_battery_read_capacity(battery, &capacity); + if (ret < 0) + return ret; + if (capacity < DA9052_BAT_CAPACITY_LIMIT_LOW) + battery->health = POWER_SUPPLY_HEALTH_DEAD; + else + battery->health = POWER_SUPPLY_HEALTH_GOOD; + } + + *health = battery->health; + + return 0; +} + +static irqreturn_t da9052_bat_irq(int irq, void *data) +{ + struct da9052_battery *battery = (struct da9052_battery *)data; + + irq -= battery->da9052->irq_base; + + if (irq == DA9052_IRQ_CHGEND) + battery->status = POWER_SUPPLY_STATUS_FULL; + else + da9052_battery_check_status(battery, NULL); + + if (irq == DA9052_IRQ_CHGEND || irq == DA9052_IRQ_DCIN || + irq == DA9052_IRQ_VBUS || irq == DA9052_IRQ_TBAT) { + power_supply_changed(&battery->psy); + } + + return IRQ_HANDLED; +} + +static int da9052_bat_get_property(struct power_supply *psy, + enum power_supply_property psp, + union power_supply_propval *val) +{ + int ret, illegal; + struct da9052_battery *battery = container_of(psy, + struct da9052_battery, psy); + + ret = da9052_battery_check_presence(battery, &illegal); + if (ret < 0) + return ret; + + if (illegal && psp != POWER_SUPPLY_PROP_PRESENT) + return -ENODEV; + + switch (psp) { + case POWER_SUPPLY_PROP_STATUS: + ret = da9052_battery_check_status(battery, &val->intval); + break; + case POWER_SUPPLY_PROP_ONLINE: + val->intval = + (battery->charger_type == DA9052_NOCHARGER) ? 0 : 1; + break; + case POWER_SUPPLY_PROP_PRESENT: + ret = da9052_battery_check_presence(battery, &val->intval); + break; + case POWER_SUPPLY_PROP_HEALTH: + ret = da9052_battery_check_health(battery, &val->intval); + break; + case POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN: + val->intval = DA9052_BAT_CUTOFF_VOLT * 1000; + break; + case POWER_SUPPLY_PROP_VOLTAGE_AVG: + ret = da9052_battery_read_volt(battery, &val->intval); + break; + case POWER_SUPPLY_PROP_CURRENT_AVG: + ret = da9052_battery_read_current(battery, &val->intval); + break; + case POWER_SUPPLY_PROP_CAPACITY: + ret = da9052_battery_read_capacity(battery, &val->intval); + break; + case POWER_SUPPLY_PROP_TEMP: + val->intval = da9052_adc_temperature_read(battery->da9052); + ret = val->intval; + break; + case POWER_SUPPLY_PROP_TECHNOLOGY: + val->intval = POWER_SUPPLY_TECHNOLOGY_LION; + break; + default: + return -EINVAL; + } + return ret; +} + +static enum power_supply_property da9052_bat_props[] = { + POWER_SUPPLY_PROP_STATUS, + POWER_SUPPLY_PROP_ONLINE, + POWER_SUPPLY_PROP_PRESENT, + POWER_SUPPLY_PROP_HEALTH, + POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN, + POWER_SUPPLY_PROP_VOLTAGE_AVG, + POWER_SUPPLY_PROP_CURRENT_AVG, + POWER_SUPPLY_PROP_CAPACITY, + POWER_SUPPLY_PROP_TEMP, + POWER_SUPPLY_PROP_TECHNOLOGY, +}; + +static struct power_supply template_battery = { + .name = "da9052-bat", + .type = POWER_SUPPLY_TYPE_BATTERY, + .properties = da9052_bat_props, + .num_properties = ARRAY_SIZE(da9052_bat_props), + .get_property = da9052_bat_get_property, +}; + +static const char *da9052_bat_irqs[] = { + "BATT TEMP", + "DCIN DET", + "DCIN REM", + "VBUS DET", + "VBUS REM", + "CHG END", +}; + +static s32 __devinit da9052_bat_probe(struct platform_device *pdev) +{ + struct da9052_pdata *pdata; + struct da9052_battery *battery; + int ret, irq, i; + + battery = kzalloc(sizeof(struct da9052_battery), GFP_KERNEL); + if (!battery) + return -ENOMEM; + + battery->da9052 = dev_get_drvdata(pdev->dev.parent); + pdata = battery->da9052->dev->platform_data; + + battery->psy = template_battery; + if (pdata != NULL && pdata->use_for_apm) + battery->psy.use_for_apm = pdata->use_for_apm; + battery->charger_type = DA9052_NOCHARGER; + battery->status = POWER_SUPPLY_STATUS_UNKNOWN; + battery->health = POWER_SUPPLY_HEALTH_UNKNOWN; + + for (i = 0; i < ARRAY_SIZE(da9052_bat_irqs); i++) { + irq = platform_get_irq_byname(pdev, da9052_bat_irqs[i]); + ret = request_threaded_irq(battery->da9052->irq_base + irq, + NULL, da9052_bat_irq, + IRQF_TRIGGER_LOW | IRQF_ONESHOT, + da9052_bat_irqs[i], battery); + if (ret != 0) { + dev_err(battery->da9052->dev, + "DA9052 failed to request %s IRQ %d: %d\n", + da9052_bat_irqs[i], irq, ret); + goto err; + } + } + + ret = power_supply_register(&pdev->dev, &battery->psy); + if (ret) + goto err; + + return 0; + +err: + for (; i >= 0; i--) { + irq = platform_get_irq_byname(pdev, da9052_bat_irqs[i]); + free_irq(irq, battery); + } + kfree(battery); + return ret; +} +static int __devexit da9052_bat_remove(struct platform_device *pdev) +{ + int i, irq; + struct da9052_battery *battery = platform_get_drvdata(pdev); + + for (i = 0; i < ARRAY_SIZE(da9052_bat_irqs); i++) { + irq = platform_get_irq_byname(pdev, da9052_bat_irqs[i]); + free_irq(irq, battery); + } + power_supply_unregister(&battery->psy); + + return 0; +} + +static struct platform_driver da9052_bat_driver = { + .probe = da9052_bat_probe, + .remove = __devexit_p(da9052_bat_remove), + .driver = { + .name = "da9052-bat", + .owner = THIS_MODULE, + }, +}; + +static int __init da9052_bat_init(void) +{ + return platform_driver_register(&da9052_bat_driver); +} +module_init(da9052_bat_init); + +static void __exit da9052_bat_exit(void) +{ + platform_driver_unregister(&da9052_bat_driver); +} +module_exit(da9052_bat_exit); + +MODULE_DESCRIPTION("DA9052 BAT Device Driver"); +MODULE_AUTHOR("David Dajun Chen <dchen(a)diasemi.com>"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:da9052-bat"); -- 1.7.1

13 years, 5 months

[ACTIVITY] Android Platform Team 2011-11-14 to 2011-11-20

by Tony Mansson

Hello. Here is the weekly status report from the Android Platform Team. Key Points for wider discussion =============================== * Android 2.3.7 Platform Release 11.11 complete and tested on all boards. * Android 4.0 ICS up and running on Snowball. Team Highlights =============================== * ARM vexpress is now in android-build. * The Kernel configuration is now available on android-build Build details page. * A prototype of the kernel rebuild script exits. * Progress on ICS for iMX53 and Origen * The gator daemon for DS-5 running on all but the Origen builds. * ath6k Origen WiFi firmware has been integrated in Origen builds. * USB 2.0 Ethernet adapter works on Origen board. * Progress on MediaFrameworkTest integration. Bugs fixed =============================== 878979, 886058, 889843, 889847, 891753, 892881, 884409, 842451, 877859, 891684, 884931 Miscellaneous =============================== * New Team member Kejun Zhou from ST-Ericsson China. * Both fgiff (Dec. 16) and cyang (Dec. 9) are Leaving Linaro due to ST-Ericsson basingstoke site closing. Issues =============================== * Time lost due to the build system becoming corrupted (#891753). Blueprints =============================== https://launchpad.net/linaro-android/+milestone/11.11

13 years, 5 months

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