linaro-dev

linaro-dev@lists.linaro.org

4332 discussions

by peter green

Ulrich Weigand>Now, glibc also provides a file <sys/ucontext.h> that defines Ulrich Weigand>layouts of register sets for use with signal handlers as well Ulrich Weigand>as the makecontext/setcontext/getcontext family of routines. Ulrich Weigand> Ulrich Weigand>Usually, those layouts tend to be in fact identical to the Ulrich Weigand>layouts described in <sys/user.h> / <sys/procfs.h>. Apparently, Ulrich Weigand>whoever implemented the ARM version of <sys/ucontext.h> was Ulrich Weigand>trying to avoid some seemingly unnecessary code duplication Ulrich Weigand>by making <sys/ucontext.h> *include* <sys/procfs.h> and using Ulrich Weigand>the information from there directly. This is not done on other Ulrich Weigand>platforms, for precisely the reason that the <sys/procfs.h> Ulrich Weigand>and <sys/user.h> headers do pollute the name space ... Ulrich Weigand> Ulrich Weigand>So I think the right thing to do in the short term would be to Ulrich Weigand>stop <sys/ucontext.h> including <sys/procfs.h>, and instead add the Ulrich Weigand>register set information there directly, even if that means some Ulrich Weigand>duplication of code. (Again, since this is never-changing ABI, Ulrich Weigand>duplication isn't actually all that bad. Also, all the other Ulrich Weigand>platforms do it that way too, so why should ARM be different ...) Makes sense to me While we are talking about modifying sys/ucontext.h David Given raised another issue with that header (for those reading on the linaro list his post can be found at http://lists.debian.org/debian-arm/2011/12/msg00048.html) David Given>This might be a good time to mention that on ARM, sys/ucontext.h defines David Given>both symbols and preprocessor macros called R0, R1, R2, etc in the David Given>global namespace; this is causing one of my packages to fail to build David Given>due to symbol collision. David Given> David Given>I'm fixing the package, but naming symbols stuff like that is still David Given>pretty antisocial... Does anyone know what the impact of renaming these to use a REG_ prefix like i386, amd64 and sparc do* would be? * ia64,mips, mipsel, powerpc, 390 and s390x don't seem to define such symbols at all.

13 years, 5 months

[Patch] Regulator: Replace kzalloc with devm_kzalloc and if-else with a switch-case for da9052-regulator

by Ashish Jangam

Reported-by: Mark Brown <broonie(a)opensource.wolfsonmicro.com> Signed-off-by: David Dajun Chen <dchen(a)diasemi.com> Signed-off-by: Ashish Jangam <ashish.jangam(a)kpitcummins.com> --- drivers/regulator/da9052-regulator.c | 16 +++++++++++----- 1 files changed, 11 insertions(+), 5 deletions(-) diff --git a/drivers/regulator/da9052-regulator.c b/drivers/regulator/da9052-regulator.c index 9fff281..37a20c1 100755 --- a/drivers/regulator/da9052-regulator.c +++ b/drivers/regulator/da9052-regulator.c @@ -505,18 +505,23 @@ static inline struct da9052_regulator_info *find_regulator_info(u8 chip_id, struct da9052_regulator_info *info; int i; - if (chip_id == DA9052) { + switch (chip_id) { + case DA9052: for (i = 0; i < ARRAY_SIZE(da9052_regulator_info); i++) { info = &da9052_regulator_info[i]; if (info->reg_desc.id == id) return info; } - } else { + break; + case DA9053_AA: + case DA9053_BA: + case DA9053_BB: for (i = 0; i < ARRAY_SIZE(da9053_regulator_info); i++) { info = &da9053_regulator_info[i]; if (info->reg_desc.id == id) return info; } + break; } return NULL; @@ -529,7 +534,8 @@ static int __devinit da9052_regulator_probe(struct platform_device *pdev) struct da9052_pdata *pdata; int ret; - regulator = kzalloc(sizeof(struct da9052_regulator), GFP_KERNEL); + regulator = devm_kzalloc(&pdev->dev, sizeof(struct da9052_regulator), + GFP_KERNEL); if (!regulator) return -ENOMEM; @@ -559,7 +565,7 @@ static int __devinit da9052_regulator_probe(struct platform_device *pdev) return 0; err: - kfree(regulator); + devm_kfree(&pdev->dev, regulator); return ret; } @@ -568,7 +574,7 @@ static int __devexit da9052_regulator_remove(struct platform_device *pdev) struct da9052_regulator *regulator = platform_get_drvdata(pdev); regulator_unregister(regulator->rdev); - kfree(regulator); + devm_kfree(&pdev->dev, regulator); return 0; }

13 years, 5 months

Problems with timers with linux-next on snowball

by Daniel Lezcano

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 Hi, while trying the linux-next at the point it boots (commit be9b7335e70696bee731c152429b1737e42fe163, after v3.2-rc4), I noticed the timers were not working properly with CONFIG_NO_HZ. It is easy to reproduce with 'time sleep 1' where the timer expires 1, 2 or 3 seconds later. It seems that does not happen with linux-linaro-3.1 but I was able to reproduce the problem on a vanilla kernel 3.1.5. Is it a known problem ? Thanks -- Daniel - -- <http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook | <http://twitter.com/#!/linaroorg> Twitter | <http://www.linaro.org/linaro-blog/> Blog -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org/ iQEcBAEBAgAGBQJO6MBZAAoJEAKBbMCpUGYAUI4IAMOMK+90biBp+1tj/tY/A1is FJEQXi1wzhLGo23gIh6D65dcLRsxr3TSdvcHGz2dzB1ZquaaUUJCv8vM909bCSF8 y3dH4WIzEF/rNPcyI2WgtjDq/KVcZK28in8XresC7yC0fEmEB6fHRvQoqBk5fhsb jWPM8nGbyXJpBFK4yCZRgrz2TYsDInyazplHtGzABMj9j374Wk6yGAsDnCd6/XJM dArM2IP4Mcd7Zv6m4kJ2vncTCnKR+D4wVTXdRrXTqAd8byfKBgyUHxY/cviXirHp 03nSKJYaw683YhdJ0JVQQJfdOEl+kaCDOkCEV5MUUiSCRors1Z8FcK+DAPAjG84= =spxQ -----END PGP SIGNATURE-----

13 years, 5 months

[REMINDER] Linaro Release 11.12

by David Zinman

Greetings with a friendly reminder. * Linaro 11.12 Release Candidate is December 19, 2011. * Linaro 11.12 Release images is December 22, 2011 (early due to Christmas holiday). * Linaro 11.12 release is UTC 16:00, December 22, 2011. The release team needs: ==================== * an up-to-date list of components to be delivered for this cycle. * https://wiki.linaro.org/Cycles/1112/Release/Status * all blueprints targeted for this cycle have a headline and acceptance criteria. * https://wiki.linaro.org/Cycles/1112/Release/Blueprints * an up-to-date point of contact list for your team for the release dates. If PoC for your team is the same as last month please confirm. * https://wiki.linaro.org/Cycles/1112/Release/PointOfContacts -- David Zinman Linaro Release Manager | Project Manager Linaro.org | Open source software for ARM SoCs

13 years, 5 months

glmark2 10th anniversary

by Alexandros Frantzis

Hi all! The 2011.12 release marks glmark2's 10th major release! Our OpenGL (ES) 2.0 graphics benchmark, glmark2, has been a central component of the Linaro Graphics WG since the group's creation, and even before that, when we still had a "User Platforms" team. glmark2 has been improving steadily with each and every release. We have seen it run on all kinds of devices: desktops, netbooks, development boards, tablets and smartphones (sadly, no TVs or refrigerators yet). It currently provides over 10 highly configurable benchmarking scenes, it supports both (programmable) OpenGL and OpenGL ES 2.0 and runs on both GNU/Linux and Android. In short, it is the most versatile Free Software 3D benchmarking application out there! To celebrate this release, I have written a post/article about the principles and goals that drive glmark2 development (and the Graphics WG group in general). It should be visible soon in planet.linaro.org. Enjoy! Thanks, Alexandros

13 years, 5 months

[PATCH v4] ARM: OMAP2+: hwmod: Add a new flag to handle hwmods left enabled at init

by Paul Walmsley

From: Rajendra Nayak <rnayak(a)ti.com> An hwmod with a 'HWMOD_INIT_NO_IDLE' flag set, is left in enabled state by the hwmod framework post the initial setup. Once a real user of the device (a driver) tries to enable it at a later point, the hwmod framework throws a WARN() about the device being already in enabled state. Fix this by introducing a new internal flag '_HWMOD_SKIP_ENABLE' to identify such devices/hwmods. When the device/hwmod is requested to be enabled (the first time) by its driver/user, nothing except the mux-enable is needed. The mux data is board specific and is unavailable during initial enable() of the device, done by the framework as part of setup(). A good example of a such a device is an UART used as debug console. The UART module needs to be kept enabled through the boot, until the UART driver takes control of it, for debug prints to appear on the console. Acked-by: Kevin Hilman <khilman(a)ti.com> Acked-by: Benoit Cousson <b-cousson(a)ti.com> Signed-off-by: Rajendra Nayak <rnayak(a)ti.com> [paul(a)pwsan.com: use a flag rather than a state; updated commit message; edited some documentation] Signed-off-by: Paul Walmsley <paul(a)pwsan.com> --- This patch needs to be applied along with Govindraj & Kevin's UART patch set. Otherwise lots of nasty warnings are generated to the console during boot. Applies on top of v3.2-rc5. arch/arm/mach-omap2/omap_hwmod.c | 23 ++++++++++++++++++++++- arch/arm/plat-omap/include/plat/omap_hwmod.h | 3 +++ 2 files changed, 25 insertions(+), 1 deletions(-) diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 529142a..f673f80 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -1441,6 +1441,25 @@ static int _enable(struct omap_hwmod *oh) pr_debug("omap_hwmod: %s: enabling\n", oh->name); + /* + * hwmods with HWMOD_INIT_NO_IDLE flag set are left + * in enabled state at init. + * Now that someone is really trying to enable them, + * just ensure that the hwmod mux is set. + */ + if (oh->_int_flags & _HWMOD_SKIP_ENABLE) { + /* + * If the caller has mux data populated, do the mux'ing + * which wouldn't have been done as part of the _enable() + * done during setup. + */ + if (oh->mux) + omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED); + + oh->_int_flags &= ~_HWMOD_SKIP_ENABLE; + return 0; + } + if (oh->_state != _HWMOD_STATE_INITIALIZED && oh->_state != _HWMOD_STATE_IDLE && oh->_state != _HWMOD_STATE_DISABLED) { @@ -1744,8 +1763,10 @@ static int _setup(struct omap_hwmod *oh, void *data) * it should be set by the core code as a runtime flag during startup */ if ((oh->flags & HWMOD_INIT_NO_IDLE) && - (postsetup_state == _HWMOD_STATE_IDLE)) + (postsetup_state == _HWMOD_STATE_IDLE)) { + oh->_int_flags |= _HWMOD_SKIP_ENABLE; postsetup_state = _HWMOD_STATE_ENABLED; + } if (postsetup_state == _HWMOD_STATE_IDLE) _idle(oh); diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h index 8b372ed..1a13c02 100644 --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h @@ -416,10 +416,13 @@ struct omap_hwmod_omap4_prcm { * _HWMOD_NO_MPU_PORT: no path exists for the MPU to write to this module * _HWMOD_WAKEUP_ENABLED: set when the omap_hwmod code has enabled ENAWAKEUP * _HWMOD_SYSCONFIG_LOADED: set when the OCP_SYSCONFIG value has been cached + * _HWMOD_SKIP_ENABLE: set if hwmod enabled during init (HWMOD_INIT_NO_IDLE) - + * causes the first call to _enable() to only update the pinmux */ #define _HWMOD_NO_MPU_PORT (1 << 0) #define _HWMOD_WAKEUP_ENABLED (1 << 1) #define _HWMOD_SYSCONFIG_LOADED (1 << 2) +#define _HWMOD_SKIP_ENABLE (1 << 3) /* * omap_hwmod._state definitions -- 1.7.7.3

13 years, 5 months

[Activity] Power Management WG Weekly Status report for week ending 2011-12-16

by Mounir Bsaibes

Enclosed please find the link to the Weekly Status report & meeting minutes for the Power Management working group for the week ending 2011-12-16 == Weekly Status Report == https://wiki.linaro.org/WorkingGroups/PowerManagement/Status/2011-12-15 == Meeting Minutes == https://wiki.linaro.org/WorkingGroups/PowerManagement/Meetings/2011-12-14 == Summary == (For details, see the Weekly Status Report and Meeting Minutes ) * Power Management initial sessions for next Linaro Connect lcq1-12 has been set, please see: http://summit.ubuntu.com/lcq1-12/track/linaro-power-management/ * New Common Clock patches have been submitted, including support for OMAP4. * Sched_mc patches are now available on android LEB * Submitted v2 of common cpuidle driver. * Added a generic processor cooling devices(non ACPI based, for ACPI already exists) Best regards, Mounir -- Mounir Bsaibes Project Manager Follow Linaro.org: facebook.com/pages/Linaro/155974581091106 http://twitter.com/#!/linaroorg http://www.linaro.org/linaro-blog <http://www.linaro.org/linaro-blog>

13 years, 5 months

[ACTIVITY] OCTO weekly status report - wk49.2011 (20111205-20111209)

by Ilias Biris

Status report: https://wiki.linaro.org/OfficeofCTO/WeeklyReport Last weekly meeting minutes: https://wiki.linaro.org/OfficeofCTO/2011-12-13 Highlights: = ARMHF = - Debian: 67 % of the archive built (https://buildd.debian.org/stats/graph-week-big.png), chasing/fixing up ~140-180 build failures now. Estimated to need a week or two more - Ubuntu - the email from Mathias Klose (thread in linaro-dev: http://lists.linaro.org/pipermail/linaro-dev/2011-December/009242.html) describes well the status for Ubuntu armhf build. Emphasis on the issues which Matthias raised: compilers not completely built yet packaging mentioning armel only not armhf hardfloat issues needing porting work = ARM Server = - Preparing server WG presentation to mgmt team - will start filling out some meta-blueprints for the initial work, concentrating on the kernel parts - Finished and discussing the first version of Server WG roadmap with updated mandate and PMWG bits - Starting to look into the newly released ACPI v5 specification, with the interest to write a whitepaper on ACPI recommendations Questions/comments? -- Ilias Biris ilias.biris(a)linaro.org Project Manager, Linaro M: +358504839608, IRC: ibiris Skype: ilias_biris Linaro.org│ Open source software for ARM SoCs

13 years, 5 months

[PATCH v3] ARM: OMAP2+: hwmod: Add a new state to handle hwmods left enabled at init

by Rajendra Nayak

An hwmod with a 'HWMOD_INIT_NO_IDLE' flag set, is left in enabled state by the hwmod framework post the initial setup. Once a real user of the device (a driver) tries to enable it at a later point, the hwmod framework throws a WARN() about the device being already in enabled state. Fix this by introducing a new state '_HWMOD_STATE_ENABLED_AT_INIT' to identify such devices/hwmods. When the device/hwmod is requested to be enabled (the first time) by its driver/user, nothing except the mux-enable and a state change to '_HWMOD_STATE_ENABLED' is needed. The mux data is board specific and is unavailable during initial enable() of the device, done by the framework as part of setup(). A good example of a such a device is an UART used as debug console. The UART module needs to be kept enabled through the boot, until the UART driver takes control of it, for debug prints to appear on the console. Acked-by: Kevin Hilman <khilman(a)ti.com> Acked-by: Benoit Cousson <b-cousson(a)ti.com> Signed-off-by: Rajendra Nayak <rnayak(a)ti.com> --- arch/arm/mach-omap2/omap_hwmod.c | 23 ++++++++++++++++++++++- arch/arm/plat-omap/include/plat/omap_hwmod.h | 6 ++++++ 2 files changed, 28 insertions(+), 1 deletions(-) diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 6b3088d..166a42d 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -1441,6 +1441,25 @@ static int _enable(struct omap_hwmod *oh) pr_debug("omap_hwmod: %s: enabling\n", oh->name); + /* + * hwmods' with HWMOD_INIT_NO_IDLE flag set, are left + * in enabled state at init. + * Now that someone is really trying to enable them, + * just update the state. + */ + if (oh->_state == _HWMOD_STATE_ENABLED_AT_INIT) { + /* + * If the caller has mux data populated, do the mux'ing + * which wouldn't have been done as part of the _enable() + * done during setup. + */ + if (oh->mux) + omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED); + + oh->_state = _HWMOD_STATE_ENABLED; + return 0; + } + if (oh->_state != _HWMOD_STATE_INITIALIZED && oh->_state != _HWMOD_STATE_IDLE && oh->_state != _HWMOD_STATE_DISABLED) { @@ -1744,8 +1763,10 @@ static int _setup(struct omap_hwmod *oh, void *data) * it should be set by the core code as a runtime flag during startup */ if ((oh->flags & HWMOD_INIT_NO_IDLE) && - (postsetup_state == _HWMOD_STATE_IDLE)) + (postsetup_state == _HWMOD_STATE_IDLE)) { + oh->_state = _HWMOD_STATE_ENABLED_AT_INIT; postsetup_state = _HWMOD_STATE_ENABLED; + } if (postsetup_state == _HWMOD_STATE_IDLE) _idle(oh); diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h index 8b372ed..2bd3929 100644 --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h @@ -436,6 +436,12 @@ struct omap_hwmod_omap4_prcm { #define _HWMOD_STATE_ENABLED 4 #define _HWMOD_STATE_IDLE 5 #define _HWMOD_STATE_DISABLED 6 +/* + * This state signifies the hwmod was left enabled + * after init, by the framework, because of the + * 'HWMOD_INIT_NO_IDLE' flag. + */ +#define _HWMOD_STATE_ENABLED_AT_INIT 7 /** * struct omap_hwmod_class - the type of an IP block -- 1.7.1

13 years, 5 months

[RFC V1 1/4] cpufreq: add arm soc generic cpufreq driver

by Richard Zhao

It support single core and multi-core ARM SoCs. But it assume all cores share the same frequency and voltage. Signed-off-by: Richard Zhao <richard.zhao(a)linaro.org> --- drivers/cpufreq/Kconfig.arm | 8 ++ drivers/cpufreq/Makefile | 1 + drivers/cpufreq/arm-cpufreq.c | 260 +++++++++++++++++++++++++++++++++++++++++ 3 files changed, 269 insertions(+), 0 deletions(-) create mode 100644 drivers/cpufreq/arm-cpufreq.c diff --git a/drivers/cpufreq/Kconfig.arm b/drivers/cpufreq/Kconfig.arm index 72a0044..a0f7d35 100644 --- a/drivers/cpufreq/Kconfig.arm +++ b/drivers/cpufreq/Kconfig.arm @@ -2,6 +2,14 @@ # ARM CPU Frequency scaling drivers # +config ARM_GENERIC_CPUFREQ + bool "ARM generic" + help + This adds ARM generic CPUFreq driver. It assumes all + cores of the SoC share the same clock and voltage. + + If in doubt, say N. + config ARM_S3C64XX_CPUFREQ bool "Samsung S3C64XX" depends on CPU_S3C6410 diff --git a/drivers/cpufreq/Makefile b/drivers/cpufreq/Makefile index ce75fcb..6ccf02d 100644 --- a/drivers/cpufreq/Makefile +++ b/drivers/cpufreq/Makefile @@ -39,6 +39,7 @@ obj-$(CONFIG_X86_CPUFREQ_NFORCE2) += cpufreq-nforce2.o ################################################################################## # ARM SoC drivers +obj-$(CONFIG_ARM_GENERIC_CPUFREQ) += arm-cpufreq.o obj-$(CONFIG_UX500_SOC_DB8500) += db8500-cpufreq.o obj-$(CONFIG_ARM_S3C64XX_CPUFREQ) += s3c64xx-cpufreq.o obj-$(CONFIG_ARM_S5PV210_CPUFREQ) += s5pv210-cpufreq.o diff --git a/drivers/cpufreq/arm-cpufreq.c b/drivers/cpufreq/arm-cpufreq.c new file mode 100644 index 0000000..fd9759f --- /dev/null +++ b/drivers/cpufreq/arm-cpufreq.c @@ -0,0 +1,260 @@ +/* + * Copyright (C) 2010 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include <linux/module.h> +#include <linux/cpufreq.h> +#include <linux/clk.h> +#include <linux/err.h> +#include <linux/slab.h> +#include <linux/of.h> +#include <asm/cpu.h> +#include <mach/hardware.h> +#include <mach/clock.h> + +static u32 *cpu_freqs; +static u32 *cpu_volts; +static u32 trans_latency; +static int cpu_op_nr; + +static int cpu_freq_khz_min; +static int cpu_freq_khz_max; + +static struct clk *cpu_clk; +static struct cpufreq_frequency_table *arm_freq_table; + +static int set_cpu_freq(int freq) +{ + int ret = 0; + int org_cpu_rate; + + org_cpu_rate = clk_get_rate(cpu_clk); + if (org_cpu_rate == freq) + return ret; + + ret = clk_set_rate(cpu_clk, freq); + if (ret != 0) { + printk(KERN_DEBUG "cannot set CPU clock rate\n"); + return ret; + } + + return ret; +} + +static int arm_verify_speed(struct cpufreq_policy *policy) +{ + return cpufreq_frequency_table_verify(policy, arm_freq_table); +} + +static unsigned int arm_get_speed(unsigned int cpu) +{ + return clk_get_rate(cpu_clk) / 1000; +} + +static int arm_set_target(struct cpufreq_policy *policy, + unsigned int target_freq, unsigned int relation) +{ + struct cpufreq_freqs freqs; + int freq_Hz, cpu; + int ret = 0; + unsigned int index; + + cpufreq_frequency_table_target(policy, arm_freq_table, + target_freq, relation, &index); + freq_Hz = arm_freq_table[index].frequency * 1000; + + freqs.old = clk_get_rate(cpu_clk) / 1000; + freqs.new = clk_round_rate(cpu_clk, freq_Hz); + freqs.new = (freqs.new ? freqs.new : freq_Hz) / 1000; + freqs.flags = 0; + + if (freqs.old == freqs.new) + return 0; + + for_each_possible_cpu(cpu) { + freqs.cpu = cpu; + cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); + } + + ret = set_cpu_freq(freq_Hz); + +#ifdef CONFIG_SMP + /* loops_per_jiffy is not updated by the cpufreq core for SMP systems. + * So update it for all CPUs. + */ + for_each_possible_cpu(cpu) + per_cpu(cpu_data, cpu).loops_per_jiffy = + cpufreq_scale(per_cpu(cpu_data, cpu).loops_per_jiffy, + freqs.old, freqs.new); +#endif + + for_each_possible_cpu(cpu) { + freqs.cpu = cpu; + cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); + } + + return ret; +} + +static int arm_cpufreq_init(struct cpufreq_policy *policy) +{ + int ret; + + printk(KERN_INFO "ARM CPU frequency driver\n"); + + if (policy->cpu >= num_possible_cpus()) + return -EINVAL; + + policy->cur = clk_get_rate(cpu_clk) / 1000; + policy->min = policy->cpuinfo.min_freq = cpu_freq_khz_min; + policy->max = policy->cpuinfo.max_freq = cpu_freq_khz_max; + policy->shared_type = CPUFREQ_SHARED_TYPE_ANY; + cpumask_setall(policy->cpus); + /* Manual states, that PLL stabilizes in two CLK32 periods */ + policy->cpuinfo.transition_latency = trans_latency; + + ret = cpufreq_frequency_table_cpuinfo(policy, arm_freq_table); + + if (ret < 0) { + printk(KERN_ERR "%s: failed to register i.MXC CPUfreq with error code %d\n", + __func__, ret); + return ret; + } + + cpufreq_frequency_table_get_attr(arm_freq_table, policy->cpu); + return 0; +} + +static int arm_cpufreq_exit(struct cpufreq_policy *policy) +{ + cpufreq_frequency_table_put_attr(policy->cpu); + + set_cpu_freq(cpu_freq_khz_max * 1000); + return 0; +} + +static struct cpufreq_driver arm_cpufreq_driver = { + .flags = CPUFREQ_STICKY, + .verify = arm_verify_speed, + .target = arm_set_target, + .get = arm_get_speed, + .init = arm_cpufreq_init, + .exit = arm_cpufreq_exit, + .name = "arm", +}; + +static int __devinit arm_cpufreq_driver_init(void) +{ + struct device_node *cpu0; + const struct property *pp; + int i, ret; + + cpu0 = of_find_node_by_path("/cpus/cpu@0"); + if (!cpu0) + return -ENODEV; + + pp = of_find_property(cpu0, "cpu_freqs", NULL); + if (!pp) { + ret = -ENODEV; + goto put_node; + } + cpu_op_nr = pp->length / sizeof(u32); + if (!cpu_op_nr) { + ret = -ENODEV; + goto put_node; + } + ret = -ENOMEM; + cpu_freqs = kzalloc(sizeof(*cpu_freqs) * cpu_op_nr, GFP_KERNEL); + if (!cpu_freqs) + goto put_node; + of_property_read_u32_array(cpu0, "cpu_freqs", cpu_freqs, cpu_op_nr); + + pp = of_find_property(cpu0, "cpu_volts", NULL); + if (pp) { + if (cpu_op_nr == pp->length / sizeof(u32)) { + cpu_volts = kzalloc(sizeof(*cpu_freqs) * cpu_op_nr, + GFP_KERNEL); + if (!cpu_volts) + goto free_cpu_freqs; + of_property_read_u32_array(cpu0, "cpu_volts", + cpu_freqs, cpu_op_nr); + } else + printk(KERN_WARNING "cpufreq: invalid cpu_volts!\n"); + } + + if (of_property_read_u32(cpu0, "trans_latency", &trans_latency)) + trans_latency = CPUFREQ_ETERNAL; + + cpu_freq_khz_min = cpu_freqs[0] / 1000; + cpu_freq_khz_max = cpu_freqs[0] / 1000; + + arm_freq_table = kmalloc(sizeof(struct cpufreq_frequency_table) + * (cpu_op_nr + 1), GFP_KERNEL); + if (!arm_freq_table) + goto free_cpu_volts; + + for (i = 0; i < cpu_op_nr; i++) { + arm_freq_table[i].index = i; + arm_freq_table[i].frequency = cpu_freqs[i] / 1000; + if ((cpu_freqs[i] / 1000) < cpu_freq_khz_min) + cpu_freq_khz_min = cpu_freqs[i] / 1000; + if ((cpu_freqs[i] / 1000) > cpu_freq_khz_max) + cpu_freq_khz_max = cpu_freqs[i] / 1000; + } + + arm_freq_table[i].index = i; + arm_freq_table[i].frequency = CPUFREQ_TABLE_END; + + cpu_clk = clk_get(NULL, "cpu"); + if (IS_ERR(cpu_clk)) { + printk(KERN_ERR "%s: failed to get cpu clock\n", __func__); + ret = PTR_ERR(cpu_clk); + goto free_freq_table; + } + + ret = cpufreq_register_driver(&arm_cpufreq_driver); + if (ret) + goto clock_put; + + of_node_put(cpu0); + + return 0; + +clock_put: + clk_put(cpu_clk); +free_freq_table: + kfree(arm_freq_table); +free_cpu_volts: + kfree(cpu_volts); +free_cpu_freqs: + kfree(cpu_freqs); +put_node: + of_node_put(cpu0); + + return ret; +} + +static void arm_cpufreq_driver_exit(void) +{ + cpufreq_unregister_driver(&arm_cpufreq_driver); + kfree(cpu_freqs); + kfree(cpu_volts); + kfree(arm_freq_table); + clk_put(cpu_clk); +} + +module_init(arm_cpufreq_driver_init); +module_exit(arm_cpufreq_driver_exit); + +MODULE_AUTHOR("Freescale Semiconductor Inc. Richard Zhao <richard.zhao(a)freescale.com>"); +MODULE_DESCRIPTION("ARM SoC generic CPUFreq driver"); +MODULE_LICENSE("GPL"); -- 1.7.5.4

13 years, 5 months

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

2012

2011

2010

linaro-dev