On 03/11/2025 16:49, Leo Yan wrote:
Add a new argument restart_ss to etm4_enable_hw(). When passed as true, it resets the TRCSSCSRn.STATUS bit to 0 to re-enable single-shot control.
No functional change. This is a preparation for a subsequent change.
Reviewed-by: Mike Leach mike.leach@linaro.org Tested-by: James Clark james.clark@linaro.org Reviewed-by: Yeoreum Yun yeoreum.yun@arm.com Signed-off-by: Leo Yan leo.yan@arm.com
drivers/hwtracing/coresight/coresight-etm4x-core.c | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-)
diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c index 560975b70474c3449aa6799fc1a8e05d5ea93495..5101ac3885c7dec6aed397668a866b7cfe907d10 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c @@ -490,7 +490,7 @@ static int etm4_enable_trace_unit(struct etmv4_drvdata *drvdata) return 0; } -static int etm4_enable_hw(struct etmv4_drvdata *drvdata) +static int etm4_enable_hw(struct etmv4_drvdata *drvdata, bool restart_ss)
While this looks to work, I wonder if we could manage this all in the config ? i.e.,
Use an extra field, say config->retain_single_shot_status, which defaults to 0 and is always cleared once we pass through enable_hw.
{ int i, rc; struct etmv4_config *config = &drvdata->config; @@ -565,9 +565,11 @@ static int etm4_enable_hw(struct etmv4_drvdata *drvdata) etm4x_relaxed_write32(csa, config->res_ctrl[i], TRCRSCTLRn(i)); for (i = 0; i < drvdata->nr_ss_cmp; i++) {
/* always clear status bit on restart if using single-shot */if (config->ss_ctrl[i] || config->ss_pe_cmp[i])config->ss_status[i] &= ~TRCSSCSRn_STATUS;
if (restart_ss) {
if (!config->retain_single_shot_status) {> + /* always clear status bit on restart if using single-shot */
if (config->ss_ctrl[i] || config->ss_pe_cmp[i])config->ss_status[i] &= ~TRCSSCSRn_STATUS;}
} else { config->retain_single_shot_status = 0; }
So, the default behavior is "clear" the status and can be explicitly requested by the CPU PM code to leave it alone. We could do this as a separate cleanup.
Suzuki
}> etm4x_relaxed_write32(csa, config->ss_ctrl[i], TRCSSCCRn(i));
etm4x_relaxed_write32(csa, config->ss_status[i], TRCSSCSRn(i)); if (etm4x_sspcicrn_present(drvdata, i))@@ -624,7 +626,7 @@ static void etm4_enable_sysfs_smp_call(void *info) return; }
- arg->rc = etm4_enable_hw(arg->drvdata);
- arg->rc = etm4_enable_hw(arg->drvdata, true);
/* The tracer didn't start */ if (arg->rc) @@ -861,7 +863,7 @@ static int etm4_enable_perf(struct coresight_device *csdev, drvdata->paused = !!READ_ONCE(event->hw.aux_paused); /* And enable it */
- ret = etm4_enable_hw(drvdata);
- ret = etm4_enable_hw(drvdata, true);
out: /* Failed to start tracer; roll back to DISABLED mode */ @@ -1820,7 +1822,7 @@ static int etm4_starting_cpu(unsigned int cpu) etm4_os_unlock(etmdrvdata[cpu]); if (coresight_get_mode(etmdrvdata[cpu]->csdev))
etm4_enable_hw(etmdrvdata[cpu]);
etm4_enable_hw(etmdrvdata[cpu], true);