14 Aug
2025
14 Aug
'25
10:52 a.m.
On 14/08/2025 11:25 am, Mike Leach wrote:
On Thu, 14 Aug 2025 at 10:51, James Clark james.clark@linaro.org wrote:
On 12/08/2025 9:24 am, Yuanfang Zhang wrote:
The TRCEXTINSELR is only implemented if TRCIDR5.NUMEXTINSEL > 0. To avoid invalid accesses, introduce a check on numextinsel (derived from TRCIDR5[11:9]) before reading or writing to this register.
Fixes: f5bd523690d2 ("coresight: etm4x: Convert all register accesses")
This tag isn't right. Although this is where the register accesses were last touched, the root issue was present from the introduction of the driver.
Memory mapped access to unimplemented registers are RES0 so won't fail
- the issue is the system register access where an undefined exception
can be triggered.
Mike
Ah, good point. I assumed that commit was just a refactor.