CoreSight

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2387 discussions

GDB: status of branch tracing on arm processors using coresight etm traces

by Zied Guermazi

hi all I am announcing updates in the implementation of branch tracing using coresight etm in GDB. in this update, functions and instruction history are running successfully on single threaded applications. reverse debugging is basically working with the limitation that sometimes cspr register (register 25) is required but current implementation does not provide it. the feature requires linux kernel v 4.19 or higher with manual etm sink setup. 5.9.1 or higher for automatic sink selection. GDB gdb.btrace test suite was adapted to run on arm processors. here is the summary of the gdb.btrace test results executed on an STM32MP157 (ARM cortex A7) with Linux kernel 5.9.1 === gdb Summary === # of expected passes 390 # of unexpected failures 119 # of unsupported tests 4 following tests are 100% successful: - buffer-size - enable - instruction_history - function_call_history - data - delta - cpu - gcore - record_goto-step - dlopen - vdso - segv GDB source code is available on https://github.com/gzied/binutils-gdb/tree/gdb_arm_coresight many thanks to GDB and linaro communities for their support Kind Regards Zied Guermazi

4 years, 8 months

[PATCHv2 0/4] coresight: etf/etb10/etr: Fix NULL pointer dereference crashes

by Sai Prakash Ranjan

There was a report of NULL pointer dereference in ETF enable path for perf CS mode with PID monitoring. It is almost 100% reproducible when the process to monitor is something very active such as chrome and with ETF as the sink and not ETR. Currently in a bid to find the pid, the owner is dereferenced via task_pid_nr() call in tmc_enable_etf_sink_perf() and with owner being NULL, we get a NULL pointer dereference. Looking at the ETR and other places in the kernel, ETF and the ETB are the only places trying to dereference the task(owner) in tmc_enable_etf_sink_perf() which is also called from the sched_in path as in the call trace. Owner(task) is NULL even in the case of ETR in tmc_enable_etr_sink_perf(), but since we cache the PID in alloc_buffer() callback and it is done as part of etm_setup_aux() when allocating buffer for ETR sink, we never dereference this NULL pointer and we are safe. So lets do the same thing with ETF and ETB and cache the PID to which the cs_buffer belongs in alloc_buffer() callback for ETF and ETB as done for ETR. This will also remove the unnecessary function calls (task_pid_nr()) in tmc_enable_etr_sink_perf() and etb_enable_perf(). In addition to this, add a check to validate event->owner before dereferencing it in ETR, ETB and ETF to avoid any possible NULL pointer dereference crashes in their corresponding alloc_buffer callbacks and check for kernel events as well. Easily reproducible running below: perf record -e cs_etm/@tmc_etf0/ -N -p <pid> Unable to handle kernel NULL pointer dereference at virtual address 0000000000000548 Mem abort info: ESR = 0x96000006 EC = 0x25: DABT (current EL), IL = 32 bits SET = 0, FnV = 0 EA = 0, S1PTW = 0 Data abort info: ISV = 0, ISS = 0x00000006 CM = 0, WnR = 0 <snip>... Call trace: tmc_enable_etf_sink+0xe4/0x280 coresight_enable_path+0x168/0x1fc etm_event_start+0x8c/0xf8 etm_event_add+0x38/0x54 event_sched_in+0x194/0x2ac group_sched_in+0x54/0x12c flexible_sched_in+0xd8/0x120 visit_groups_merge+0x100/0x16c ctx_flexible_sched_in+0x50/0x74 ctx_sched_in+0xa4/0xa8 perf_event_sched_in+0x60/0x6c perf_event_context_sched_in+0x98/0xe0 __perf_event_task_sched_in+0x5c/0xd8 finish_task_switch+0x184/0x1cc schedule_tail+0x20/0xec ret_from_fork+0x4/0x18 Sai Prakash Ranjan (4): perf/core: Export is_kernel_event() coresight: tmc-etf: Fix NULL ptr dereference in tmc_enable_etf_sink_perf() coresight: etb10: Fix possible NULL ptr dereference in etb_enable_perf() coresight: tmc-etr: Fix possible NULL ptr dereference in get_perf_etr_buf_cpu_wide() drivers/hwtracing/coresight/coresight-etb10.c | 8 +++++++- drivers/hwtracing/coresight/coresight-priv.h | 2 ++ drivers/hwtracing/coresight/coresight-tmc-etf.c | 8 +++++++- drivers/hwtracing/coresight/coresight-tmc-etr.c | 6 +++++- include/linux/perf_event.h | 2 ++ kernel/events/core.c | 3 ++- 6 files changed, 25 insertions(+), 4 deletions(-) base-commit: f4cb5e9daedf56671badc93ac7f364043aa33886 -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation

4 years, 8 months

GDB: etm traces decoding and breakpoints for arm targets

by Zied Guermazi

hi, while testing the implementation in gdb of branch tracing on arm processors using etm, I faced the the situation where a breakpoint was set, was hit and then the execution of the program was continued. While decoding generated traces, I got the address of the breakpoint (0x400552) executed twice, and then the following address (0x400554) also executed twice. the instruction at (0x400554) is a BL ( a function call) and the second execution corrupts the function history. here is a dump of generated trace elements --------------------------------- trace_chan_id: 18 isa: CS_ETM_ISA_T32 start addr = 0x400552 end addr = 0x400554 instructions count = 1 last_i_type: OCSD_INSTR_OTHER last_i_subtype: OCSD_S_INSTR_NONE last instruction was executed last instruction size: 2 --------------------------------- trace_chan_id: 18 isa: CS_ETM_ISA_T32 start addr = 0x400552 end addr = 0x400554 instructions count = 1 last_i_type: OCSD_INSTR_OTHER last_i_subtype: OCSD_S_INSTR_NONE last instruction was executed last instruction size: 2 --------------------------------- trace_chan_id: 18 isa: CS_ETM_ISA_T32 start addr = 0x400554 end addr = 0x400558 instructions count = 1 last_i_type: OCSD_INSTR_BR last_i_subtype: OCSD_S_INSTR_BR_LINK last instruction was executed last instruction size: 4 --------------------------------- trace_chan_id: 18 isa: CS_ETM_ISA_T32 start addr = 0x400554 end addr = 0x400558 instructions count = 1 last_i_type: OCSD_INSTR_BR last_i_subtype: OCSD_S_INSTR_BR_LINK last instruction was executed last instruction size: 4 the explanation I have for this behavior is that : -when setting the software breakpoint, the memory content of the instruction (at 0x400552) was altered to the instruction BKPT, -when the breakpoint was hit, the original opcode was set at (0x400552) and a BKPT was set to the next instruction address (0x400554), then the execution was continued -when the second breakpoint (0x400554) was hit, the a BKPT opcode was set at (0x400552) and the original opcode was set at (0x400554) then the execution was continued I am using the function "int target_read_code (CORE_ADDR memaddr, gdb_byte *myaddr, ssize_t len)" to give program memory content to the decoder. so the collected etm traces are correct, but, as memory was altered in between, the decoder is "cheated". I need to identify the re-execution of code due to breakpoint handling, and roll back its impact on etm decoding. is there a mean to get the actual content of program memory including patched addresses? is there a means of getting the history of patched addresses during the debugging of a program? what is the type and subtype of a BKPT instruction in a decoded trace elements? do you have any other idea for handling this situation? I am attaching the source code of the program as well as the disassembled binary. the code was compiled as an application running on linux on an ARMv7 A (STM32MP157 SoC). the breakpoint was set at line 43 in the source code (line 238 in the disassembled code) Kind Regards Zied Guermazi

4 years, 8 months

[PATCH] coresight: Remove unnecessary THIS_MODULE of funnel and replicator driver

by Qi Liu

As THIS_MODULE has been set in platform_driver_register(), so remove it from static funnel driver and static replicator driver to avoid set it twice. Signed-off-by: Qi Liu <liuqi115(a)huawei.com> --- drivers/hwtracing/coresight/coresight-funnel.c | 2 +- drivers/hwtracing/coresight/coresight-replicator.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-funnel.c b/drivers/hwtracing/coresight/coresight-funnel.c index af40814..39be46b 100644 --- a/drivers/hwtracing/coresight/coresight-funnel.c +++ b/drivers/hwtracing/coresight/coresight-funnel.c @@ -356,7 +356,7 @@ static struct platform_driver static_funnel_driver = { .remove = static_funnel_remove, .driver = { .name = "coresight-static-funnel", - .owner = THIS_MODULE, + /* THIS_MODULE is taken care of by platform_driver_register() */ .of_match_table = static_funnel_match, .acpi_match_table = ACPI_PTR(static_funnel_ids), .pm = &funnel_dev_pm_ops, diff --git a/drivers/hwtracing/coresight/coresight-replicator.c b/drivers/hwtracing/coresight/coresight-replicator.c index 62afdde..6772f23 100644 --- a/drivers/hwtracing/coresight/coresight-replicator.c +++ b/drivers/hwtracing/coresight/coresight-replicator.c @@ -374,7 +374,7 @@ static struct platform_driver static_replicator_driver = { .remove = static_replicator_remove, .driver = { .name = "coresight-static-replicator", - .owner = THIS_MODULE, + /* THIS_MODULE is taken care of by platform_driver_register() */ .of_match_table = of_match_ptr(static_replicator_match), .acpi_match_table = ACPI_PTR(static_replicator_acpi_ids), .pm = &replicator_dev_pm_ops, -- 2.8.1

4 years, 8 months

Re: [PATCH 30/33] docs: ABI: cleanup several ABI documents

by Bjorn Andersson

On Wed 28 Oct 09:23 CDT 2020, Mauro Carvalho Chehab wrote: [..] > .../ABI/testing/sysfs-class-remoteproc | 14 +- for this: Acked-by: Bjorn Andersson <bjorn.andersson(a)linaro.org> Thanks, Bjorn

4 years, 8 months

[PATCH AUTOSEL 5.9 075/147] coresight: Make sysfs functional on topologies with per core sink

by Sasha Levin

From: Linu Cherian <lcherian(a)marvell.com> [ Upstream commit 6d578258b955fc8888e1bbd9a8fefe7b10065a84 ] Coresight driver assumes sink is common across all the ETMs, and tries to build a path between ETM and the first enabled sink found using bus based search. This breaks sysFS usage on implementations that has multiple per core sinks in enabled state. To fix this, coresight_get_enabled_sink API is updated to do a connection based search starting from the given source, instead of bus based search. With sink selection using sysfs depecrated for perf interface, provision for reset is removed as well in this API. Signed-off-by: Linu Cherian <lcherian(a)marvell.com> [Fixed indentation problem and removed obsolete comment] Signed-off-by: Mathieu Poirier <mathieu.poirier(a)linaro.org> Link: https://lore.kernel.org/r/20200916191737.4001561-15-mathieu.poirier@linaro.… Signed-off-by: Greg Kroah-Hartman <gregkh(a)linuxfoundation.org> Signed-off-by: Sasha Levin <sashal(a)kernel.org> --- drivers/hwtracing/coresight/coresight-priv.h | 3 +- drivers/hwtracing/coresight/coresight.c | 62 +++++++++----------- 2 files changed, 29 insertions(+), 36 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-priv.h b/drivers/hwtracing/coresight/coresight-priv.h index f2dc625ea5856..5fe773c4d6cc5 100644 --- a/drivers/hwtracing/coresight/coresight-priv.h +++ b/drivers/hwtracing/coresight/coresight-priv.h @@ -148,7 +148,8 @@ static inline void coresight_write_reg_pair(void __iomem *addr, u64 val, void coresight_disable_path(struct list_head *path); int coresight_enable_path(struct list_head *path, u32 mode, void *sink_data); struct coresight_device *coresight_get_sink(struct list_head *path); -struct coresight_device *coresight_get_enabled_sink(bool reset); +struct coresight_device * +coresight_get_enabled_sink(struct coresight_device *source); struct coresight_device *coresight_get_sink_by_id(u32 id); struct coresight_device * coresight_find_default_sink(struct coresight_device *csdev); diff --git a/drivers/hwtracing/coresight/coresight.c b/drivers/hwtracing/coresight/coresight.c index e9c90f2de34ac..bb4f9e0a5438d 100644 --- a/drivers/hwtracing/coresight/coresight.c +++ b/drivers/hwtracing/coresight/coresight.c @@ -540,50 +540,46 @@ struct coresight_device *coresight_get_sink(struct list_head *path) return csdev; } -static int coresight_enabled_sink(struct device *dev, const void *data) +static struct coresight_device * +coresight_find_enabled_sink(struct coresight_device *csdev) { - const bool *reset = data; - struct coresight_device *csdev = to_coresight_device(dev); + int i; + struct coresight_device *sink; if ((csdev->type == CORESIGHT_DEV_TYPE_SINK || csdev->type == CORESIGHT_DEV_TYPE_LINKSINK) && - csdev->activated) { - /* - * Now that we have a handle on the sink for this session, - * disable the sysFS "enable_sink" flag so that possible - * concurrent perf session that wish to use another sink don't - * trip on it. Doing so has no ramification for the current - * session. - */ - if (*reset) - csdev->activated = false; + csdev->activated) + return csdev; - return 1; + /* + * Recursively explore each port found on this element. + */ + for (i = 0; i < csdev->pdata->nr_outport; i++) { + struct coresight_device *child_dev; + + child_dev = csdev->pdata->conns[i].child_dev; + if (child_dev) + sink = coresight_find_enabled_sink(child_dev); + if (sink) + return sink; } - return 0; + return NULL; } /** - * coresight_get_enabled_sink - returns the first enabled sink found on the bus - * @deactivate: Whether the 'enable_sink' flag should be reset - * - * When operated from perf the deactivate parameter should be set to 'true'. - * That way the "enabled_sink" flag of the sink that was selected can be reset, - * allowing for other concurrent perf sessions to choose a different sink. + * coresight_get_enabled_sink - returns the first enabled sink using + * connection based search starting from the source reference * - * When operated from sysFS users have full control and as such the deactivate - * parameter should be set to 'false', hence mandating users to explicitly - * clear the flag. + * @source: Coresight source device reference */ -struct coresight_device *coresight_get_enabled_sink(bool deactivate) +struct coresight_device * +coresight_get_enabled_sink(struct coresight_device *source) { - struct device *dev = NULL; - - dev = bus_find_device(&coresight_bustype, NULL, &deactivate, - coresight_enabled_sink); + if (!source) + return NULL; - return dev ? to_coresight_device(dev) : NULL; + return coresight_find_enabled_sink(source); } static int coresight_sink_by_id(struct device *dev, const void *data) @@ -988,11 +984,7 @@ int coresight_enable(struct coresight_device *csdev) goto out; } - /* - * Search for a valid sink for this session but don't reset the - * "enable_sink" flag in sysFS. Users get to do that explicitly. - */ - sink = coresight_get_enabled_sink(false); + sink = coresight_get_enabled_sink(csdev); if (!sink) { ret = -EINVAL; goto out; -- 2.25.1

4 years, 8 months

[RFC PATCH v2 0/8] CoreSight complex config support; ETM strobing.

by Mike Leach

This patchset introduces initial concepts in CoreSight complex system configuration support. Configurations consist of 2 elements:- 1) Features - programming combinations for devices, applied to a class of device on the system (all ETMv4), or individual devices. 2) Configurations - a set of programmed features used when the named configuration is selected. Features and configurations are declared as a data table, a set of register, resource and parameter requirements. Features and configurations are loaded into the system by the virtual cs_syscfg device. This then matches features to any registered devices and loads the feature into them. Individual device classes that support feature and configuration register with cs_syscfg. Once loaded a configuration can be enabled for a specific trace run. Configurations are registered with the perf cs_etm event as entries in cs_etm/cs_config. These can be selected on the perf command line as follows:- perf record -e cs_etm/@<config_name>/ ... This patch set has one pre-loaded configuration and feature. A named "strobing" feature is provided for ETMv4. A named "autofdo" configuration is provided. This configuration enables strobing on any ETM in used. Thus the command: perf record -e cs_etm/@autofdo/ ... will trace the supplied application while enabling the "autofdo" configuation on each ETM as it is enabled by perf. This in turn will enable strobing for the ETM - with default parameters. (at present these default parameters can be altered using sysfs for each individual ETM - but this is under review). The sink used in the trace run will be automatically selected. A configuation can supply up to 15 of preset parameter values, which will subsitute in parameter values for any feature used in the configuration. Selection of preset values as follows perf record -e cs_etm/@autofdo,preset=1/ ... (valid presets 1-N, where N is the number supplied in the configuration, not exceeding 15. preset=0 is the same as not selecting a preset.) Changes since v1: 1) Moved preloaded configurations and features out of individual drivers. 2) Added cs_syscfg driver to manage configurations and features. Individual drivers register with cs_syscfg indicating support for config, and provide matching information that the system uses to load features into the drivers. This allows individual drivers to be updated on an as needed basis - and removes the need to consider devices that cannot benefit from configuration - static replicators, funnels, tpiu. 3) Added perf selection of configuarations. 4) Rebased onto the coresight module loading set. Applies to coresight/next (5.9-rc1 base) with the coresight module load set [1] applied. To follow in future revisions / sets:- a) load of additional config and features by loadable module. b) load of additional config and features by configfs c) enhanced resource management for ETMv4 and checking features have sufficient resources to be enabled. d) ECT and CTI support for configuration and features. e) documentation file. [1] https://lists.linaro.org/pipermail/coresight/2020-August/004704.html Mike Leach (8): coresight: syscfg: Initial coresight system configuration coresight: syscfg: Add loading of features and configurations coresight: syscfg: Add registration and feature loading for cs devices coresight: config: Add configuration and feature generic functions perf: cs_etm: update cs_etm processing to allow configuration selection coresight: etm-perf: update to handle configuration selection coresight: etm4x: Add complex configuration handlers to etmv4 coresight: config: Add preloaded configurations drivers/hwtracing/coresight/Makefile | 6 +- .../coresight/coresight-cfg-preload.c | 165 +++++ .../hwtracing/coresight/coresight-config.c | 565 ++++++++++++++++++ .../hwtracing/coresight/coresight-config.h | 289 +++++++++ drivers/hwtracing/coresight/coresight-core.c | 36 +- .../hwtracing/coresight/coresight-etm-perf.c | 91 ++- .../hwtracing/coresight/coresight-etm-perf.h | 8 +- .../hwtracing/coresight/coresight-etm4x-cfg.c | 226 +++++++ .../hwtracing/coresight/coresight-etm4x-cfg.h | 29 + .../coresight/coresight-etm4x-core.c | 30 +- .../coresight/coresight-etm4x-sysfs.c | 3 + .../hwtracing/coresight/coresight-syscfg.c | 527 ++++++++++++++++ .../hwtracing/coresight/coresight-syscfg.h | 90 +++ include/linux/coresight-pmu.h | 3 + include/linux/coresight.h | 8 + tools/include/linux/coresight-pmu.h | 3 + tools/perf/arch/arm/util/cs-etm.c | 17 +- 17 files changed, 2066 insertions(+), 30 deletions(-) create mode 100644 drivers/hwtracing/coresight/coresight-cfg-preload.c create mode 100644 drivers/hwtracing/coresight/coresight-config.c create mode 100644 drivers/hwtracing/coresight/coresight-config.h create mode 100644 drivers/hwtracing/coresight/coresight-etm4x-cfg.c create mode 100644 drivers/hwtracing/coresight/coresight-etm4x-cfg.h create mode 100644 drivers/hwtracing/coresight/coresight-syscfg.c create mode 100644 drivers/hwtracing/coresight/coresight-syscfg.h -- 2.17.1

4 years, 8 months

[PATCH v2 32/39] docs: ABI: change read/write attributes

by Mauro Carvalho Chehab

Unfortunately, (R) and (W) are valid markups for enumerated lists, as described at: https://docutils.sourceforge.io/docs/ref/rst/restructuredtext.html#enumerat… So, we ned to replace them by: (R) -> (Read) (W) -> (Write) As otherwise, (R) will be displayed as R., with is not what it is desired. There's no need to touch (RO) and (RW). Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei(a)kernel.org> --- Documentation/ABI/testing/debugfs-moxtet | 2 +- .../ABI/testing/debugfs-turris-mox-rwtm | 15 ++-- .../testing/sysfs-bus-coresight-devices-cti | 60 +++++++-------- .../testing/sysfs-bus-coresight-devices-etb10 | 16 ++-- .../testing/sysfs-bus-coresight-devices-etm3x | 10 +-- .../testing/sysfs-bus-coresight-devices-etm4x | 76 +++++++++---------- .../testing/sysfs-bus-coresight-devices-stm | 2 +- .../testing/sysfs-bus-coresight-devices-tmc | 20 ++--- .../ABI/testing/sysfs-bus-moxtet-devices | 6 +- .../testing/sysfs-firmware-turris-mox-rwtm | 10 +-- 10 files changed, 109 insertions(+), 108 deletions(-) diff --git a/Documentation/ABI/testing/debugfs-moxtet b/Documentation/ABI/testing/debugfs-moxtet index 15dfaecb2892..6eee10c3d5a1 100644 --- a/Documentation/ABI/testing/debugfs-moxtet +++ b/Documentation/ABI/testing/debugfs-moxtet @@ -2,7 +2,7 @@ What: /sys/kernel/debug/moxtet/input Date: March 2019 KernelVersion: 5.3 Contact: Marek Behún <marek.behun(a)nic.cz> -Description: (R) Read input from the shift registers, in hexadecimal. +Description: (Read) Read input from the shift registers, in hexadecimal. Returns N+1 bytes, where N is the number of Moxtet connected modules. The first byte is from the CPU board itself. diff --git a/Documentation/ABI/testing/debugfs-turris-mox-rwtm b/Documentation/ABI/testing/debugfs-turris-mox-rwtm index ad08f535af3b..326df1b74707 100644 --- a/Documentation/ABI/testing/debugfs-turris-mox-rwtm +++ b/Documentation/ABI/testing/debugfs-turris-mox-rwtm @@ -4,10 +4,11 @@ KernelVersion: 5.8 Contact: Marek Behún <marek.behun(a)nic.cz> Description: - === =========================================================== - (W) Message to sign with the ECDSA private key stored in - device's OTP. The message must be exactly 64 bytes (since - this is intended for SHA-512 hashes). - (R) The resulting signature, 136 bytes. This contains the R and - S values of the ECDSA signature, both in big-endian format. - === =========================================================== + ======= =========================================================== + (Write) Message to sign with the ECDSA private key stored in + device's OTP. The message must be exactly 64 bytes + (since this is intended for SHA-512 hashes). + (Read) The resulting signature, 136 bytes. This contains the + R and S values of the ECDSA signature, both in + big-endian format. + ======= =========================================================== diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-cti b/Documentation/ABI/testing/sysfs-bus-coresight-devices-cti index 9d11502b4390..bf2869c413e7 100644 --- a/Documentation/ABI/testing/sysfs-bus-coresight-devices-cti +++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-cti @@ -8,50 +8,50 @@ What: /sys/bus/coresight/devices/<cti-name>/powered Date: March 2020 KernelVersion 5.7 Contact: Mike Leach or Mathieu Poirier -Description: (R) Indicate if the CTI hardware is powered. +Description: (Read) Indicate if the CTI hardware is powered. What: /sys/bus/coresight/devices/<cti-name>/ctmid Date: March 2020 KernelVersion 5.7 Contact: Mike Leach or Mathieu Poirier -Description: (R) Display the associated CTM ID +Description: (Read) Display the associated CTM ID What: /sys/bus/coresight/devices/<cti-name>/nr_trigger_cons Date: March 2020 KernelVersion 5.7 Contact: Mike Leach or Mathieu Poirier -Description: (R) Number of devices connected to triggers on this CTI +Description: (Read) Number of devices connected to triggers on this CTI What: /sys/bus/coresight/devices/<cti-name>/triggers<N>/name Date: March 2020 KernelVersion 5.7 Contact: Mike Leach or Mathieu Poirier -Description: (R) Name of connected device <N> +Description: (Read) Name of connected device <N> What: /sys/bus/coresight/devices/<cti-name>/triggers<N>/in_signals Date: March 2020 KernelVersion 5.7 Contact: Mike Leach or Mathieu Poirier -Description: (R) Input trigger signals from connected device <N> +Description: (Read) Input trigger signals from connected device <N> What: /sys/bus/coresight/devices/<cti-name>/triggers<N>/in_types Date: March 2020 KernelVersion 5.7 Contact: Mike Leach or Mathieu Poirier -Description: (R) Functional types for the input trigger signals +Description: (Read) Functional types for the input trigger signals from connected device <N> What: /sys/bus/coresight/devices/<cti-name>/triggers<N>/out_signals Date: March 2020 KernelVersion 5.7 Contact: Mike Leach or Mathieu Poirier -Description: (R) Output trigger signals to connected device <N> +Description: (Read) Output trigger signals to connected device <N> What: /sys/bus/coresight/devices/<cti-name>/triggers<N>/out_types Date: March 2020 KernelVersion 5.7 Contact: Mike Leach or Mathieu Poirier -Description: (R) Functional types for the output trigger signals +Description: (Read) Functional types for the output trigger signals to connected device <N> What: /sys/bus/coresight/devices/<cti-name>/regs/inout_sel @@ -88,7 +88,7 @@ What: /sys/bus/coresight/devices/<cti-name>/regs/intack Date: March 2020 KernelVersion 5.7 Contact: Mike Leach or Mathieu Poirier -Description: (W) Write the INTACK register. +Description: (Write) Write the INTACK register. What: /sys/bus/coresight/devices/<cti-name>/regs/appset Date: March 2020 @@ -101,99 +101,99 @@ What: /sys/bus/coresight/devices/<cti-name>/regs/appclear Date: March 2020 KernelVersion 5.7 Contact: Mike Leach or Mathieu Poirier -Description: (W) Write APPCLEAR register to deactivate channel. +Description: (Write) Write APPCLEAR register to deactivate channel. What: /sys/bus/coresight/devices/<cti-name>/regs/apppulse Date: March 2020 KernelVersion 5.7 Contact: Mike Leach or Mathieu Poirier -Description: (W) Write APPPULSE to pulse a channel active for one clock +Description: (Write) Write APPPULSE to pulse a channel active for one clock cycle. What: /sys/bus/coresight/devices/<cti-name>/regs/chinstatus Date: March 2020 KernelVersion 5.7 Contact: Mike Leach or Mathieu Poirier -Description: (R) Read current status of channel inputs. +Description: (Read) Read current status of channel inputs. What: /sys/bus/coresight/devices/<cti-name>/regs/choutstatus Date: March 2020 KernelVersion 5.7 Contact: Mike Leach or Mathieu Poirier -Description: (R) read current status of channel outputs. +Description: (Read) read current status of channel outputs. What: /sys/bus/coresight/devices/<cti-name>/regs/triginstatus Date: March 2020 KernelVersion 5.7 Contact: Mike Leach or Mathieu Poirier -Description: (R) read current status of input trigger signals +Description: (Read) read current status of input trigger signals What: /sys/bus/coresight/devices/<cti-name>/regs/trigoutstatus Date: March 2020 KernelVersion 5.7 Contact: Mike Leach or Mathieu Poirier -Description: (R) read current status of output trigger signals. +Description: (Read) read current status of output trigger signals. What: /sys/bus/coresight/devices/<cti-name>/channels/trigin_attach Date: March 2020 KernelVersion 5.7 Contact: Mike Leach or Mathieu Poirier -Description: (W) Attach a CTI input trigger to a CTM channel. +Description: (Write) Attach a CTI input trigger to a CTM channel. What: /sys/bus/coresight/devices/<cti-name>/channels/trigin_detach Date: March 2020 KernelVersion 5.7 Contact: Mike Leach or Mathieu Poirier -Description: (W) Detach a CTI input trigger from a CTM channel. +Description: (Write) Detach a CTI input trigger from a CTM channel. What: /sys/bus/coresight/devices/<cti-name>/channels/trigout_attach Date: March 2020 KernelVersion 5.7 Contact: Mike Leach or Mathieu Poirier -Description: (W) Attach a CTI output trigger to a CTM channel. +Description: (Write) Attach a CTI output trigger to a CTM channel. What: /sys/bus/coresight/devices/<cti-name>/channels/trigout_detach Date: March 2020 KernelVersion 5.7 Contact: Mike Leach or Mathieu Poirier -Description: (W) Detach a CTI output trigger from a CTM channel. +Description: (Write) Detach a CTI output trigger from a CTM channel. What: /sys/bus/coresight/devices/<cti-name>/channels/chan_gate_enable Date: March 2020 KernelVersion 5.7 Contact: Mike Leach or Mathieu Poirier -Description: (RW) Enable CTIGATE for single channel (W) or list enabled +Description: (RW) Enable CTIGATE for single channel (Write) or list enabled channels through the gate (R). What: /sys/bus/coresight/devices/<cti-name>/channels/chan_gate_disable Date: March 2020 KernelVersion 5.7 Contact: Mike Leach or Mathieu Poirier -Description: (W) Disable CTIGATE for single channel. +Description: (Write) Disable CTIGATE for single channel. What: /sys/bus/coresight/devices/<cti-name>/channels/chan_set Date: March 2020 KernelVersion 5.7 Contact: Mike Leach or Mathieu Poirier -Description: (W) Activate a single channel. +Description: (Write) Activate a single channel. What: /sys/bus/coresight/devices/<cti-name>/channels/chan_clear Date: March 2020 KernelVersion 5.7 Contact: Mike Leach or Mathieu Poirier -Description: (W) Deactivate a single channel. +Description: (Write) Deactivate a single channel. What: /sys/bus/coresight/devices/<cti-name>/channels/chan_pulse Date: March 2020 KernelVersion 5.7 Contact: Mike Leach or Mathieu Poirier -Description: (W) Pulse a single channel - activate for a single clock cycle. +Description: (Write) Pulse a single channel - activate for a single clock cycle. What: /sys/bus/coresight/devices/<cti-name>/channels/trigout_filtered Date: March 2020 KernelVersion 5.7 Contact: Mike Leach or Mathieu Poirier -Description: (R) List of output triggers filtered across all connections. +Description: (Read) List of output triggers filtered across all connections. What: /sys/bus/coresight/devices/<cti-name>/channels/trig_filter_enable Date: March 2020 @@ -205,13 +205,13 @@ What: /sys/bus/coresight/devices/<cti-name>/channels/chan_inuse Date: March 2020 KernelVersion 5.7 Contact: Mike Leach or Mathieu Poirier -Description: (R) show channels with at least one attached trigger signal. +Description: (Read) show channels with at least one attached trigger signal. What: /sys/bus/coresight/devices/<cti-name>/channels/chan_free Date: March 2020 KernelVersion 5.7 Contact: Mike Leach or Mathieu Poirier -Description: (R) show channels with no attached trigger signals. +Description: (Read) show channels with no attached trigger signals. What: /sys/bus/coresight/devices/<cti-name>/channels/chan_xtrigs_sel Date: March 2020 @@ -224,18 +224,18 @@ What: /sys/bus/coresight/devices/<cti-name>/channels/chan_xtrigs_in Date: March 2020 KernelVersion 5.7 Contact: Mike Leach or Mathieu Poirier -Description: (R) Read to see input triggers connected to selected view +Description: (Read) Read to see input triggers connected to selected view channel. What: /sys/bus/coresight/devices/<cti-name>/channels/chan_xtrigs_out Date: March 2020 KernelVersion 5.7 Contact: Mike Leach or Mathieu Poirier -Description: (R) Read to see output triggers connected to selected view +Description: (Read) Read to see output triggers connected to selected view channel. What: /sys/bus/coresight/devices/<cti-name>/channels/chan_xtrigs_reset Date: March 2020 KernelVersion 5.7 Contact: Mike Leach or Mathieu Poirier -Description: (W) Clear all channel / trigger programming. +Description: (Write) Clear all channel / trigger programming. diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-etb10 b/Documentation/ABI/testing/sysfs-bus-coresight-devices-etb10 index 3e92cbd3fd83..9a383f6a74eb 100644 --- a/Documentation/ABI/testing/sysfs-bus-coresight-devices-etb10 +++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-etb10 @@ -23,21 +23,21 @@ What: /sys/bus/coresight/devices/<memory_map>.etb/mgmt/rdp Date: March 2016 KernelVersion: 4.7 Contact: Mathieu Poirier <mathieu.poirier(a)linaro.org> -Description: (R) Defines the depth, in words, of the trace RAM in powers of +Description: (Read) Defines the depth, in words, of the trace RAM in powers of 2. The value is read directly from HW register RDP, 0x004. What: /sys/bus/coresight/devices/<memory_map>.etb/mgmt/sts Date: March 2016 KernelVersion: 4.7 Contact: Mathieu Poirier <mathieu.poirier(a)linaro.org> -Description: (R) Shows the value held by the ETB status register. The value +Description: (Read) Shows the value held by the ETB status register. The value is read directly from HW register STS, 0x00C. What: /sys/bus/coresight/devices/<memory_map>.etb/mgmt/rrp Date: March 2016 KernelVersion: 4.7 Contact: Mathieu Poirier <mathieu.poirier(a)linaro.org> -Description: (R) Shows the value held by the ETB RAM Read Pointer register +Description: (Read) Shows the value held by the ETB RAM Read Pointer register that is used to read entries from the Trace RAM over the APB interface. The value is read directly from HW register RRP, 0x014. @@ -46,7 +46,7 @@ What: /sys/bus/coresight/devices/<memory_map>.etb/mgmt/rwp Date: March 2016 KernelVersion: 4.7 Contact: Mathieu Poirier <mathieu.poirier(a)linaro.org> -Description: (R) Shows the value held by the ETB RAM Write Pointer register +Description: (Read) Shows the value held by the ETB RAM Write Pointer register that is used to sets the write pointer to write entries from the CoreSight bus into the Trace RAM. The value is read directly from HW register RWP, 0x018. @@ -55,21 +55,21 @@ What: /sys/bus/coresight/devices/<memory_map>.etb/mgmt/trg Date: March 2016 KernelVersion: 4.7 Contact: Mathieu Poirier <mathieu.poirier(a)linaro.org> -Description: (R) Similar to "trigger_cntr" above except that this value is +Description: (Read) Similar to "trigger_cntr" above except that this value is read directly from HW register TRG, 0x01C. What: /sys/bus/coresight/devices/<memory_map>.etb/mgmt/ctl Date: March 2016 KernelVersion: 4.7 Contact: Mathieu Poirier <mathieu.poirier(a)linaro.org> -Description: (R) Shows the value held by the ETB Control register. The value +Description: (Read) Shows the value held by the ETB Control register. The value is read directly from HW register CTL, 0x020. What: /sys/bus/coresight/devices/<memory_map>.etb/mgmt/ffsr Date: March 2016 KernelVersion: 4.7 Contact: Mathieu Poirier <mathieu.poirier(a)linaro.org> -Description: (R) Shows the value held by the ETB Formatter and Flush Status +Description: (Read) Shows the value held by the ETB Formatter and Flush Status register. The value is read directly from HW register FFSR, 0x300. @@ -77,6 +77,6 @@ What: /sys/bus/coresight/devices/<memory_map>.etb/mgmt/ffcr Date: March 2016 KernelVersion: 4.7 Contact: Mathieu Poirier <mathieu.poirier(a)linaro.org> -Description: (R) Shows the value held by the ETB Formatter and Flush Control +Description: (Read) Shows the value held by the ETB Formatter and Flush Control register. The value is read directly from HW register FFCR, 0x304. diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm3x b/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm3x index 924265a1295d..651602a61eac 100644 --- a/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm3x +++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm3x @@ -146,28 +146,28 @@ What: /sys/bus/coresight/devices/<memory_map>.[etm|ptm]/nr_addr_cmp Date: November 2014 KernelVersion: 3.19 Contact: Mathieu Poirier <mathieu.poirier(a)linaro.org> -Description: (R) Provides the number of address comparators pairs accessible +Description: (Read) Provides the number of address comparators pairs accessible on a trace unit, as specified by bit 3:0 of register ETMCCR. What: /sys/bus/coresight/devices/<memory_map>.[etm|ptm]/nr_cntr Date: November 2014 KernelVersion: 3.19 Contact: Mathieu Poirier <mathieu.poirier(a)linaro.org> -Description: (R) Provides the number of counters accessible on a trace unit, +Description: (Read) Provides the number of counters accessible on a trace unit, as specified by bit 15:13 of register ETMCCR. What: /sys/bus/coresight/devices/<memory_map>.[etm|ptm]/nr_ctxid_cmp Date: November 2014 KernelVersion: 3.19 Contact: Mathieu Poirier <mathieu.poirier(a)linaro.org> -Description: (R) Provides the number of context ID comparator available on a +Description: (Read) Provides the number of context ID comparator available on a trace unit, as specified by bit 25:24 of register ETMCCR. What: /sys/bus/coresight/devices/<memory_map>.[etm|ptm]/reset Date: November 2014 KernelVersion: 3.19 Contact: Mathieu Poirier <mathieu.poirier(a)linaro.org> -Description: (W) Cancels all configuration on a trace unit and set it back +Description: (Write) Cancels all configuration on a trace unit and set it back to its boot configuration. What: /sys/bus/coresight/devices/<memory_map>.[etm|ptm]/seq_12_event @@ -216,7 +216,7 @@ What: /sys/bus/coresight/devices/<memory_map>.[etm|ptm]/curr_seq_state Date: November 2014 KernelVersion: 3.19 Contact: Mathieu Poirier <mathieu.poirier(a)linaro.org> -Description: (R) Holds the current state of the sequencer. +Description: (Read) Holds the current state of the sequencer. What: /sys/bus/coresight/devices/<memory_map>.[etm|ptm]/sync_freq Date: November 2014 diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x b/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x index 614874e2cf53..881f0cd99ce4 100644 --- a/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x +++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x @@ -12,75 +12,75 @@ What: /sys/bus/coresight/devices/etm<N>/cpu Date: April 2015 KernelVersion: 4.01 Contact: Mathieu Poirier <mathieu.poirier(a)linaro.org> -Description: (R) The CPU this tracing entity is associated with. +Description: (Read) The CPU this tracing entity is associated with. What: /sys/bus/coresight/devices/etm<N>/nr_pe_cmp Date: April 2015 KernelVersion: 4.01 Contact: Mathieu Poirier <mathieu.poirier(a)linaro.org> -Description: (R) Indicates the number of PE comparator inputs that are +Description: (Read) Indicates the number of PE comparator inputs that are available for tracing. What: /sys/bus/coresight/devices/etm<N>/nr_addr_cmp Date: April 2015 KernelVersion: 4.01 Contact: Mathieu Poirier <mathieu.poirier(a)linaro.org> -Description: (R) Indicates the number of address comparator pairs that are +Description: (Read) Indicates the number of address comparator pairs that are available for tracing. What: /sys/bus/coresight/devices/etm<N>/nr_cntr Date: April 2015 KernelVersion: 4.01 Contact: Mathieu Poirier <mathieu.poirier(a)linaro.org> -Description: (R) Indicates the number of counters that are available for +Description: (Read) Indicates the number of counters that are available for tracing. What: /sys/bus/coresight/devices/etm<N>/nr_ext_inp Date: April 2015 KernelVersion: 4.01 Contact: Mathieu Poirier <mathieu.poirier(a)linaro.org> -Description: (R) Indicates how many external inputs are implemented. +Description: (Read) Indicates how many external inputs are implemented. What: /sys/bus/coresight/devices/etm<N>/numcidc Date: April 2015 KernelVersion: 4.01 Contact: Mathieu Poirier <mathieu.poirier(a)linaro.org> -Description: (R) Indicates the number of Context ID comparators that are +Description: (Read) Indicates the number of Context ID comparators that are available for tracing. What: /sys/bus/coresight/devices/etm<N>/numvmidc Date: April 2015 KernelVersion: 4.01 Contact: Mathieu Poirier <mathieu.poirier(a)linaro.org> -Description: (R) Indicates the number of VMID comparators that are available +Description: (Read) Indicates the number of VMID comparators that are available for tracing. What: /sys/bus/coresight/devices/etm<N>/nrseqstate Date: April 2015 KernelVersion: 4.01 Contact: Mathieu Poirier <mathieu.poirier(a)linaro.org> -Description: (R) Indicates the number of sequencer states that are +Description: (Read) Indicates the number of sequencer states that are implemented. What: /sys/bus/coresight/devices/etm<N>/nr_resource Date: April 2015 KernelVersion: 4.01 Contact: Mathieu Poirier <mathieu.poirier(a)linaro.org> -Description: (R) Indicates the number of resource selection pairs that are +Description: (Read) Indicates the number of resource selection pairs that are available for tracing. What: /sys/bus/coresight/devices/etm<N>/nr_ss_cmp Date: April 2015 KernelVersion: 4.01 Contact: Mathieu Poirier <mathieu.poirier(a)linaro.org> -Description: (R) Indicates the number of single-shot comparator controls that +Description: (Read) Indicates the number of single-shot comparator controls that are available for tracing. What: /sys/bus/coresight/devices/etm<N>/reset Date: April 2015 KernelVersion: 4.01 Contact: Mathieu Poirier <mathieu.poirier(a)linaro.org> -Description: (W) Cancels all configuration on a trace unit and set it back +Description: (Write) Cancels all configuration on a trace unit and set it back to its boot configuration. What: /sys/bus/coresight/devices/etm<N>/mode @@ -300,7 +300,7 @@ What: /sys/bus/coresight/devices/etm<N>/addr_cmp_view Date: December 2019 KernelVersion: 5.5 Contact: Mathieu Poirier <mathieu.poirier(a)linaro.org> -Description: (R) Print the current settings for the selected address +Description: (Read) Print the current settings for the selected address comparator. What: /sys/bus/coresight/devices/etm<N>/sshot_idx @@ -319,7 +319,7 @@ What: /sys/bus/coresight/devices/etm<N>/sshot_status Date: December 2019 KernelVersion: 5.5 Contact: Mathieu Poirier <mathieu.poirier(a)linaro.org> -Description: (R) Print the current value of the selected single shot +Description: (Read) Print the current value of the selected single shot status register. What: /sys/bus/coresight/devices/etm<N>/sshot_pe_ctrl @@ -333,111 +333,111 @@ What: /sys/bus/coresight/devices/etm<N>/mgmt/trcoslsr Date: April 2015 KernelVersion: 4.01 Contact: Mathieu Poirier <mathieu.poirier(a)linaro.org> -Description: (R) Print the content of the OS Lock Status Register (0x304). +Description: (Read) Print the content of the OS Lock Status Register (0x304). The value it taken directly from the HW. What: /sys/bus/coresight/devices/etm<N>/mgmt/trcpdcr Date: April 2015 KernelVersion: 4.01 Contact: Mathieu Poirier <mathieu.poirier(a)linaro.org> -Description: (R) Print the content of the Power Down Control Register +Description: (Read) Print the content of the Power Down Control Register (0x310). The value is taken directly from the HW. What: /sys/bus/coresight/devices/etm<N>/mgmt/trcpdsr Date: April 2015 KernelVersion: 4.01 Contact: Mathieu Poirier <mathieu.poirier(a)linaro.org> -Description: (R) Print the content of the Power Down Status Register +Description: (Read) Print the content of the Power Down Status Register (0x314). The value is taken directly from the HW. What: /sys/bus/coresight/devices/etm<N>/mgmt/trclsr Date: April 2015 KernelVersion: 4.01 Contact: Mathieu Poirier <mathieu.poirier(a)linaro.org> -Description: (R) Print the content of the SW Lock Status Register +Description: (Read) Print the content of the SW Lock Status Register (0xFB4). The value is taken directly from the HW. What: /sys/bus/coresight/devices/etm<N>/mgmt/trcauthstatus Date: April 2015 KernelVersion: 4.01 Contact: Mathieu Poirier <mathieu.poirier(a)linaro.org> -Description: (R) Print the content of the Authentication Status Register +Description: (Read) Print the content of the Authentication Status Register (0xFB8). The value is taken directly from the HW. What: /sys/bus/coresight/devices/etm<N>/mgmt/trcdevid Date: April 2015 KernelVersion: 4.01 Contact: Mathieu Poirier <mathieu.poirier(a)linaro.org> -Description: (R) Print the content of the Device ID Register +Description: (Read) Print the content of the Device ID Register (0xFC8). The value is taken directly from the HW. What: /sys/bus/coresight/devices/etm<N>/mgmt/trcdevtype Date: April 2015 KernelVersion: 4.01 Contact: Mathieu Poirier <mathieu.poirier(a)linaro.org> -Description: (R) Print the content of the Device Type Register +Description: (Read) Print the content of the Device Type Register (0xFCC). The value is taken directly from the HW. What: /sys/bus/coresight/devices/etm<N>/mgmt/trcpidr0 Date: April 2015 KernelVersion: 4.01 Contact: Mathieu Poirier <mathieu.poirier(a)linaro.org> -Description: (R) Print the content of the Peripheral ID0 Register +Description: (Read) Print the content of the Peripheral ID0 Register (0xFE0). The value is taken directly from the HW. What: /sys/bus/coresight/devices/etm<N>/mgmt/trcpidr1 Date: April 2015 KernelVersion: 4.01 Contact: Mathieu Poirier <mathieu.poirier(a)linaro.org> -Description: (R) Print the content of the Peripheral ID1 Register +Description: (Read) Print the content of the Peripheral ID1 Register (0xFE4). The value is taken directly from the HW. What: /sys/bus/coresight/devices/etm<N>/mgmt/trcpidr2 Date: April 2015 KernelVersion: 4.01 Contact: Mathieu Poirier <mathieu.poirier(a)linaro.org> -Description: (R) Print the content of the Peripheral ID2 Register +Description: (Read) Print the content of the Peripheral ID2 Register (0xFE8). The value is taken directly from the HW. What: /sys/bus/coresight/devices/etm<N>/mgmt/trcpidr3 Date: April 2015 KernelVersion: 4.01 Contact: Mathieu Poirier <mathieu.poirier(a)linaro.org> -Description: (R) Print the content of the Peripheral ID3 Register +Description: (Read) Print the content of the Peripheral ID3 Register (0xFEC). The value is taken directly from the HW. What: /sys/bus/coresight/devices/etm<N>/mgmt/trcconfig Date: February 2016 KernelVersion: 4.07 Contact: Mathieu Poirier <mathieu.poirier(a)linaro.org> -Description: (R) Print the content of the trace configuration register +Description: (Read) Print the content of the trace configuration register (0x010) as currently set by SW. What: /sys/bus/coresight/devices/etm<N>/mgmt/trctraceid Date: February 2016 KernelVersion: 4.07 Contact: Mathieu Poirier <mathieu.poirier(a)linaro.org> -Description: (R) Print the content of the trace ID register (0x040). +Description: (Read) Print the content of the trace ID register (0x040). What: /sys/bus/coresight/devices/etm<N>/trcidr/trcidr0 Date: April 2015 KernelVersion: 4.01 Contact: Mathieu Poirier <mathieu.poirier(a)linaro.org> -Description: (R) Returns the tracing capabilities of the trace unit (0x1E0). +Description: (Read) Returns the tracing capabilities of the trace unit (0x1E0). The value is taken directly from the HW. What: /sys/bus/coresight/devices/etm<N>/trcidr/trcidr1 Date: April 2015 KernelVersion: 4.01 Contact: Mathieu Poirier <mathieu.poirier(a)linaro.org> -Description: (R) Returns the tracing capabilities of the trace unit (0x1E4). +Description: (Read) Returns the tracing capabilities of the trace unit (0x1E4). The value is taken directly from the HW. What: /sys/bus/coresight/devices/etm<N>/trcidr/trcidr2 Date: April 2015 KernelVersion: 4.01 Contact: Mathieu Poirier <mathieu.poirier(a)linaro.org> -Description: (R) Returns the maximum size of the data value, data address, +Description: (Read) Returns the maximum size of the data value, data address, VMID, context ID and instuction address in the trace unit (0x1E8). The value is taken directly from the HW. @@ -445,7 +445,7 @@ What: /sys/bus/coresight/devices/etm<N>/trcidr/trcidr3 Date: April 2015 KernelVersion: 4.01 Contact: Mathieu Poirier <mathieu.poirier(a)linaro.org> -Description: (R) Returns the value associated with various resources +Description: (Read) Returns the value associated with various resources available to the trace unit. See the Trace Macrocell architecture specification for more details (0x1E8). The value is taken directly from the HW. @@ -454,42 +454,42 @@ What: /sys/bus/coresight/devices/etm<N>/trcidr/trcidr4 Date: April 2015 KernelVersion: 4.01 Contact: Mathieu Poirier <mathieu.poirier(a)linaro.org> -Description: (R) Returns how many resources the trace unit supports (0x1F0). +Description: (Read) Returns how many resources the trace unit supports (0x1F0). The value is taken directly from the HW. What: /sys/bus/coresight/devices/etm<N>/trcidr/trcidr5 Date: April 2015 KernelVersion: 4.01 Contact: Mathieu Poirier <mathieu.poirier(a)linaro.org> -Description: (R) Returns how many resources the trace unit supports (0x1F4). +Description: (Read) Returns how many resources the trace unit supports (0x1F4). The value is taken directly from the HW. What: /sys/bus/coresight/devices/etm<N>/trcidr/trcidr8 Date: April 2015 KernelVersion: 4.01 Contact: Mathieu Poirier <mathieu.poirier(a)linaro.org> -Description: (R) Returns the maximum speculation depth of the instruction +Description: (Read) Returns the maximum speculation depth of the instruction trace stream. (0x180). The value is taken directly from the HW. What: /sys/bus/coresight/devices/etm<N>/trcidr/trcidr9 Date: April 2015 KernelVersion: 4.01 Contact: Mathieu Poirier <mathieu.poirier(a)linaro.org> -Description: (R) Returns the number of P0 right-hand keys that the trace unit +Description: (Read) Returns the number of P0 right-hand keys that the trace unit can use (0x184). The value is taken directly from the HW. What: /sys/bus/coresight/devices/etm<N>/trcidr/trcidr10 Date: April 2015 KernelVersion: 4.01 Contact: Mathieu Poirier <mathieu.poirier(a)linaro.org> -Description: (R) Returns the number of P1 right-hand keys that the trace unit +Description: (Read) Returns the number of P1 right-hand keys that the trace unit can use (0x188). The value is taken directly from the HW. What: /sys/bus/coresight/devices/etm<N>/trcidr/trcidr11 Date: April 2015 KernelVersion: 4.01 Contact: Mathieu Poirier <mathieu.poirier(a)linaro.org> -Description: (R) Returns the number of special P1 right-hand keys that the +Description: (Read) Returns the number of special P1 right-hand keys that the trace unit can use (0x18C). The value is taken directly from the HW. @@ -497,7 +497,7 @@ What: /sys/bus/coresight/devices/etm<N>/trcidr/trcidr12 Date: April 2015 KernelVersion: 4.01 Contact: Mathieu Poirier <mathieu.poirier(a)linaro.org> -Description: (R) Returns the number of conditional P1 right-hand keys that +Description: (Read) Returns the number of conditional P1 right-hand keys that the trace unit can use (0x190). The value is taken directly from the HW. @@ -505,6 +505,6 @@ What: /sys/bus/coresight/devices/etm<N>/trcidr/trcidr13 Date: April 2015 KernelVersion: 4.01 Contact: Mathieu Poirier <mathieu.poirier(a)linaro.org> -Description: (R) Returns the number of special conditional P1 right-hand keys +Description: (Read) Returns the number of special conditional P1 right-hand keys that the trace unit can use (0x194). The value is taken directly from the HW. diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-stm b/Documentation/ABI/testing/sysfs-bus-coresight-devices-stm index 1dffabe7f48d..53e1f4815d64 100644 --- a/Documentation/ABI/testing/sysfs-bus-coresight-devices-stm +++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-stm @@ -42,7 +42,7 @@ What: /sys/bus/coresight/devices/<memory_map>.stm/status Date: April 2016 KernelVersion: 4.7 Contact: Mathieu Poirier <mathieu.poirier(a)linaro.org> -Description: (R) List various control and status registers. The specific +Description: (Read) List various control and status registers. The specific layout and content is driver specific. What: /sys/bus/coresight/devices/<memory_map>.stm/traceid diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tmc b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tmc index ab49b9ac3bcb..6aa527296c71 100644 --- a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tmc +++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tmc @@ -11,21 +11,21 @@ What: /sys/bus/coresight/devices/<memory_map>.tmc/mgmt/rsz Date: March 2016 KernelVersion: 4.7 Contact: Mathieu Poirier <mathieu.poirier(a)linaro.org> -Description: (R) Defines the size, in 32-bit words, of the local RAM buffer. +Description: (Read) Defines the size, in 32-bit words, of the local RAM buffer. The value is read directly from HW register RSZ, 0x004. What: /sys/bus/coresight/devices/<memory_map>.tmc/mgmt/sts Date: March 2016 KernelVersion: 4.7 Contact: Mathieu Poirier <mathieu.poirier(a)linaro.org> -Description: (R) Shows the value held by the TMC status register. The value +Description: (Read) Shows the value held by the TMC status register. The value is read directly from HW register STS, 0x00C. What: /sys/bus/coresight/devices/<memory_map>.tmc/mgmt/rrp Date: March 2016 KernelVersion: 4.7 Contact: Mathieu Poirier <mathieu.poirier(a)linaro.org> -Description: (R) Shows the value held by the TMC RAM Read Pointer register +Description: (Read) Shows the value held by the TMC RAM Read Pointer register that is used to read entries from the Trace RAM over the APB interface. The value is read directly from HW register RRP, 0x014. @@ -34,7 +34,7 @@ What: /sys/bus/coresight/devices/<memory_map>.tmc/mgmt/rwp Date: March 2016 KernelVersion: 4.7 Contact: Mathieu Poirier <mathieu.poirier(a)linaro.org> -Description: (R) Shows the value held by the TMC RAM Write Pointer register +Description: (Read) Shows the value held by the TMC RAM Write Pointer register that is used to sets the write pointer to write entries from the CoreSight bus into the Trace RAM. The value is read directly from HW register RWP, 0x018. @@ -43,21 +43,21 @@ What: /sys/bus/coresight/devices/<memory_map>.tmc/mgmt/trg Date: March 2016 KernelVersion: 4.7 Contact: Mathieu Poirier <mathieu.poirier(a)linaro.org> -Description: (R) Similar to "trigger_cntr" above except that this value is +Description: (Read) Similar to "trigger_cntr" above except that this value is read directly from HW register TRG, 0x01C. What: /sys/bus/coresight/devices/<memory_map>.tmc/mgmt/ctl Date: March 2016 KernelVersion: 4.7 Contact: Mathieu Poirier <mathieu.poirier(a)linaro.org> -Description: (R) Shows the value held by the TMC Control register. The value +Description: (Read) Shows the value held by the TMC Control register. The value is read directly from HW register CTL, 0x020. What: /sys/bus/coresight/devices/<memory_map>.tmc/mgmt/ffsr Date: March 2016 KernelVersion: 4.7 Contact: Mathieu Poirier <mathieu.poirier(a)linaro.org> -Description: (R) Shows the value held by the TMC Formatter and Flush Status +Description: (Read) Shows the value held by the TMC Formatter and Flush Status register. The value is read directly from HW register FFSR, 0x300. @@ -65,7 +65,7 @@ What: /sys/bus/coresight/devices/<memory_map>.tmc/mgmt/ffcr Date: March 2016 KernelVersion: 4.7 Contact: Mathieu Poirier <mathieu.poirier(a)linaro.org> -Description: (R) Shows the value held by the TMC Formatter and Flush Control +Description: (Read) Shows the value held by the TMC Formatter and Flush Control register. The value is read directly from HW register FFCR, 0x304. @@ -73,7 +73,7 @@ What: /sys/bus/coresight/devices/<memory_map>.tmc/mgmt/mode Date: March 2016 KernelVersion: 4.7 Contact: Mathieu Poirier <mathieu.poirier(a)linaro.org> -Description: (R) Shows the value held by the TMC Mode register, which +Description: (Read) Shows the value held by the TMC Mode register, which indicate the mode the device has been configured to enact. The The value is read directly from the MODE register, 0x028. @@ -81,7 +81,7 @@ What: /sys/bus/coresight/devices/<memory_map>.tmc/mgmt/devid Date: March 2016 KernelVersion: 4.7 Contact: Mathieu Poirier <mathieu.poirier(a)linaro.org> -Description: (R) Indicates the capabilities of the Coresight TMC. +Description: (Read) Indicates the capabilities of the Coresight TMC. The value is read directly from the DEVID register, 0xFC8, What: /sys/bus/coresight/devices/<memory_map>.tmc/buffer_size diff --git a/Documentation/ABI/testing/sysfs-bus-moxtet-devices b/Documentation/ABI/testing/sysfs-bus-moxtet-devices index 355958527fa3..4a6d61b44f3f 100644 --- a/Documentation/ABI/testing/sysfs-bus-moxtet-devices +++ b/Documentation/ABI/testing/sysfs-bus-moxtet-devices @@ -2,16 +2,16 @@ What: /sys/bus/moxtet/devices/moxtet-<name>.<addr>/module_description Date: March 2019 KernelVersion: 5.3 Contact: Marek Behún <marek.behun(a)nic.cz> -Description: (R) Moxtet module description. Format: string +Description: (Read) Moxtet module description. Format: string What: /sys/bus/moxtet/devices/moxtet-<name>.<addr>/module_id Date: March 2019 KernelVersion: 5.3 Contact: Marek Behún <marek.behun(a)nic.cz> -Description: (R) Moxtet module ID. Format: %x +Description: (Read) Moxtet module ID. Format: %x What: /sys/bus/moxtet/devices/moxtet-<name>.<addr>/module_name Date: March 2019 KernelVersion: 5.3 Contact: Marek Behún <marek.behun(a)nic.cz> -Description: (R) Moxtet module name. Format: string +Description: (Read) Moxtet module name. Format: string diff --git a/Documentation/ABI/testing/sysfs-firmware-turris-mox-rwtm b/Documentation/ABI/testing/sysfs-firmware-turris-mox-rwtm index 15595fab88d1..b8631f5a29c4 100644 --- a/Documentation/ABI/testing/sysfs-firmware-turris-mox-rwtm +++ b/Documentation/ABI/testing/sysfs-firmware-turris-mox-rwtm @@ -2,21 +2,21 @@ What: /sys/firmware/turris-mox-rwtm/board_version Date: August 2019 KernelVersion: 5.4 Contact: Marek Behún <marek.behun(a)nic.cz> -Description: (R) Board version burned into eFuses of this Turris Mox board. +Description: (Read) Board version burned into eFuses of this Turris Mox board. Format: %i What: /sys/firmware/turris-mox-rwtm/mac_address* Date: August 2019 KernelVersion: 5.4 Contact: Marek Behún <marek.behun(a)nic.cz> -Description: (R) MAC addresses burned into eFuses of this Turris Mox board. +Description: (Read) MAC addresses burned into eFuses of this Turris Mox board. Format: %pM What: /sys/firmware/turris-mox-rwtm/pubkey Date: August 2019 KernelVersion: 5.4 Contact: Marek Behún <marek.behun(a)nic.cz> -Description: (R) ECDSA public key (in pubkey hex compressed form) computed +Description: (Read) ECDSA public key (in pubkey hex compressed form) computed as pair to the ECDSA private key burned into eFuses of this Turris Mox Board. Format: string @@ -25,7 +25,7 @@ What: /sys/firmware/turris-mox-rwtm/ram_size Date: August 2019 KernelVersion: 5.4 Contact: Marek Behún <marek.behun(a)nic.cz> -Description: (R) RAM size in MiB of this Turris Mox board as was detected +Description: (Read) RAM size in MiB of this Turris Mox board as was detected during manufacturing and burned into eFuses. Can be 512 or 1024. Format: %i @@ -33,5 +33,5 @@ What: /sys/firmware/turris-mox-rwtm/serial_number Date: August 2019 KernelVersion: 5.4 Contact: Marek Behún <marek.behun(a)nic.cz> -Description: (R) Serial number burned into eFuses of this Turris Mox device. +Description: (Read) Serial number burned into eFuses of this Turris Mox device. Format: %016X -- 2.26.2

4 years, 8 months

[PATCH -next] coresight: core: Remove unneeded semicolon

by Zou Wei

Fixes coccicheck warning: ./drivers/hwtracing/coresight/coresight-core.c:421:4-5: Unneeded semicolon Reported-by: Hulk Robot <hulkci(a)huawei.com> Signed-off-by: Zou Wei <zou_wei(a)huawei.com> --- drivers/hwtracing/coresight/coresight-core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/hwtracing/coresight/coresight-core.c b/drivers/hwtracing/coresight/coresight-core.c index cc9e802..29c83ea 100644 --- a/drivers/hwtracing/coresight/coresight-core.c +++ b/drivers/hwtracing/coresight/coresight-core.c @@ -418,7 +418,7 @@ static int coresight_enable_source(struct coresight_device *csdev, u32 mode) if (ret) { coresight_control_assoc_ectdev(csdev, false); return ret; - }; + } } csdev->enable = true; } -- 2.6.2

4 years, 8 months

[PATCH] coresight: Fix uninitialised pointer bug in etm_setup_aux()

by Mike Leach

Commit [bb1860efc817] changed the sink handling code introducing an uninitialised pointer bug. This results in the default sink selection failing. Prior to commit: static void etm_setup_aux(...) <snip> struct coresight_device *sink; <snip> /* First get the selected sink from user space. */ if (event->attr.config2) { id = (u32)event->attr.config2; sink = coresight_get_sink_by_id(id); } else { sink = coresight_get_enabled_sink(true); } <ctd> *sink always initialised - possibly to NULL which triggers the automatic sink selection. After commit: static void etm_setup_aux(...) <snip> struct coresight_device *sink; <snip> /* First get the selected sink from user space. */ if (event->attr.config2) { id = (u32)event->attr.config2; sink = coresight_get_sink_by_id(id); } <ctd> *sink pointer uninitialised when not providing a sink on the perf command line. This breaks later checks to enable automatic sink selection. Fixes [bb1860efc817] ("coresight: etm: perf: Sink selection using sysfs is deprecated") Signed-off-by: Mike Leach <mike.leach(a)linaro.org> --- drivers/hwtracing/coresight/coresight-etm-perf.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwtracing/coresight/coresight-etm-perf.c index c2c9b127d074..bdc34ca449f7 100644 --- a/drivers/hwtracing/coresight/coresight-etm-perf.c +++ b/drivers/hwtracing/coresight/coresight-etm-perf.c @@ -210,7 +210,7 @@ static void *etm_setup_aux(struct perf_event *event, void **pages, u32 id; int cpu = event->cpu; cpumask_t *mask; - struct coresight_device *sink; + struct coresight_device *sink = NULL; struct etm_event_data *event_data = NULL; event_data = alloc_event_data(cpu); -- 2.17.1

4 years, 8 months

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