CoreSight

coresight@lists.linaro.org

7 participants
2453 discussions

by Amazon.co.jp

Bluetooth 5.0を採用し、より幅広い種類のコーテとう。素敵な話をいっックに対応したプレミアムブルートゥースケーブルです。Bluetoothワイヤレス基板から独立して専用設計越さなければならなされた、ヘッドホンアンプ部基板により、SE535やSE846など、ハイエンドモデルのパフォーマンスを最大限に発揮します。

4 years, 3 months

邮件群发软件---500元/月，赠送200万邮箱数据

by 邮件群发软件---500元/月，赠� �200万邮箱数据

  每台电脑日发5-20万邮箱数据无需发件箱的邮件群发软件外贸、物流、展会业务好帮手 E-mail :  sales0769(a)hotmail.xn--comqq:3351665625-n821a8483e  

4 years, 3 months

Pls assist me purchase a living home from your country

by Ahmed

Assalam Alikum. Assist me purchase a living home, .I have huge sum in financial institution .Should there be a need for an evidence, or a prove of my seriousness and genuineness. I have a Certificate of Deposit as a prove of fund. am from Syria, (where I can invest to sustain my living until the political crisis in my country is over).Could you please send me an email on ( rajwai445(a)gmail.com ) to enable me know you have received my email. Ahmed Hussein

4 years, 3 months

Re: office chair

by Jerry Mccarty

4 years, 3 months

Re: the quick follow up

by Rory Henderson

4 years, 3 months

my future investment ventures in your country

by Ms. Kim Anong

My name is Ms. Kim Anong , A Thai citizen in Asian Continent but currently residing in abroad, I trust this email meets you in good health, I just got your contact today during a research about your country and I will say that I foresee success of my future investment ventures in your country. I want to invest in your country and I would like you to assist me in my investment with moral and physical advises. Please do reply me as soon as possible so we can discuss more. I look forward to hear from you soon 9sporst9(a)gmail.com

4 years, 3 months

中國大陸淘寶-天貓-電商-京東等貨--集運--直達香港運輸

by 中國大陸淘寶-天貓-電商-京� ��等貨--集運--直� ��香港運輸

  你好    本公司主營中國大陸淘寶商城，天貓商城，電商貨,京東商城等各大商城---集運--直達香港運輸，    時效：今發明至,（提供快遞單號，貨物名稱，重量，體積，件數，即可發貨，操作簡單）   可提供,拍照,驗貨,貼嘜頭,換紙箱等附加服務聯繫人:楊先生電話:86-13642980935 (微信同號)E-mail:hk13642980935@hotmail.com

4 years, 3 months

Urgent PO

by Accountant Assistant

Dear, coresight

4 years, 3 months

[PATCH] [v2] coresight: etm4x: avoid build failure with unrolled loops

by Arnd Bergmann

From: Arnd Bergmann <arnd(a)arndb.de> clang-12 fails to build the etm4x driver with -fsanitize=array-bounds, where it decides to unroll certain loops in a way that result in a C variable getting put into an inline assembly <instantiation>:1:7: error: expected constant expression in '.inst' directive .inst (0xd5200000|((((2) << 19) | ((1) << 16) | (((((((((((0x160 + (i * 4))))) >> 2))) >> 7) & 0x7)) << 12) | ((((((((((0x160 + (i * 4))))) >> 2))) & 0xf)) << 8) | (((((((((((0x160 + (i * 4))))) >> 2))) >> 4) & 0x7)) << 5)))|(.L__reg_num_x8)) ^ drivers/hwtracing/coresight/coresight-etm4x-core.c:702:4: note: while in macro instantiation etm4x_relaxed_read32(csa, TRCCNTVRn(i)); ^ drivers/hwtracing/coresight/coresight-etm4x.h:403:4: note: expanded from macro 'etm4x_relaxed_read32' read_etm4x_sysreg_offset((offset), false))) ^ drivers/hwtracing/coresight/coresight-etm4x.h:383:12: note: expanded from macro 'read_etm4x_sysreg_offset' __val = read_etm4x_sysreg_const_offset((offset)); \ ^ drivers/hwtracing/coresight/coresight-etm4x.h:149:2: note: expanded from macro 'read_etm4x_sysreg_const_offset' READ_ETM4x_REG(ETM4x_OFFSET_TO_REG(offset)) ^ drivers/hwtracing/coresight/coresight-etm4x.h:144:2: note: expanded from macro 'READ_ETM4x_REG' read_sysreg_s(ETM4x_REG_NUM_TO_SYSREG((reg))) ^ arch/arm64/include/asm/sysreg.h:1108:15: note: expanded from macro 'read_sysreg_s' asm volatile(__mrs_s("%0", r) : "=r" (__val)); \ ^ arch/arm64/include/asm/sysreg.h:1074:2: note: expanded from macro '__mrs_s' " mrs_s " v ", " __stringify(r) "\n" \ ^ This only happened in a few loops in which the array bounds sanitizer added a special case for an array overflow that clang determined to be possible, but any compiler is free to unroll any of the loops in the same way that breaks the sysreg macros. Introduce helper functions that perform a sysreg access with a non-constant register number and use them in each call that passes a loop counter. Link: https://github.com/ClangBuiltLinux/linux/issues/1310 Link: https://lore.kernel.org/lkml/20210225094324.3542511-1-arnd@kernel.org/ Signed-off-by: Arnd Bergmann <arnd(a)arndb.de> --- .../coresight/coresight-etm4x-core.c | 78 +++++++++---------- drivers/hwtracing/coresight/coresight-etm4x.h | 69 ++++++++++++++++ 2 files changed, 108 insertions(+), 39 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c index db881993c211..73649d9c89d2 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c @@ -381,14 +381,14 @@ static int etm4_enable_hw(struct etmv4_drvdata *drvdata) if (drvdata->nr_pe_cmp) etm4x_relaxed_write32(csa, config->vipcssctlr, TRCVIPCSSCTLR); for (i = 0; i < drvdata->nrseqstate - 1; i++) - etm4x_relaxed_write32(csa, config->seq_ctrl[i], TRCSEQEVRn(i)); + etm4x_relaxed_write32_varreg(csa, config->seq_ctrl[i], TRCSEQEVRn(i)); etm4x_relaxed_write32(csa, config->seq_rst, TRCSEQRSTEVR); etm4x_relaxed_write32(csa, config->seq_state, TRCSEQSTR); etm4x_relaxed_write32(csa, config->ext_inp, TRCEXTINSELR); for (i = 0; i < drvdata->nr_cntr; i++) { - etm4x_relaxed_write32(csa, config->cntrldvr[i], TRCCNTRLDVRn(i)); - etm4x_relaxed_write32(csa, config->cntr_ctrl[i], TRCCNTCTLRn(i)); - etm4x_relaxed_write32(csa, config->cntr_val[i], TRCCNTVRn(i)); + etm4x_relaxed_write32_varreg(csa, config->cntrldvr[i], TRCCNTRLDVRn(i)); + etm4x_relaxed_write32_varreg(csa, config->cntr_ctrl[i], TRCCNTCTLRn(i)); + etm4x_relaxed_write32_varreg(csa, config->cntr_val[i], TRCCNTVRn(i)); } /* @@ -396,29 +396,29 @@ static int etm4_enable_hw(struct etmv4_drvdata *drvdata) * such start at 2. */ for (i = 2; i < drvdata->nr_resource * 2; i++) - etm4x_relaxed_write32(csa, config->res_ctrl[i], TRCRSCTLRn(i)); + etm4x_relaxed_write32_varreg(csa, config->res_ctrl[i], TRCRSCTLRn(i)); for (i = 0; i < drvdata->nr_ss_cmp; i++) { /* always clear status bit on restart if using single-shot */ if (config->ss_ctrl[i] || config->ss_pe_cmp[i]) config->ss_status[i] &= ~BIT(31); - etm4x_relaxed_write32(csa, config->ss_ctrl[i], TRCSSCCRn(i)); - etm4x_relaxed_write32(csa, config->ss_status[i], TRCSSCSRn(i)); + etm4x_relaxed_write32_varreg(csa, config->ss_ctrl[i], TRCSSCCRn(i)); + etm4x_relaxed_write32_varreg(csa, config->ss_status[i], TRCSSCSRn(i)); if (etm4x_sspcicrn_present(drvdata, i)) - etm4x_relaxed_write32(csa, config->ss_pe_cmp[i], TRCSSPCICRn(i)); + etm4x_relaxed_write32_varreg(csa, config->ss_pe_cmp[i], TRCSSPCICRn(i)); } for (i = 0; i < drvdata->nr_addr_cmp; i++) { - etm4x_relaxed_write64(csa, config->addr_val[i], TRCACVRn(i)); - etm4x_relaxed_write64(csa, config->addr_acc[i], TRCACATRn(i)); + etm4x_relaxed_write64_varreg(csa, config->addr_val[i], TRCACVRn(i)); + etm4x_relaxed_write64_varreg(csa, config->addr_acc[i], TRCACATRn(i)); } for (i = 0; i < drvdata->numcidc; i++) - etm4x_relaxed_write64(csa, config->ctxid_pid[i], TRCCIDCVRn(i)); + etm4x_relaxed_write64_varreg(csa, config->ctxid_pid[i], TRCCIDCVRn(i)); etm4x_relaxed_write32(csa, config->ctxid_mask0, TRCCIDCCTLR0); if (drvdata->numcidc > 4) etm4x_relaxed_write32(csa, config->ctxid_mask1, TRCCIDCCTLR1); for (i = 0; i < drvdata->numvmidc; i++) - etm4x_relaxed_write64(csa, config->vmid_val[i], TRCVMIDCVRn(i)); + etm4x_relaxed_write64_varreg(csa, config->vmid_val[i], TRCVMIDCVRn(i)); etm4x_relaxed_write32(csa, config->vmid_mask0, TRCVMIDCCTLR0); if (drvdata->numvmidc > 4) etm4x_relaxed_write32(csa, config->vmid_mask1, TRCVMIDCCTLR1); @@ -777,13 +777,13 @@ static void etm4_disable_hw(void *info) /* read the status of the single shot comparators */ for (i = 0; i < drvdata->nr_ss_cmp; i++) { config->ss_status[i] = - etm4x_relaxed_read32(csa, TRCSSCSRn(i)); + etm4x_relaxed_read32_varreg(csa, TRCSSCSRn(i)); } /* read back the current counter values */ for (i = 0; i < drvdata->nr_cntr; i++) { config->cntr_val[i] = - etm4x_relaxed_read32(csa, TRCCNTVRn(i)); + etm4x_relaxed_read32_varreg(csa, TRCCNTVRn(i)); } coresight_disclaim_device_unlocked(csdev); @@ -1151,7 +1151,7 @@ static void etm4_init_arch_data(void *info) drvdata->nr_ss_cmp = BMVAL(etmidr4, 20, 23); for (i = 0; i < drvdata->nr_ss_cmp; i++) { drvdata->config.ss_status[i] = - etm4x_relaxed_read32(csa, TRCSSCSRn(i)); + etm4x_relaxed_read32_varreg(csa, TRCSSCSRn(i)); } /* NUMCIDC, bits[27:24] number of Context ID comparators for tracing */ drvdata->numcidc = BMVAL(etmidr4, 24, 27); @@ -1595,31 +1595,31 @@ static int etm4_cpu_save(struct etmv4_drvdata *drvdata) state->trcvdarcctlr = etm4x_read32(csa, TRCVDARCCTLR); for (i = 0; i < drvdata->nrseqstate - 1; i++) - state->trcseqevr[i] = etm4x_read32(csa, TRCSEQEVRn(i)); + state->trcseqevr[i] = etm4x_read32_varreg(csa, TRCSEQEVRn(i)); state->trcseqrstevr = etm4x_read32(csa, TRCSEQRSTEVR); state->trcseqstr = etm4x_read32(csa, TRCSEQSTR); state->trcextinselr = etm4x_read32(csa, TRCEXTINSELR); for (i = 0; i < drvdata->nr_cntr; i++) { - state->trccntrldvr[i] = etm4x_read32(csa, TRCCNTRLDVRn(i)); - state->trccntctlr[i] = etm4x_read32(csa, TRCCNTCTLRn(i)); - state->trccntvr[i] = etm4x_read32(csa, TRCCNTVRn(i)); + state->trccntrldvr[i] = etm4x_read32_varreg(csa, TRCCNTRLDVRn(i)); + state->trccntctlr[i] = etm4x_read32_varreg(csa, TRCCNTCTLRn(i)); + state->trccntvr[i] = etm4x_read32_varreg(csa, TRCCNTVRn(i)); } for (i = 0; i < drvdata->nr_resource * 2; i++) - state->trcrsctlr[i] = etm4x_read32(csa, TRCRSCTLRn(i)); + state->trcrsctlr[i] = etm4x_read32_varreg(csa, TRCRSCTLRn(i)); for (i = 0; i < drvdata->nr_ss_cmp; i++) { - state->trcssccr[i] = etm4x_read32(csa, TRCSSCCRn(i)); - state->trcsscsr[i] = etm4x_read32(csa, TRCSSCSRn(i)); + state->trcssccr[i] = etm4x_read32_varreg(csa, TRCSSCCRn(i)); + state->trcsscsr[i] = etm4x_read32_varreg(csa, TRCSSCSRn(i)); if (etm4x_sspcicrn_present(drvdata, i)) - state->trcsspcicr[i] = etm4x_read32(csa, TRCSSPCICRn(i)); + state->trcsspcicr[i] = etm4x_read32_varreg(csa, TRCSSPCICRn(i)); } for (i = 0; i < drvdata->nr_addr_cmp * 2; i++) { - state->trcacvr[i] = etm4x_read64(csa, TRCACVRn(i)); - state->trcacatr[i] = etm4x_read64(csa, TRCACATRn(i)); + state->trcacvr[i] = etm4x_read64_varreg(csa, TRCACVRn(i)); + state->trcacatr[i] = etm4x_read64_varreg(csa, TRCACATRn(i)); } /* @@ -1630,10 +1630,10 @@ static int etm4_cpu_save(struct etmv4_drvdata *drvdata) */ for (i = 0; i < drvdata->numcidc; i++) - state->trccidcvr[i] = etm4x_read64(csa, TRCCIDCVRn(i)); + state->trccidcvr[i] = etm4x_read64_varreg(csa, TRCCIDCVRn(i)); for (i = 0; i < drvdata->numvmidc; i++) - state->trcvmidcvr[i] = etm4x_read64(csa, TRCVMIDCVRn(i)); + state->trcvmidcvr[i] = etm4x_read64_varreg(csa, TRCVMIDCVRn(i)); state->trccidcctlr0 = etm4x_read32(csa, TRCCIDCCTLR0); if (drvdata->numcidc > 4) @@ -1708,38 +1708,38 @@ static void etm4_cpu_restore(struct etmv4_drvdata *drvdata) etm4x_relaxed_write32(csa, state->trcvdarcctlr, TRCVDARCCTLR); for (i = 0; i < drvdata->nrseqstate - 1; i++) - etm4x_relaxed_write32(csa, state->trcseqevr[i], TRCSEQEVRn(i)); + etm4x_relaxed_write32_varreg(csa, state->trcseqevr[i], TRCSEQEVRn(i)); etm4x_relaxed_write32(csa, state->trcseqrstevr, TRCSEQRSTEVR); etm4x_relaxed_write32(csa, state->trcseqstr, TRCSEQSTR); etm4x_relaxed_write32(csa, state->trcextinselr, TRCEXTINSELR); for (i = 0; i < drvdata->nr_cntr; i++) { - etm4x_relaxed_write32(csa, state->trccntrldvr[i], TRCCNTRLDVRn(i)); - etm4x_relaxed_write32(csa, state->trccntctlr[i], TRCCNTCTLRn(i)); - etm4x_relaxed_write32(csa, state->trccntvr[i], TRCCNTVRn(i)); + etm4x_relaxed_write32_varreg(csa, state->trccntrldvr[i], TRCCNTRLDVRn(i)); + etm4x_relaxed_write32_varreg(csa, state->trccntctlr[i], TRCCNTCTLRn(i)); + etm4x_relaxed_write32_varreg(csa, state->trccntvr[i], TRCCNTVRn(i)); } for (i = 0; i < drvdata->nr_resource * 2; i++) - etm4x_relaxed_write32(csa, state->trcrsctlr[i], TRCRSCTLRn(i)); + etm4x_relaxed_write32_varreg(csa, state->trcrsctlr[i], TRCRSCTLRn(i)); for (i = 0; i < drvdata->nr_ss_cmp; i++) { - etm4x_relaxed_write32(csa, state->trcssccr[i], TRCSSCCRn(i)); - etm4x_relaxed_write32(csa, state->trcsscsr[i], TRCSSCSRn(i)); + etm4x_relaxed_write32_varreg(csa, state->trcssccr[i], TRCSSCCRn(i)); + etm4x_relaxed_write32_varreg(csa, state->trcsscsr[i], TRCSSCSRn(i)); if (etm4x_sspcicrn_present(drvdata, i)) - etm4x_relaxed_write32(csa, state->trcsspcicr[i], TRCSSPCICRn(i)); + etm4x_relaxed_write32_varreg(csa, state->trcsspcicr[i], TRCSSPCICRn(i)); } for (i = 0; i < drvdata->nr_addr_cmp * 2; i++) { - etm4x_relaxed_write64(csa, state->trcacvr[i], TRCACVRn(i)); - etm4x_relaxed_write64(csa, state->trcacatr[i], TRCACATRn(i)); + etm4x_relaxed_write64_varreg(csa, state->trcacvr[i], TRCACVRn(i)); + etm4x_relaxed_write64_varreg(csa, state->trcacatr[i], TRCACATRn(i)); } for (i = 0; i < drvdata->numcidc; i++) - etm4x_relaxed_write64(csa, state->trccidcvr[i], TRCCIDCVRn(i)); + etm4x_relaxed_write64_varreg(csa, state->trccidcvr[i], TRCCIDCVRn(i)); for (i = 0; i < drvdata->numvmidc; i++) - etm4x_relaxed_write64(csa, state->trcvmidcvr[i], TRCVMIDCVRn(i)); + etm4x_relaxed_write64_varreg(csa, state->trcvmidcvr[i], TRCVMIDCVRn(i)); etm4x_relaxed_write32(csa, state->trccidcctlr0, TRCCIDCCTLR0); if (drvdata->numcidc > 4) diff --git a/drivers/hwtracing/coresight/coresight-etm4x.h b/drivers/hwtracing/coresight/coresight-etm4x.h index e5b79bdb9851..acad1befa207 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x.h +++ b/drivers/hwtracing/coresight/coresight-etm4x.h @@ -1001,6 +1001,75 @@ void etm4_config_trace_mode(struct etmv4_config *config); u64 etm4x_sysreg_read(u32 offset, bool _relaxed, bool _64bit); void etm4x_sysreg_write(u64 val, u32 offset, bool _relaxed, bool _64bit); +/* + * Register accessors for variable register number, use in a loop + * when 'reg' is not a constant that can be passed into an inline + * assembly. + */ +static inline void etm4x_relaxed_write32_varreg(struct csdev_access *csa, u32 val, u32 offset) +{ + if (csa->io_mem) + writel_relaxed(val, csa->base + offset); + else + etm4x_sysreg_write(val, offset, true, false); +} + +static inline void etm4x_relaxed_write64_varreg(struct csdev_access *csa, u64 val, u32 offset) +{ + if (csa->io_mem) + writeq_relaxed(val, csa->base + offset); + else + etm4x_sysreg_write(val, offset, true, true); +} + +static inline void etm4x_write32_varreg(struct csdev_access *csa, u32 val, u32 offset) +{ + if (csa->io_mem) + writel(val, csa->base + offset); + else + etm4x_sysreg_write(val, offset, false, false); +} + +static inline void etm4x_write64_varreg(struct csdev_access *csa, u64 val, u32 offset) +{ + if (csa->io_mem) + writeq(val, csa->base + offset); + else + etm4x_sysreg_write(val, offset, false, true); +} + +static inline u32 etm4x_relaxed_read32_varreg(struct csdev_access *csa, u32 offset) +{ + if (csa->io_mem) + return readl_relaxed(csa->base + offset); + else + return etm4x_sysreg_read(offset, true, false); +} + +static inline u64 etm4x_relaxed_read64_varreg(struct csdev_access *csa, u32 offset) +{ + if (csa->io_mem) + return readq(csa->base + offset); + else + return etm4x_sysreg_read(offset, true, true); +} + +static inline u32 etm4x_read32_varreg(struct csdev_access *csa, u32 offset) +{ + if (csa->io_mem) + return readl(csa->base + offset); + else + return etm4x_sysreg_read(offset, false, false); +} + +static inline u64 etm4x_read64_varreg(struct csdev_access *csa, u32 offset) +{ + if (csa->io_mem) + return readl(csa->base + offset); + else + return etm4x_sysreg_read(offset, false, true); +} + static inline bool etm4x_is_ete(struct etmv4_drvdata *drvdata) { return drvdata->arch >= ETM_ARCH_ETE; -- 2.29.2

4 years, 3 months

[PATCH v1] coresight: add node to reset all coresight devices

by Tao Zhang

Add new reset_source_sink node to be able to disable all active coresight devices. In this way, we no longer need to manually disable all active coresight devices one by one. After enabling multiple coresight paths, users can reset their status more conveniently by this node. This patch base on coresight-next repo http://git.linaro.org/kernel/coresight.git/log/?h=next And this patch depends on the following patch https://www.mail-archive.com/linux-kernel@vger.kernel.org/msg2551216.html Signed-off-by: Tingwei Zhang <tingwei(a)codeaurora.org> Signed-off-by: Mao Jinlong <jinlmao(a)codeaurora.org> Signed-off-by: Tao Zhang <taozha(a)codeaurora.org> --- drivers/hwtracing/coresight/coresight-core.c | 72 ++++++++++++++++++++++++---- 1 file changed, 64 insertions(+), 8 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-core.c b/drivers/hwtracing/coresight/coresight-core.c index 7dfadb6..0001b6c 100644 --- a/drivers/hwtracing/coresight/coresight-core.c +++ b/drivers/hwtracing/coresight/coresight-core.c @@ -107,6 +107,23 @@ static int coresight_source_is_unique(struct coresight_device *csdev) csdev, coresight_id_match); } +static int coresight_reset_sink(struct device *dev, void *data) +{ + struct coresight_device *csdev = to_coresight_device(dev); + + if ((csdev->type == CORESIGHT_DEV_TYPE_SINK || + csdev->type == CORESIGHT_DEV_TYPE_LINKSINK) && + csdev->activated) + csdev->activated = false; + + return 0; +} + +static void coresight_reset_all_sink(void) +{ + bus_for_each_dev(&coresight_bustype, NULL, NULL, coresight_reset_sink); +} + static int coresight_find_link_inport(struct coresight_device *csdev, struct coresight_device *parent) { @@ -1137,7 +1154,7 @@ int coresight_enable(struct coresight_device *csdev) } EXPORT_SYMBOL_GPL(coresight_enable); -void coresight_disable(struct coresight_device *csdev) +static void __coresight_disable(struct coresight_device *csdev) { int ret; struct list_head *path = NULL; @@ -1145,14 +1162,12 @@ void coresight_disable(struct coresight_device *csdev) struct coresight_path *cspath_next = NULL; struct coresight_device *src_csdev = NULL; - mutex_lock(&coresight_mutex); - ret = coresight_validate_source(csdev, __func__); if (ret) - goto out; + return; if (!csdev->enable || !coresight_disable_source(csdev)) - goto out; + return; list_for_each_entry_safe(cspath, cspath_next, &cs_active_paths, link) { src_csdev = coresight_get_source(cspath->path); @@ -1165,12 +1180,16 @@ void coresight_disable(struct coresight_device *csdev) } } if (path == NULL) - goto out; + return; coresight_disable_path(path); coresight_release_path(path); +} -out: +void coresight_disable(struct coresight_device *csdev) +{ + mutex_lock(&coresight_mutex); + __coresight_disable(csdev); mutex_unlock(&coresight_mutex); } EXPORT_SYMBOL_GPL(coresight_disable); @@ -1467,7 +1486,43 @@ int coresight_timeout(void __iomem *addr, u32 offset, int position, int value) return -EAGAIN; } -EXPORT_SYMBOL_GPL(coresight_timeout); + +static ssize_t reset_source_sink_store(struct bus_type *bus, + const char *buf, size_t size) +{ + int ret = 0; + unsigned long val; + struct coresight_path *cspath = NULL; + struct coresight_path *cspath_next = NULL; + struct coresight_device *csdev; + + ret = kstrtoul(buf, 10, &val); + if (ret) + return ret; + + mutex_lock(&coresight_mutex); + + list_for_each_entry_safe(cspath, cspath_next, &cs_active_paths, link) { + csdev = coresight_get_source(cspath->path); + if (!csdev) + continue; + atomic_set(csdev->refcnt, 1); + __coresight_disable(csdev); + } + + /* Reset all activated sinks */ + coresight_reset_all_sink(); + + mutex_unlock(&coresight_mutex); + return size; +} +static BUS_ATTR_WO(reset_source_sink); + +static struct attribute *coresight_reset_source_sink_attrs[] = { + &bus_attr_reset_source_sink.attr, + NULL, +}; +ATTRIBUTE_GROUPS(coresight_reset_source_sink); /* * coresight_release_platform_data: Release references to the devices connected @@ -1680,6 +1735,7 @@ EXPORT_SYMBOL_GPL(coresight_alloc_device_name); struct bus_type coresight_bustype = { .name = "coresight", + .bus_groups = coresight_reset_source_sink_groups, }; static int __init coresight_init(void) -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project

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