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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/master-aarch64-bootstrap in repository toolchain/ci/gcc.

from 7631a4d1de0 Daily bump. adds 460d53f816f rs6000: Replace UNSPECS with ss_plus/us_plus and ss_minus/us_minus adds 46bfe1b0e11 Fix incorrect loop exit edge probability [PR103270] adds cd5ae148c47 Fix loop split incorrect count and probability adds 51a24e4a984 Don't move cold code out of loop by checking bb count

No new revisions were added by this update.

Summary of changes: gcc/config/rs6000/altivec.md | 29 ++---- gcc/predict.c | 10 +- gcc/testsuite/gcc.dg/pr103270.c | 19 ++++ gcc/testsuite/gcc.dg/tree-ssa/recip-3.c | 2 +- gcc/testsuite/gcc.dg/tree-ssa/ssa-lim-19.c | 29 ++++++ gcc/testsuite/gcc.dg/tree-ssa/ssa-lim-20.c | 25 +++++ gcc/testsuite/gcc.dg/tree-ssa/ssa-lim-21.c | 35 +++++++ gcc/testsuite/gcc.dg/tree-ssa/ssa-lim-22.c | 32 ++++++ gcc/testsuite/gcc.dg/tree-ssa/ssa-lim-23.c | 21 ++++ gcc/tree-ssa-loop-im.c | 152 ++++++++++++++++++++++++++++- gcc/tree-ssa-loop-split.c | 85 ++++++++++++++-- 11 files changed, 405 insertions(+), 34 deletions(-) create mode 100644 gcc/testsuite/gcc.dg/pr103270.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/ssa-lim-19.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/ssa-lim-20.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/ssa-lim-21.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/ssa-lim-22.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/ssa-lim-23.c