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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_build/master-aarch64 in repository toolchain/ci/qemu.

from 5cdcfd861e Merge tag 'pull-ppc-20220621' of https://gitlab.com/danielhb [...] new 4d5738222f tcg/ppc: implement rem[u]_i{32,64} with mod[su][wd] new adb5974dcc target/avr: Drop avr_cpu_memory_rw_debug() new a82fd5a4ec accel/tcg: Init TCG cflags in vCPU thread handler new 18b8c47f8e accel/tcg: Reorganize tcg_accel_ops_init() new 3f42906c9a qemu-timer: Skip empty timer lists before locking in qemu_cl [...] new 418ade7849 softmmu: Always initialize xlat in address_space_translate_f [...] new 7971375287 util: Merge cacheflush.c and cacheinfo.c new bdd50dc7d0 util/cacheflush: Merge aarch64 ctr_el0 usage new c79a8e840c util/cacheflush: Optimize flushing when ppc host has coheren [...] new f200ff158d Merge tag 'pull-tcg-20220621' of https://gitlab.com/rth7680/ [...]

The 10 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.

Summary of changes: accel/tcg/tcg-accel-ops-mttcg.c | 5 +- accel/tcg/tcg-accel-ops-rr.c | 7 +- accel/tcg/tcg-accel-ops.c | 15 +-- softmmu/physmem.c | 13 ++- target/avr/cpu.c | 1 - target/avr/cpu.h | 2 - target/avr/helper.c | 6 - tcg/ppc/tcg-target.c.inc | 22 ++++ tcg/ppc/tcg-target.h | 4 +- util/cacheflush.c | 247 +++++++++++++++++++++++++++++++++++++--- util/cacheinfo.c | 200 -------------------------------- util/meson.build | 2 +- util/qemu-timer.c | 3 + 13 files changed, 284 insertions(+), 243 deletions(-) delete mode 100644 util/cacheinfo.c