This is an automated email from the git hooks/post-receive script.

tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_build/master-aarch64 in repository toolchain/ci/gcc.

from 97ffef35532 testsuite: Fix up pr103456.c testcase [PR103456] adds f7854b90897 Add TARGET_IFUNC_REF_LOCAL_OK adds 06f2e7d49fc sve: combine nested if predicates adds add31efdc7b RISC-V: Add option defines for Scalar Cryptography adds 0962bff477a RISC-V: Add implied defines of Zk, Zkn and Zks adds 37fbf9175b2 x86: Scan leal in PR target/83782 tests for x32 adds 987baa7444a rs6000: Fix use of wrong enum for built-in function code adds 654cd743c88 x86: Add -mmove-max=bits and -mstore-max=bits

No new revisions were added by this update.

Summary of changes: gcc/common/config/riscv/riscv-common.c | 38 ++++++++++- gcc/config/i386/i386-expand.c | 3 +- gcc/config/i386/i386-options.c | 75 ++++++++++++++++++++-- gcc/config/i386/i386-options.h | 6 +- gcc/config/i386/i386-protos.h | 1 + gcc/config/i386/i386.c | 25 +++++++- gcc/config/i386/i386.h | 18 ++---- gcc/config/i386/i386.opt | 8 +++ gcc/config/i386/x86-tune.def | 10 +++ gcc/config/riscv/arch-canonicalize | 16 ++++- gcc/config/riscv/riscv-opts.h | 22 +++++++ gcc/config/riscv/riscv.opt | 3 + gcc/config/rs6000/rs6000.c | 4 +- gcc/doc/invoke.texi | 13 ++++ gcc/doc/tm.texi | 5 ++ gcc/doc/tm.texi.in | 2 + gcc/target.def | 8 +++ .../gcc.target/aarch64/sve/pred-combine-and.c | 18 ++++++ gcc/testsuite/gcc.target/i386/pieces-memcpy-17.c | 16 +++++ gcc/testsuite/gcc.target/i386/pieces-memcpy-18.c | 16 +++++ gcc/testsuite/gcc.target/i386/pieces-memcpy-19.c | 16 +++++ gcc/testsuite/gcc.target/i386/pieces-memcpy-20.c | 16 +++++ gcc/testsuite/gcc.target/i386/pieces-memcpy-21.c | 16 +++++ gcc/testsuite/gcc.target/i386/pieces-memset-45.c | 16 +++++ gcc/testsuite/gcc.target/i386/pieces-memset-46.c | 17 +++++ gcc/testsuite/gcc.target/i386/pieces-memset-47.c | 17 +++++ gcc/testsuite/gcc.target/i386/pieces-memset-48.c | 17 +++++ gcc/testsuite/gcc.target/i386/pieces-memset-49.c | 16 +++++ gcc/testsuite/gcc.target/i386/pr83782-1.c | 26 ++++++++ gcc/testsuite/gcc.target/i386/pr83782-2.c | 26 ++++++++ gcc/tree-vect-stmts.c | 70 +++++++++++++++----- gcc/tree-vectorizer.h | 9 +++ gcc/varasm.c | 3 +- 33 files changed, 532 insertions(+), 40 deletions(-) create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/pred-combine-and.c create mode 100644 gcc/testsuite/gcc.target/i386/pieces-memcpy-17.c create mode 100644 gcc/testsuite/gcc.target/i386/pieces-memcpy-18.c create mode 100644 gcc/testsuite/gcc.target/i386/pieces-memcpy-19.c create mode 100644 gcc/testsuite/gcc.target/i386/pieces-memcpy-20.c create mode 100644 gcc/testsuite/gcc.target/i386/pieces-memcpy-21.c create mode 100644 gcc/testsuite/gcc.target/i386/pieces-memset-45.c create mode 100644 gcc/testsuite/gcc.target/i386/pieces-memset-46.c create mode 100644 gcc/testsuite/gcc.target/i386/pieces-memset-47.c create mode 100644 gcc/testsuite/gcc.target/i386/pieces-memset-48.c create mode 100644 gcc/testsuite/gcc.target/i386/pieces-memset-49.c create mode 100644 gcc/testsuite/gcc.target/i386/pr83782-1.c create mode 100644 gcc/testsuite/gcc.target/i386/pr83782-2.c