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from cb9067728a5 [GlobalISel][AArch64] Always fall back on aarch64.neon.addp.* new 7cb38d512dc [RISCV] Allow fp as an alias of s0 new ceec6f23cb9 Relax constraints for reduction vectorization new f2cfb7b3d3b [RISCV] Do a sign-extension in a compare-and-swap of 32 bit [...]

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Summary of changes: include/llvm/Analysis/IVDescriptors.h | 15 ++- include/llvm/IR/Operator.h | 6 ++ include/llvm/Transforms/Utils/LoopUtils.h | 2 + lib/Analysis/IVDescriptors.cpp | 10 +- lib/CodeGen/ExpandReductions.cpp | 4 +- lib/Target/RISCV/RISCVISelLowering.h | 4 + lib/Target/RISCV/RISCVRegisterInfo.td | 2 +- lib/Transforms/Utils/LoopUtils.cpp | 46 +++++---- lib/Transforms/Vectorize/LoopVectorize.cpp | 16 +-- lib/Transforms/Vectorize/SLPVectorizer.cpp | 3 +- test/CodeGen/RISCV/atomic-cmpxchg-flag.ll | 29 ++++++ test/MC/RISCV/rvi-alternate-abi-names.s | 16 +++ .../Transforms/LoopVectorize/reduction-fastmath.ll | 112 +++++++++++++++++++++ 13 files changed, 230 insertions(+), 35 deletions(-) create mode 100644 test/CodeGen/RISCV/atomic-cmpxchg-flag.ll create mode 100644 test/MC/RISCV/rvi-alternate-abi-names.s create mode 100644 test/Transforms/LoopVectorize/reduction-fastmath.ll