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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu/gnu-release-arm-bootstrap_O1 in repository toolchain/ci/gcc.

from 9f610f5cf81 i386: Change absMMXMODEI:mode2 to an expander. adds eb13f3f81d5 [PR97969] LRA: Transform pattern `plus (plus (hard reg, con [...] adds 1791b11d9ca [PR98722] LRA: Check that target has no 3-op add insn to tr [...] adds 05f6971ac40 [PR98777] LRA: Use preliminary created pseudo for in LRA el [...] adds 72a3f203348 Daily bump. adds 5b4b18b8922 libstdc++: Install libstdc++*-gdb.py more robustly [PR 99453] adds a937d0269c1 libstdc++: Fix installation of python hooks [PR 99453] adds e01562b302e libstdc++: Change [range.iter.op] functions to function obj [...] adds 753c8680a46 libstdc++: Fix return value of std::ranges::advance [PR 100833] adds 8c96fef45c6 Daily bump. adds fe28b9da8f8 arm: Fix ICE with CMSE nonsecure calls on Armv8.1-M [PR100333]

No new revisions were added by this update.

Summary of changes: gcc/ChangeLog | 37 ++ gcc/DATESTAMP | 2 +- gcc/config/arm/arm.md | 19 +- gcc/lra-eliminations.c | 31 +- gcc/lra-int.h | 1 + gcc/lra.c | 4 + gcc/testsuite/ChangeLog | 24 ++ gcc/testsuite/g++.target/s390/pr98722.C | 12 + gcc/testsuite/gcc.target/arm/cmse/pr100333.c | 7 + gcc/testsuite/gcc.target/arm/pr97969.c | 54 +++ gcc/testsuite/gcc.target/riscv/pr98777.c | 31 ++ libstdc++-v3/ChangeLog | 47 +++ libstdc++-v3/include/bits/range_access.h | 381 +++++++++++---------- libstdc++-v3/python/Makefile.am | 24 +- libstdc++-v3/python/Makefile.in | 18 +- .../headers/iterator/synopsis_c++20.cc | 25 +- .../24_iterators/range_operations/100768.cc | 128 +++++++ .../24_iterators/range_operations/advance.cc | 48 ++- .../testsuite/std/ranges/adaptors/elements.cc | 3 + .../testsuite/std/ranges/adaptors/transform.cc | 3 + 20 files changed, 645 insertions(+), 254 deletions(-) create mode 100644 gcc/testsuite/g++.target/s390/pr98722.C create mode 100644 gcc/testsuite/gcc.target/arm/cmse/pr100333.c create mode 100644 gcc/testsuite/gcc.target/arm/pr97969.c create mode 100644 gcc/testsuite/gcc.target/riscv/pr98777.c create mode 100644 libstdc++-v3/testsuite/24_iterators/range_operations/100768.cc