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from 85f2423 [SelectionDAG] Optimization of BITREVERSE legalization for po [...] new 04e7d3c GlobalISel: implement alloca instruction new 7c8be6e AMDGPU: Don't reinvent transferSuccessorsAndUpdatePHIs new 7488ab3 AMDGPU: Fix i1 fp_to_int new c28b821 AMDGPU: Delete more dead code new 30f0e3e AMDGPU: Add HSA dispatch id intrinsic new 9da217e AMDGPU: Fix groupstaticsize for large LDS new c5a5706 AMDGPU: Remove redundant test

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Summary of changes: include/llvm/CodeGen/GlobalISel/IRTranslator.h | 6 ++ include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h | 11 ++ include/llvm/CodeGen/LowLevelType.h | 42 +++++--- include/llvm/IR/IntrinsicsAMDGPU.td | 52 ++++++---- include/llvm/Target/GenericOpcodes.td | 10 ++ include/llvm/Target/TargetOpcodes.def | 4 + lib/CodeGen/GlobalISel/IRTranslator.cpp | 27 ++++- lib/CodeGen/GlobalISel/MachineIRBuilder.cpp | 8 ++ lib/CodeGen/LowLevelType.cpp | 16 ++- lib/CodeGen/MIRParser/MILexer.cpp | 10 +- lib/CodeGen/MIRParser/MILexer.h | 1 + lib/CodeGen/MIRParser/MIParser.cpp | 10 +- lib/Target/AMDGPU/AMDGPUAnnotateKernelFeatures.cpp | 3 +- lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp | 8 +- lib/Target/AMDGPU/AMDGPUAsmPrinter.h | 4 +- lib/Target/AMDGPU/AMDGPUInstructions.td | 3 +- lib/Target/AMDGPU/AMDGPUSubtarget.h | 37 +------ lib/Target/AMDGPU/AMDGPUTargetMachine.h | 9 +- lib/Target/AMDGPU/R600ControlFlowFinalizer.cpp | 2 +- lib/Target/AMDGPU/R600ExpandSpecialInstrs.cpp | 79 -------------- lib/Target/AMDGPU/R600ISelLowering.cpp | 65 ++++-------- lib/Target/AMDGPU/R600ISelLowering.h | 3 +- lib/Target/AMDGPU/R600MachineFunctionInfo.cpp | 4 - lib/Target/AMDGPU/R600MachineFunctionInfo.h | 7 +- lib/Target/AMDGPU/SIISelLowering.cpp | 44 +++----- lib/Target/AMDGPU/SIInstructions.td | 17 +-- lib/Target/AMDGPU/SIMachineFunctionInfo.cpp | 12 ++- lib/Target/AMDGPU/SIMachineFunctionInfo.h | 11 +- lib/Target/AMDGPU/SIRegisterInfo.cpp | 3 +- .../AArch64/GlobalISel/arm64-irtranslator.ll | 16 +++ test/CodeGen/AMDGPU/amdgcn.work-item-intrinsics.ll | 114 --------------------- test/CodeGen/AMDGPU/fp_to_sint.f64.ll | 23 ++++- test/CodeGen/AMDGPU/fp_to_sint.ll | 28 ++++- test/CodeGen/AMDGPU/fp_to_uint.f64.ll | 23 ++++- test/CodeGen/AMDGPU/fp_to_uint.ll | 30 +++++- test/CodeGen/AMDGPU/llvm.amdgcn.dispatch.id.ll | 19 ++++ test/CodeGen/AMDGPU/llvm.amdgcn.groupstaticsize.ll | 17 ++- test/CodeGen/AMDGPU/llvm.amdgcn.read.workdim.ll | 2 +- test/CodeGen/MIR/X86/generic-instr-type-error.mir | 2 +- 39 files changed, 386 insertions(+), 396 deletions(-) delete mode 100644 test/CodeGen/AMDGPU/amdgcn.work-item-intrinsics.ll create mode 100644 test/CodeGen/AMDGPU/llvm.amdgcn.dispatch.id.ll