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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_llvm_apm/llvm-master-aarch64-spec2k6-Oz_LTO in repository toolchain/ci/llvm-project.
from cac164ff9cb6 [lldb] Update the modulemap adds d93a11c138bb Revert "[llvm][cmake] Make `llvm_install_symlink` robust t [...] adds 82af95029ec9 [X86] Enable ibt-seal optimization when LTO is used in Kernel adds 7ee1c162cc53 [RISCV][RFC] add inst support of zbkb adds 7b3d30728816 [RISCV] Add isel patterns for grevi, shfli, and unshfli to [...] adds 26167cae4515 Print the `// ----` separator between modules when using - [...] adds 308d8b8c6618 [mlir][python] 8b/16b DenseIntElements access adds 9006bf424847 Remove obsolete `getAsmResultNames` from OpAsmDialectInterface adds a7f8aea71485 [clang-tidy] Fix wrong FixIt in performance-move-const-arg adds 82bb8a588dde [CSKY] Add codegen support of GlobalTLSAddress lowering adds 8def89b5dc82 [RISCV] Set CostPerUse to 1 iff RVC is enabled adds 75184f14aecd [DebugInfo] Fix handling '# line "file"' for DWARFv5 adds 86b08ed6bb16 [DebugInfo][NFC] Do not call 'isRootFile' for DWARF Version < 5 adds 7f0f4cab18a9 [libc][NFC] Add 'struct_' prefix to type headers defining [...] adds e6de53b4de4a [RISCV] Bump rvv-related extensions from 0.10 to 1.0 adds a99e06aa869b [mlir][Linalg] Avoid generating illegal operations during [...] adds 05cd9a0596d8 [ConstantFold] Simplify type check in reinterpret load fol [...] adds 6a19cb837c9b [ConstantFold] Support pointers in reinterpret load folding adds 7950010e4983 [VE][NFC] Factor out helper functions adds 3f9d1f516e19 [InstSimplify] Add tests for reinterpret load of floats (NFC) adds b4900296e4a5 [ConstantFold] Allow all float types in reinterpret load folding adds 99b5a8049be4 Match bazel config with cmake after f29256a64 adds 69825f369302 [fir] Add array operations documentation adds d03c5bc8d437 [mlir] Fully qualify return types in OpAsmInterface.td and [...] adds a2f6921ef2a1 [llvm] Remove unused headers in LLVMDemangle adds c0cf209076a2 [VPlan] Add VPWidenIntOrFpInductionRecipe::isCanonical, us [...] adds 55689904d2e5 [VPlan] Move ::isCanonical outside ifdef. adds 1f9e18b6565f [llvm] Remove (some) LLVMDemangle header dependencies adds e7762653d3b0 [Attributor] Avoid some pointer element type accesses adds 065044c443f4 Fix 1f9e18b6565fd1bb69c4b649b9efd3467b3c7c7d adds 329feeb938ac [ORC][docs] Describe removing JITDylibs, using custom prog [...] adds b351ac3873db [AMDGPU][NFC] Regenerate InstCombine test adds 0530fdbbbb84 [AMDGPU] Fix LOD bias in A16 combine adds 603d18033c51 [AMDGPU][InstCombine] Remove zero LOD bias adds ae2f9c8be897 [AMDGPU] Remove lz and nomip combine from codegen adds f53d359816e6 Fix 1f9e18b6565fd1bb69c4b649b9efd3467b3c7c7d adds 9c5b856dac5c [CoroSplit] Avoid pointer element type accesses adds 0ca426d6ac65 [llvm-mca] Improve barriers for strict region marking (PR52198) adds bfbdb5e43e50 [Coroutines] Avoid some pointer element type accesses adds 597eae998a87 [clangd][Background] Make index validation logs verbose adds b6a41fddcfd3 [DWARF][DebugInfo] Fix off-by-one error in size of DW_TAG_ [...] adds 357f2d9ccf20 [mlir][LangRef] Add top-level production to the MLIR grammar adds 4d268dc94a6b [RISCV] Enable CGP to sink splat operands of VP intrinsics adds 825a3cd6b697 [clangd] Fail inlayHints requests on content changes adds 4727d29d908f [X86] Remove __builtin_ia32_pabs intrinsics and use generi [...] adds ced077e1ba52 [clang][deps] NFC: Simplify handling of cached FS errors adds 5daeada33051 [clang][deps] Ensure filesystem cache consistency adds 8cc2a1372704 [clang][deps] Handle symlinks in minimizing FS adds 68db0e25df4b [flang] Update tco tool pipline and add translation to LLVM IR adds 8ee135dcf8ff [X86] Remove `__builtin_ia32_pmax/min` intrinsics and use [...] adds 3ef88b31843e Revert rG8ee135dcf8ff060656ad481c3e980fe8763576f5 "[X86] R [...] adds 0abaf6458092 Revert rG4727d29d908f9dd608dd97a58c0af1ad579fd3ca "[X86] R [...] adds 75e164f61d39 [llvm] Cleanup header dependencies in ADT and Support adds 2b8e4c6e5fbd Add missing header in Support/ConvertUTF.h adds 38ac4093d9d2 [NFCI][Support] Avoid ASSERT_/EXPECT_TRUE(A <op> B) adds 51c53a0791cd Add apple-specific missing include adds 2a9e33db4f0a Add ms-specific missing header in Support/InitLLVM.cpp adds 622354a52207 [llvm][ADT] Implement `BitVector::{pop_,}back` adds 7e3bcae5069f Add apple-specific missing header in Support/GraphWriter.cpp adds d5ae039ed7b8 [SystemZ] Properly register machine passes. adds e9211e039377 Remove dependency from raw_ostream on <chrono> adds ad43217a0466 [InstCombine] Fold for masked gather when loading the same [...] adds 4d82ae67b208 Add security group 2021 transparency report. adds b8102449a72c [clang-tidy] Avoid binding nullptr to a reference adds e5fd3a7df917 Try to unbreak build on Windows after e9211e03937 adds 8bc661894299 Add missing llvm/support/Regex.h include in polly/lib/Anal [...] adds 3c9e3dada916 Try to unbreak build on Windows more after e9211e03937 adds 9900acacfb3f [libcxx][doc][nfc] Fixed typo in doc adds 9d3437fbf341 [ADT] [NFC] Add StringRef::detectEOL adds 5597ec2dc4f8 Include missing "llvm/Support/Path.h" in "flang/lib/Fronte [...] adds f24fe96f469b [ifs] Use a tmp file instead of "-" adds cab961693802 [libc++] Use addressof in unordered_map. adds b7fd91c84b4e Upstream MLIR PyTACO implementation. adds e4a556268ea9 Revert "[libc++] Use addressof in unordered_map." adds 23a7bb541dae [clang-format] Fix comment in spaceRequiredBefore. NFC. adds 565963841880 Revert "[compiler-rt][cmake] Use HandleOutOfTreeLLVM like [...] adds 26cbc430197a [flang] Remove target and require shell adds 10e5c513b59b Revert "[cmake] Duplicate `{llvm,compiler_rt}_check_linker [...] adds 5061eb6b0121 [Sparc] Don't define __sparcv9 and __sparcv9__ when targeting V8+ adds e6ceec9c1d19 [Clang][RISCV] Restrict rvv builtins with zve macros adds 754d6af7c359 [NFC] Improve code reuse. adds 11754a4dbbad [RISCV] Use RVBUnary in more places to simplify some table [...] adds 4710750854ce [mlir][spirv] Support size-1 vector inserts during conversion adds fd0c6f53913f [mlir] Move linalg::PadTensorOp to tensor::PadOp. adds 3c90ae5d0b71 Revert "[flang] Update tco tool pipline and add translatio [...] adds 48132bb1e437 [RISCV] Simplify interface to combineMUL_VLToVWMUL. NFC adds d6e2c95d2252 [libc++] Use addressof in unordered_map. adds 4d0a18d06e8e [mlir][sparse] Adding assertions for overhead storage types adds cb8b94f6efa9 [AArch64] Add extra tests useful in testing hadd. NFC adds f18fcdabda72 [BOLT][NFC] Expand auto types pt.2 adds 5a654b01133f [BOLT] Make ICP target selection (more) deterministic adds f8c7fb499be6 [BOLT][NFC] Reduce includes with include-what-you-use adds 2f9f9afa4e12 [mlir] Add polynomial approximation for atan and atan2 adds 0d9cc6995401 [Support] Update missed tests with lazy caching behavior. adds cd4e600f5f5c [Sema] Warn about printf %n on Android and Fuchsia adds 0379459fc586 [RISCV] Strengthen a SDTypeProfile. Fix formatting. adds 4f8ea3c84f3d [SystemZ][z/OS][NFC] Remove extra symbol adds d84d1135d80c Emit swift5 reflection section data in dsym bundle generat [...] adds 9f4cc5a6bb56 [gn build] Set HAVE_MALLINFO2=1 adds 6103b2d45bfb Revert "Emit swift5 reflection section data in dsym bundle [...] adds e39c262979e6 Revert "[gn build] Set HAVE_MALLINFO2=1" adds 705d8c49f9be [x86] regenerate smul-with-overflow.ll; add test which fai [...] adds 6df05697ca1d [gn build] Set HAVE_MALLINFO2=1 adds 653b007dc186 [CodeComplete] fix nullptr crash in 612f5ed8823120 adds b796709a62da Only run MLIR PyTACO tests when python bindings are enabled. adds ba093fe58b15 Fix a commit. adds 6ba1fb04214b [llvm-pdbutil] Fix gaps ouput. adds 58ee14e29e98 [lldb] Fix timer logging inverted quiet condition adds efa15f417847 [mlir][sparse] add ability for sparse tensor output adds 10d0d8c0c1db [clang][cmake] Use `GNUInstallDirs` to support custom inst [...] adds 1613f8b8d7d5 NFC (build fix): Add header for llvm::errs(). adds 08574ce4d625 [mlir][tosa] Add clamp + clamp as single clamp canonicalization adds 13fa17db3a72 [split-file] Respect input file's line endings adds 4f547ee8b8a7 [libc++][test] Add const and reference tests for enable_vi [...] adds 9cddfe3085c4 [CMake] Passthrough OSX CMake options to builtins and runtimes adds e6cdef187ed3 [XRay][test] Clean up llc RUN lines adds 04eb93b1d559 [flang] Fix repeated "DT" editing adds db07e082abaf [TSan] Omit vfork interceptor iOS simulator runtime adds 3726626a26ec [flang] Fix crash from USE-associated defined I/O subprograms adds b95150418fb6 [lldb] Allow aliases to aliases of raw input commands adds e796eaf2af65 [RISCV][RFC] add MC support for zbkc subextension adds b1856009fbc1 [flang] Allow INQUIRE() on a child unit in user-defined I/ [...] adds 55d887b83364 [time-trace] Add optimizer and codegen regions to NPM adds b6098c07cb20 [MLIR] Fix negative gcd in `normalizeDivisionByGCD` function. adds de8723829515 [JITLink] Add anonymous symbols in LinkGraph for unnamed t [...] adds fdb6578514dd Revert "[JITLink] Add anonymous symbols in LinkGraph for u [...] adds f7d4cafe5a6a [JITLink][RISCV] Support R_RISCV_SET* and R_RISCV_32_PCREL [...] adds 26544b98f7bf [libc++] Use addressof in unordered_set. adds 4041354b4c12 [mlir] Add SingleBlockImplicitTerminator<"tensor::YieldOp" [...] adds 93deac2e2ba9 [AArch64] Optimize add/sub with immediate through MIPeepholeOpt adds 0283b07746e8 reapply de872382951 "[JITLink] Add anonymous symbols in Li [...] adds b27e5459d51f [DAG] Convert truncstore(extend(x)) back to store(x) adds 8dedf9b58bff [PowerPC] Change CTR clobber estimation for 128-bit floati [...] adds 00d68c3824bf [PowerPC] Support parsing GNU attributes in MC adds 5f2854f1daa7 [LV] Always create VPWidenCanonicalIVRecipe, optimize away later. adds 26fffc1b8e75 [libc++] [test] {cpo,niebloid}.compile.pass.cpp: Also test [...] adds e9d0f8baf236 [flang] Don't drop format string for external child I/O adds 896a543e72fd [flang] Support DECIMAL='COMMA' mode in namelist I/O adds 0a6b4258ab0e [openmp][cmake] Use `GNUInstallDirs` to support custom ins [...] adds d44b6be6eaa8 [RISCV] Don't Custom legalize f16/f32/f64 bitcasts if thos [...] adds 39e602b6c433 [InstCombine] try to fold binop with phi operands adds 7c16647c3676 [clang-tools-extra][cmake] Use `GNUInstallDirs` to support [...] adds c1988dbf2d19 [openmp] Allow x87 fp functions only in Openmp runtime for x86. adds b8467952404c [docs] [clang] Small documentation change for compilation [...] adds 37d1d02200b9 [X86][MS] Change the alignment of f80 to 16 bytes on Windo [...] adds 2513b7903063 [libc++] Implement LWG3549: view_interface need not inheri [...] adds 3cf15af2daa9 [RISCV] Remove experimental prefix from rvv-related extensions. adds 85e42db1b6db [RISCV] Merge some rvv intrinsic test cases that only diff [...] adds be6070c290e2 [RISCV] Use FP ABI for some RVV intrinsic tests. NFC adds 3dc6fd515135 [llvm-objcopy][MachO] Implement --update-section adds a4f202549208 [X86] Regenerate avx512-mask-op.ll adds ff05b93a02d1 [llvm-objdump] Use cast<> instead of dyn_cast<> to avoid d [...] adds 20d46fbd4a51 [CodeGenPrepare] Use dyn_cast result to check for null pointers adds 946f29028e06 [llvm-objdump] Use cast<> instead of dyn_cast<> to avoid d [...] adds 86497026a266 [clang-tidy] Use cast<>/castAs<> instead of dyn_cast<>/get [...] adds df0fd1c301d6 [clangd] Use castAs<> instead of getAs<> to avoid derefere [...] adds c93491352cf3 [lldb] CxxModuleHandler - use cast<> instead of dyn_cast<> [...] adds d7aa402b4b8a [lldb] PdbAstBuilder - use cast<> instead of dyn_cast<> to [...] adds d13847bbe5e6 [lldb] TerminalState::Save - fix unused variable warning adds 49d38b1d618c Fix "not all control paths return a value" warning. NFC. adds 938944445a1b [libc++] Mark LWG3541 as "Complete". NFC. adds 5d78fef6db15 [libc++] Fix LWG3437 "__cpp_lib_polymorphic_allocator is i [...] adds d4ed3eff9f9c [X86] Add vector signbit parity checks for non-popcnt targets adds eb3f20e8fa4b [clang-tidy] Remove gsl::at suggestion from cppcoreguideli [...] adds 153359180a9d [AVR] Remove regalloc workaround for LDDWRdPtrQ adds 116ab78694dd [AVR] Make use of the constant value 0 in R1 adds 7c66aaddb128 [DAG] Fold (X & Y) != 0 --> zextOrTrunc(X & Y) iff everyth [...] adds 2e26633af0c8 [IR] document and update ctlz/cttz intrinsics to optionall [...] adds d2e8fb331835 [clang-tidy] Add readability-duplicate-include check adds 6605057992b1 Revert rG7c66aaddb128dc0f342830c1efaeb7a278bfc48c "[DAG] F [...] adds 631f3e621586 [gn build] Port d2e8fb331835 adds accc07e65465 [DAG] Fold (X & Y) != 0 --> zextOrTrunc(X & Y) iff everyth [...] adds 0b799791807e [RISCV] Merge some rvv intrinsic test cases that only diff [...] adds f69379d0a43b [InstCombine] Add test coverage for PR48683 adds 818cfb10c574 [libcxx][test] Make MSVC `<charconv>` test compile when te [...] adds 8e382ae91b97 [Support] Simplify parallelForEach{,N} adds 1a5dea9e2b97 [NewGVN][NFC] precommit tests for PR53277 adds 7a29b0b58383 [llvm] Fix header guards (NFC) adds abb0ed44957c [Commands] Remove redundant member initialization (NFC) adds f8ddcb413125 [Object] Remove a redundant return statement (NFC) adds ad36f37ce2b4 [MLIR][Presburger] Clean PresburgerSet identifier interfac [...] adds 413684313d9d [RISCV] Adjust the header comment in RISCVInstrInfoZb.td t [...] adds 32dc14f876c4 [X86] LowerFunnelShift - use supportedVectorShiftWithBaseA [...] adds ab1add6adc44 [clang] Move the definition of ASTDiff (NFC) adds ee591a64a795 [clang] Forward-declare DynTypedNode (NFC) adds e59964b67e02 [clang] Remove unused forward declarations (NFC) adds 4762c077e710 [X86] LowerFunnelShift - always lower vXi8 fshl by constan [...] adds 88f33cff4bee [RISCV] Add bitreverse tests to bswap-ctlz-cttz-ctpop.ll. [...] adds 3575700b286f [RISCV] Add tests that do a bitreverse before or after a b [...] adds 47d7e922d843 [mlir] Ensure a newline at the end of a file (NFC) adds fa90fc6e0566 [Sema] Fix a bugprone argument comment (NFC) adds 448d0dfab701 [Analysis] Remove a redundant const from a return type (NFC) adds ab4756338c5b DebugInfo: Don't put types in type units if they reference [...] adds 7c77df1528c8 [X86] Add some basic tests for PR46809 adds 2e58a1891086 DebugInfo: Include template parameters for simplified temp [...] adds 3a3af2bbc97e [C++20] [Module] fix bug 47716 and implement [module.inter [...]
No new revisions were added by this update.
Summary of changes: bolt/include/bolt/Core/BinaryContext.h | 3 +- bolt/include/bolt/Core/BinaryData.h | 1 - bolt/include/bolt/Core/DebugData.h | 3 - bolt/include/bolt/Passes/AllocCombiner.h | 2 - bolt/include/bolt/Rewrite/DWARFRewriter.h | 3 +- bolt/lib/Core/BinaryFunction.cpp | 5 +- bolt/lib/Core/DebugData.cpp | 7 +- bolt/lib/Core/JumpTable.cpp | 1 - bolt/lib/Passes/IndirectCallPromotion.cpp | 24 +- bolt/lib/Passes/ThreeWayBranch.cpp | 2 - bolt/lib/Profile/YAMLProfileWriter.cpp | 2 +- bolt/lib/Rewrite/DWARFRewriter.cpp | 4 +- bolt/lib/Rewrite/MachORewriteInstance.cpp | 2 - bolt/lib/Rewrite/RewriteInstance.cpp | 2 - bolt/lib/Utils/Utils.cpp | 1 - clang-tools-extra/CMakeLists.txt | 1 + clang-tools-extra/clang-doc/tool/CMakeLists.txt | 4 +- .../find-all-symbols/tool/CMakeLists.txt | 2 +- .../clang-include-fixer/tool/CMakeLists.txt | 4 +- clang-tools-extra/clang-tidy/CMakeLists.txt | 2 +- .../abseil/DurationFactoryScaleCheck.cpp | 2 +- .../ProBoundsConstantArrayIndexCheck.cpp | 3 +- .../clang-tidy/performance/MoveConstArgCheck.cpp | 119 +- .../clang-tidy/performance/MoveConstArgCheck.h | 2 + .../clang-tidy/readability/CMakeLists.txt | 1 + .../readability/DuplicateIncludeCheck.cpp | 116 + .../clang-tidy/readability/DuplicateIncludeCheck.h | 35 + .../clang-tidy/readability/FunctionSizeCheck.cpp | 3 +- .../readability/ReadabilityTidyModule.cpp | 3 + .../readability/SuspiciousCallArgumentCheck.cpp | 4 +- clang-tools-extra/clang-tidy/tool/CMakeLists.txt | 4 +- clang-tools-extra/clangd/ClangdServer.cpp | 2 +- clang-tools-extra/clangd/DumpAST.h | 1 + clang-tools-extra/clangd/HeuristicResolver.cpp | 5 +- clang-tools-extra/clangd/Hover.cpp | 2 +- clang-tools-extra/clangd/SourceCode.cpp | 3 +- clang-tools-extra/clangd/index/Background.cpp | 2 +- clang-tools-extra/docs/ReleaseNotes.rst | 14 + ...eguidelines-pro-bounds-constant-array-index.rst | 2 + clang-tools-extra/docs/clang-tidy/checks/list.rst | 1 + .../checks/readability-duplicate-include.rst | 35 + clang-tools-extra/modularize/CMakeLists.txt | 2 +- .../readability-duplicate-include.h | 15 + .../readability-duplicate-include2.h | 1 + .../readability-duplicate-include/system/iostream | 1 + .../readability-duplicate-include/system/string.h | 1 + .../system/sys/types.h | 1 + .../readability-duplicate-include/system/types.h | 1 + ...s-pro-bounds-constant-array-index-gslheader.cpp | 6 +- ...eguidelines-pro-bounds-constant-array-index.cpp | 6 +- .../checkers/performance-move-const-arg.cpp | 94 + .../checkers/readability-duplicate-include.cpp | 72 + clang/CMakeLists.txt | 14 +- clang/cmake/modules/AddClang.cmake | 5 +- clang/cmake/modules/CMakeLists.txt | 4 +- clang/docs/JSONCompilationDatabase.rst | 4 + clang/include/clang/AST/ASTContext.h | 1 - clang/include/clang/AST/DeclBase.h | 14 + clang/include/clang/AST/FormatString.h | 3 +- clang/include/clang/Basic/CodeGenOptions.def | 2 + clang/include/clang/Basic/DiagnosticSemaKinds.td | 8 + clang/include/clang/Driver/Options.td | 2 + clang/include/clang/Sema/Sema.h | 2 + clang/include/clang/Tooling/ASTDiff/ASTDiff.h | 28 +- .../clang/Tooling/ASTDiff/ASTDiffInternal.h | 3 - .../DependencyScanningFilesystem.h | 347 ++- clang/lib/AST/DeclBase.cpp | 9 + clang/lib/AST/OSLog.cpp | 4 +- clang/lib/AST/PrintfFormatString.cpp | 2 +- clang/lib/Basic/Targets/AArch64.h | 1 + clang/lib/Basic/Targets/ARM.h | 1 + clang/lib/Basic/Targets/Sparc.cpp | 2 - clang/lib/Basic/Targets/X86.h | 11 +- clang/lib/CodeGen/BackendUtil.cpp | 14 +- clang/lib/CodeGen/CodeGenModule.cpp | 3 + clang/lib/Driver/SanitizerArgs.cpp | 1 + clang/lib/Driver/ToolChains/Arch/AArch64.cpp | 1 + clang/lib/Driver/ToolChains/Arch/ARM.cpp | 1 + clang/lib/Driver/ToolChains/Arch/ARM.h | 1 + clang/lib/Driver/ToolChains/Clang.cpp | 3 + clang/lib/Format/TokenAnnotator.cpp | 2 +- clang/lib/Format/UnwrappedLineParser.cpp | 4 +- clang/lib/Format/UnwrappedLineParser.h | 3 +- clang/lib/Frontend/CompilerInvocation.cpp | 3 + clang/lib/Frontend/Rewrite/InclusionRewriter.cpp | 20 +- clang/lib/Sema/SemaChecking.cpp | 24 +- clang/lib/Sema/SemaCodeComplete.cpp | 7 +- clang/lib/Sema/SemaDecl.cpp | 49 +- clang/lib/Sema/SemaDeclCXX.cpp | 2 +- clang/lib/Sema/SemaTemplate.cpp | 2 +- clang/lib/Sema/SemaTemplateDeduction.cpp | 2 +- .../DependencyScanningFilesystem.cpp | 255 +- clang/test/CXX/module/module.interface/p2-2.cpp | 37 + clang/test/CXX/module/module.interface/p6.cpp | 93 + clang/test/ClangScanDeps/modules-symlink.c | 54 + .../CodeGen/RISCV/riscv-attr-builtin-alias-err.c | 2 +- .../test/CodeGen/RISCV/riscv-attr-builtin-alias.c | 2 +- clang/test/CodeGen/RISCV/riscv-inline-asm-rvv.c | 4 +- clang/test/CodeGen/RISCV/riscv-v-debuginfo.c | 2 +- clang/test/CodeGen/RISCV/riscv-v-lifetime.cpp | 2 +- .../RISCV/rvv-intrinsics-overloaded/vaadd.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vadc.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vadd.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vand.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vasub.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vcompress.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vcpop.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vdiv.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfabs.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfadd.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfclass.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfcvt.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfdiv.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfirst.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfmacc.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfmadd.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfmax.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfmerge.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfmin.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfmsac.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfmsub.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfmul.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vfmv.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfncvt.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfneg.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfnmacc.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfnmadd.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfnmsac.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfnmsub.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfrdiv.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfrec7.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfredmax.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfredmin.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfredsum.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfrsqrt7.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfrsub.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfsgnj.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfslide1down.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfslide1up.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfsqrt.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfsub.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfwadd.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfwcvt.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfwmacc.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfwmsac.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfwmul.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfwnmacc.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfwnmsac.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfwredsum.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfwsub.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vget.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vid.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/viota.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vle.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vlmul.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vloxei.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vloxseg.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vlse.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vlseg.c | 4 +- .../RISCV/rvv-intrinsics-overloaded/vlsegff.c | 4 +- .../RISCV/rvv-intrinsics-overloaded/vlsseg.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vluxei.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vluxseg.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmacc.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmadc.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmadd.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmand.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vmax.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmerge.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmfeq.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmfge.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmfgt.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmfle.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmflt.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmfne.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vmin.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vmmv.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmnand.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmnor.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmnot.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vmor.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmsbc.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmsbf.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmseq.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmsge.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmsgt.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmsif.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmsle.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmslt.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmsne.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmsof.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vmul.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vmv.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmxnor.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmxor.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vnclip.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vncvt.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vneg.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vnmsac.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vnmsub.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vnot.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vnsra.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vnsrl.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vor.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vredand.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vredmax.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vredmin.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vredor.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vredsum.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vredxor.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vreinterpret.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vrem.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vrgather.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vrsub.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vsadd.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vsbc.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vse.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vset.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vsext.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vslide1down.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vslide1up.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vslidedown.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vslideup.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vsll.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vsmul.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vsoxei.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vsoxseg.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vsra.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vsrl.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vsse.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vsseg.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vssra.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vssrl.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vssseg.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vssub.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vsub.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vsuxei.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vsuxseg.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vwadd.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vwcvt.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vwmacc.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vwmul.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vwredsum.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vwsub.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vxor.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vzext.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vaadd.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vadc.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vadd.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vand.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vasub.c | 2 +- .../test/CodeGen/RISCV/rvv-intrinsics/vcompress.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vcpop.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vdiv.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfabs.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfadd.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfclass.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfcvt.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfdiv.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfirst.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfmacc.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfmadd.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfmax.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfmerge.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfmin.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfmsac.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfmsub.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfmul.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfmv.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfncvt.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfneg.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfnmacc.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfnmadd.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfnmsac.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfnmsub.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfrdiv.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfrec7.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfredmax.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfredmin.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfredsum.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfrsqrt7.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfrsub.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfsgnj.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics/vfslide1down.c | 2 +- .../test/CodeGen/RISCV/rvv-intrinsics/vfslide1up.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfsqrt.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfsub.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfwadd.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfwcvt.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfwmacc.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfwmsac.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfwmul.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfwnmacc.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfwnmsac.c | 2 +- .../test/CodeGen/RISCV/rvv-intrinsics/vfwredsum.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfwsub.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vget.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vid.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/viota.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vle.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vleff.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vlmul.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vloxei.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vloxseg.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vlse.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vlseg.c | 4 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vlsegff.c | 4 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vlsseg.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vluxei.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vluxseg.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmacc.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmadc.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmadd.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmand.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmax.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmclr.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmerge.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmfeq.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmfge.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmfgt.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmfle.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmflt.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmfne.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmin.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmmv.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmnand.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmnor.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmnot.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmor.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmsbc.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmsbf.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmseq.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmset.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmsge.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmsgt.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmsif.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmsle.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmslt.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmsne.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmsof.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmul.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmv.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmxnor.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmxor.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vnclip.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vncvt.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vneg.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vnmsac.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vnmsub.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vnot.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vnsra.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vnsrl.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vor.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vredand.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vredmax.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vredmin.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vredor.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vredsum.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vredxor.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics/vreinterpret.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vrem.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vrgather.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vrsub.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsadd.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsbc.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vse.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vset.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsetvl.c | 2 +- .../test/CodeGen/RISCV/rvv-intrinsics/vsetvlmax.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsext.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics/vslide1down.c | 2 +- .../test/CodeGen/RISCV/rvv-intrinsics/vslide1up.c | 2 +- .../test/CodeGen/RISCV/rvv-intrinsics/vslidedown.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vslideup.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsll.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsmul.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsoxei.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsoxseg.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsra.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsrl.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsse.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsseg.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vssra.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vssrl.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vssseg.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vssub.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsub.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsuxei.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsuxseg.c | 2 +- .../test/CodeGen/RISCV/rvv-intrinsics/vundefined.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vwadd.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vwcvt.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vwmacc.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vwmul.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vwredsum.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vwsub.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vxor.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vzext.c | 2 +- clang/test/CodeGen/RISCV/rvv_errors.c | 2 +- clang/test/CodeGen/target-data.c | 2 +- clang/test/Driver/riscv-arch.c | 49 +- clang/test/FixIt/format.m | 16 +- clang/test/Headers/riscv-vector-header.c | 2 +- clang/test/InterfaceStubs/object.c | 3 +- clang/test/Preprocessor/predefined-arch-macros.c | 4 +- clang/test/Preprocessor/riscv-target-features.c | 98 +- clang/test/Sema/format-strings.c | 84 +- clang/test/Sema/riscv-types.c | 2 +- clang/tools/c-index-test/CMakeLists.txt | 2 +- clang/tools/clang-format/CMakeLists.txt | 12 +- clang/tools/clang-nvlink-wrapper/CMakeLists.txt | 2 +- clang/tools/clang-rename/CMakeLists.txt | 4 +- clang/tools/libclang/BuildSystem.cpp | 1 + clang/tools/libclang/CMakeLists.txt | 2 +- clang/tools/scan-build-py/CMakeLists.txt | 6 +- clang/tools/scan-build/CMakeLists.txt | 6 +- clang/tools/scan-view/CMakeLists.txt | 4 +- clang/unittests/Tooling/DependencyScannerTest.cpp | 4 + clang/utils/TableGen/RISCVVEmitter.cpp | 74 +- clang/utils/hmaptool/CMakeLists.txt | 2 +- cmake/Modules/CheckLinkerFlag.cmake | 17 + compiler-rt/CMakeLists.txt | 17 +- compiler-rt/cmake/config-ix.cmake | 20 +- .../lib/tsan/rtl/tsan_interceptors_posix.cpp | 2 + flang/docs/FIRArrayOperations.md | 342 +++ flang/lib/Frontend/CompilerInvocation.cpp | 1 + flang/lib/Semantics/runtime-type-info.cpp | 2 +- flang/runtime/descriptor-io.cpp | 2 +- flang/runtime/descriptor-io.h | 1 + flang/runtime/edit-input.cpp | 10 +- flang/runtime/format-implementation.h | 137 +- flang/runtime/format.h | 14 +- flang/runtime/io-api.cpp | 51 +- flang/runtime/io-error.cpp | 8 +- flang/runtime/io-stmt.cpp | 5 +- flang/runtime/io-stmt.h | 12 +- flang/runtime/namelist.cpp | 17 +- flang/runtime/unit.h | 2 +- flang/unittests/Runtime/Namelist.cpp | 31 + libc/config/linux/api.td | 4 +- libc/include/CMakeLists.txt | 4 +- libc/include/llvm-libc-types/CMakeLists.txt | 4 +- .../{__sigaction.h => struct_sigaction.h} | 0 libc/include/llvm-libc-types/{tm.h => struct_tm.h} | 0 libcxx/cmake/config-ix.cmake | 4 +- libcxx/docs/DesignDocs/UniquePtrTrivialAbi.rst | 2 +- libcxx/docs/Status/Cxx2bIssues.csv | 8 +- libcxx/include/__hash_table | 40 +- libcxx/include/__iterator/readable_traits.h | 10 +- libcxx/include/__locale | 4 +- libcxx/include/__ranges/enable_view.h | 12 +- libcxx/include/__ranges/view_interface.h | 3 +- libcxx/include/unordered_map | 21 +- libcxx/include/unordered_set | 15 +- libcxx/include/version | 2 +- .../iterator.operators.addressof.compile.pass.cpp | 49 + .../assign_move.addressof.compile.pass.cpp | 42 + .../move.addressof.compile.pass.cpp | 33 + .../move_alloc.addressof.compile.pass.cpp | 36 + .../emplace_hint.addressof.compile.pass.cpp | 30 + .../erase_const_iter.addressof.compile.pass.cpp | 27 + .../erase_range.addressof.compile.pass.cpp | 27 + ...rt_hint_const_lvalue.addressof.compile.pass.cpp | 28 + ...tructible_value_type.addressof.compile.pass.cpp | 28 + ...rt_rvalue_value_type.addressof.compile.pass.cpp | 28 + .../try_emplace_hint.addressof.compile.pass.cpp | 40 + .../unord.map.swap/swap.addressof.compile.pass.cpp | 29 + .../move.addressof.compile.pass.cpp | 33 + .../move_alloc.addressof.compile.pass.cpp | 36 + .../emplace_hint.addressof.compile.pass.cpp | 30 + .../move.addressof.compile.pass.cpp | 29 + .../move_alloc.addressof.compile.pass.cpp | 33 + .../emplace_hint.addressof.compile.pass.cpp | 30 + ...rt_hint_const_lvalue.addressof.compile.pass.cpp | 28 + .../insert_hint_rvalue.addressof.compile.pass.cpp | 27 + .../iterator.operators.addressof.compile.pass.cpp | 47 + .../move.addressof.compile.pass.cpp | 29 + .../move_alloc.addressof.compile.pass.cpp | 35 + .../support.limits.general/memory.version.pass.cpp | 39 - .../cpo.compile.pass.cpp | 3 + .../niebloid.compile.pass.cpp | 1 + .../range.view/enable_view.compile.pass.cpp | 65 +- .../view.interface/view.interface.pass.cpp | 9 + .../utilities/charconv/charconv.msvc/test.pass.cpp | 5 + .../generate_feature_test_macro_components.py | 2 +- libunwind/cmake/config-ix.cmake | 8 +- lldb/source/Commands/CommandCompletions.cpp | 2 +- lldb/source/Commands/CommandObjectBreakpoint.cpp | 56 +- .../Commands/CommandObjectBreakpointCommand.cpp | 9 +- lldb/source/Commands/CommandObjectCommands.cpp | 34 +- lldb/source/Commands/CommandObjectDisassemble.cpp | 3 +- lldb/source/Commands/CommandObjectExpression.cpp | 6 +- lldb/source/Commands/CommandObjectFrame.cpp | 18 +- lldb/source/Commands/CommandObjectHelp.cpp | 3 +- lldb/source/Commands/CommandObjectHelp.h | 2 +- lldb/source/Commands/CommandObjectLog.cpp | 5 +- lldb/source/Commands/CommandObjectMemory.cpp | 25 +- lldb/source/Commands/CommandObjectMemoryTag.cpp | 5 +- lldb/source/Commands/CommandObjectPlatform.cpp | 36 +- lldb/source/Commands/CommandObjectProcess.cpp | 45 +- lldb/source/Commands/CommandObjectRegexCommand.cpp | 2 +- lldb/source/Commands/CommandObjectRegister.cpp | 6 +- lldb/source/Commands/CommandObjectReproducer.cpp | 6 +- lldb/source/Commands/CommandObjectScript.h | 2 +- lldb/source/Commands/CommandObjectSession.cpp | 6 +- lldb/source/Commands/CommandObjectSettings.cpp | 15 +- lldb/source/Commands/CommandObjectSource.cpp | 12 +- lldb/source/Commands/CommandObjectStats.cpp | 2 +- lldb/source/Commands/CommandObjectTarget.cpp | 50 +- lldb/source/Commands/CommandObjectThread.cpp | 43 +- lldb/source/Commands/CommandObjectTrace.cpp | 15 +- lldb/source/Commands/CommandObjectType.cpp | 44 +- lldb/source/Commands/CommandObjectWatchpoint.cpp | 26 +- .../Commands/CommandObjectWatchpointCommand.cpp | 5 +- lldb/source/Commands/CommandOptionsProcessLaunch.h | 2 +- lldb/source/Host/common/Socket.cpp | 1 + lldb/source/Host/common/Terminal.cpp | 2 +- .../ExpressionParser/Clang/CxxModuleHandler.cpp | 2 +- .../Plugins/Language/CPlusPlus/GenericBitset.cpp | 1 + .../Plugins/SymbolFile/NativePDB/PdbAstBuilder.cpp | 4 +- lldb/source/Utility/Timer.cpp | 4 +- .../command/nested_alias/TestNestedAlias.py | 7 + lldb/tools/lldb-vscode/FifoFiles.h | 2 + llvm/.gitattributes | 2 + llvm/cmake/modules/LLVMCheckLinkerFlag.cmake | 12 +- llvm/cmake/modules/LLVMInstallSymlink.cmake | 3 +- llvm/docs/CommandGuide/llvm-mca.rst | 4 +- llvm/docs/LangRef.rst | 42 +- llvm/docs/ORCv2.rst | 92 + llvm/docs/Reference.rst | 1 + llvm/docs/Security.rst | 2 + llvm/docs/SecurityTransparencyReports.rst | 44 + llvm/include/llvm/ADT/BitVector.h | 12 + llvm/include/llvm/ADT/Optional.h | 1 - llvm/include/llvm/ADT/SmallBitVector.h | 12 + llvm/include/llvm/ADT/SmallVector.h | 2 - llvm/include/llvm/ADT/StringRef.h | 19 + .../include/llvm/Analysis/NoInferenceModelRunner.h | 2 +- .../include/llvm/Analysis/ReleaseModeModelRunner.h | 6 + llvm/include/llvm/Debuginfod/Debuginfod.h | 2 + llvm/include/llvm/Debuginfod/HTTPClient.h | 2 + llvm/include/llvm/Demangle/ItaniumDemangle.h | 9 +- llvm/include/llvm/Demangle/MicrosoftDemangle.h | 2 - .../include/llvm/Demangle/MicrosoftDemangleNodes.h | 1 - llvm/include/llvm/Demangle/StringView.h | 18 +- llvm/include/llvm/Demangle/Utility.h | 13 +- llvm/include/llvm/ExecutionEngine/JITLink/riscv.h | 32 +- llvm/include/llvm/IR/IntrinsicsAMDGPU.td | 23 +- llvm/include/llvm/MC/MCStreamer.h | 1 + llvm/include/llvm/Object/ELFObjectFile.h | 1 + llvm/include/llvm/ProfileData/MemProfData.inc | 4 +- llvm/include/llvm/Support/AArch64TargetParser.h | 1 - llvm/include/llvm/Support/ARMAttributeParser.h | 7 +- llvm/include/llvm/Support/Allocator.h | 4 - llvm/include/llvm/Support/BinaryStreamReader.h | 2 - llvm/include/llvm/Support/BinaryStreamRef.h | 1 - llvm/include/llvm/Support/BinaryStreamWriter.h | 1 - llvm/include/llvm/Support/BlockFrequency.h | 5 +- llvm/include/llvm/Support/BranchProbability.h | 1 - llvm/include/llvm/Support/Duration.h | 28 + llvm/include/llvm/Support/ELFAttributeParser.h | 3 +- llvm/include/llvm/Support/Error.h | 1 - llvm/include/llvm/Support/ExtensibleRTTI.h | 2 - llvm/include/llvm/Support/FileCollector.h | 1 - llvm/include/llvm/Support/FileUtilities.h | 6 +- llvm/include/llvm/Support/FormatVariadic.h | 3 +- llvm/include/llvm/Support/GraphWriter.h | 2 - .../llvm/Support/ItaniumManglingCanonicalizer.h | 1 - llvm/include/llvm/Support/Parallel.h | 80 +- llvm/include/llvm/Support/RISCVISAInfo.h | 2 - llvm/include/llvm/Support/SymbolRemappingReader.h | 3 +- llvm/include/llvm/Support/TargetParser.h | 2 - llvm/include/llvm/Support/TimeProfiler.h | 3 +- llvm/include/llvm/Support/Timer.h | 2 - llvm/include/llvm/Support/TrigramIndex.h | 1 - llvm/include/llvm/Support/TypeSize.h | 2 +- llvm/include/llvm/Support/YAMLTraits.h | 4 - llvm/include/llvm/Support/raw_ostream.h | 4 +- llvm/lib/Analysis/ConstantFolding.cpp | 23 +- llvm/lib/Analysis/ScalarEvolution.cpp | 2 +- llvm/lib/Analysis/ValueTracking.cpp | 4 +- llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp | 3 +- llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp | 12 +- llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h | 3 + llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp | 24 +- llvm/lib/CodeGen/CodeGenPrepare.cpp | 16 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 9 + llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 19 +- llvm/lib/Debuginfod/Debuginfod.cpp | 2 + llvm/lib/Demangle/ItaniumDemangle.cpp | 2 - llvm/lib/Demangle/MicrosoftDemangleNodes.cpp | 1 - .../ExecutionEngine/JITLink/ELFLinkGraphBuilder.h | 12 +- llvm/lib/ExecutionEngine/JITLink/ELF_riscv.cpp | 43 + llvm/lib/ExecutionEngine/JITLink/riscv.cpp | 10 + llvm/lib/IR/AutoUpgrade.cpp | 31 +- llvm/lib/MC/MCDwarf.cpp | 4 +- llvm/lib/MC/MCParser/MasmParser.cpp | 3 +- llvm/lib/Object/Archive.cpp | 1 - llvm/lib/Object/Object.cpp | 1 + llvm/lib/Support/APInt.cpp | 2 - llvm/lib/Support/ARMAttributeParser.cpp | 2 - llvm/lib/Support/ARMWinEH.cpp | 1 - llvm/lib/Support/BlockFrequency.cpp | 1 + llvm/lib/Support/DAGDeltaAlgorithm.cpp | 1 - llvm/lib/Support/DataExtractor.cpp | 1 - llvm/lib/Support/ELFAttributeParser.cpp | 2 - llvm/lib/Support/FileOutputBuffer.cpp | 2 - llvm/lib/Support/FileUtilities.cpp | 3 - llvm/lib/Support/GraphWriter.cpp | 7 +- llvm/lib/Support/InitLLVM.cpp | 7 +- llvm/lib/Support/JSON.cpp | 1 + llvm/lib/Support/MSP430AttributeParser.cpp | 3 +- llvm/lib/Support/MemoryBuffer.cpp | 5 +- llvm/lib/Support/NativeFormatting.cpp | 1 - llvm/lib/Support/Parallel.cpp | 32 + llvm/lib/Support/PrettyStackTrace.cpp | 5 +- llvm/lib/Support/RISCVISAInfo.cpp | 41 +- llvm/lib/Support/ScopedPrinter.cpp | 1 - llvm/lib/Support/Signals.cpp | 1 + llvm/lib/Support/Signposts.cpp | 1 - llvm/lib/Support/SmallPtrSet.cpp | 1 - llvm/lib/Support/SmallVector.cpp | 1 + llvm/lib/Support/SpecialCaseList.cpp | 1 - llvm/lib/Support/StringMap.cpp | 1 - llvm/lib/Support/SymbolRemappingReader.cpp | 1 + llvm/lib/Support/TargetParser.cpp | 2 - llvm/lib/Support/TimeProfiler.cpp | 2 +- llvm/lib/Support/ToolOutputFile.cpp | 1 - llvm/lib/Support/Triple.cpp | 2 +- llvm/lib/Support/TypeSize.cpp | 1 + llvm/lib/Support/VirtualFileSystem.cpp | 3 - llvm/lib/Support/X86TargetParser.cpp | 1 - llvm/lib/Support/YAMLParser.cpp | 1 - llvm/lib/Support/YAMLTraits.cpp | 2 - llvm/lib/Support/raw_ostream.cpp | 7 +- llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp | 204 +- llvm/lib/Target/AArch64/AArch64Subtarget.cpp | 1 + .../Target/AArch64/AsmParser/AArch64AsmParser.cpp | 1 + .../Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp | 145 +- llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.h | 7 + .../Target/AMDGPU/AMDGPUInstructionSelector.cpp | 24 - llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 43 +- llvm/lib/Target/AMDGPU/MIMGInstructions.td | 48 +- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 38 +- llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp | 1 + llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h | 9 + llvm/lib/Target/ARM/ARMSubtarget.cpp | 1 + llvm/lib/Target/ARM/ARMTargetMachine.cpp | 1 + llvm/lib/Target/AVR/AVRISelLowering.cpp | 14 + llvm/lib/Target/AVR/AVRISelLowering.h | 2 + llvm/lib/Target/AVR/AVRInstrInfo.td | 6 +- llvm/lib/Target/AVR/AVRRegisterInfo.td | 20 - llvm/lib/Target/CSKY/CSKYAsmPrinter.cpp | 30 + llvm/lib/Target/CSKY/CSKYAsmPrinter.h | 1 + llvm/lib/Target/CSKY/CSKYISelLowering.cpp | 115 + llvm/lib/Target/CSKY/CSKYISelLowering.h | 4 + llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp | 12 + llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp | 10 +- llvm/lib/Target/RISCV/RISCV.td | 51 +- llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 54 +- llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td | 12 +- llvm/lib/Target/RISCV/RISCVInstrInfoZb.td | 109 +- llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp | 5 + llvm/lib/Target/RISCV/RISCVRegisterInfo.h | 2 + llvm/lib/Target/RISCV/RISCVRegisterInfo.td | 7 +- llvm/lib/Target/RISCV/RISCVSchedRocket.td | 2 +- llvm/lib/Target/RISCV/RISCVSchedSiFive7.td | 2 +- llvm/lib/Target/RISCV/RISCVSubtarget.h | 4 + llvm/lib/Target/SystemZ/SystemZ.h | 10 + llvm/lib/Target/SystemZ/SystemZCopyPhysRegs.cpp | 10 +- llvm/lib/Target/SystemZ/SystemZElimCompare.cpp | 12 +- llvm/lib/Target/SystemZ/SystemZLDCleanup.cpp | 12 +- llvm/lib/Target/SystemZ/SystemZLongBranch.cpp | 12 +- llvm/lib/Target/SystemZ/SystemZPostRewrite.cpp | 10 +- llvm/lib/Target/SystemZ/SystemZShortenInst.cpp | 17 +- llvm/lib/Target/SystemZ/SystemZTDC.cpp | 4 - llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp | 8 + llvm/lib/Target/VE/VECustomDAG.cpp | 30 + llvm/lib/Target/VE/VECustomDAG.h | 6 + llvm/lib/Target/VE/VEISelLowering.cpp | 37 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 33 +- llvm/lib/Target/X86/X86IndirectBranchTracking.cpp | 48 +- llvm/lib/Target/X86/X86TargetMachine.cpp | 2 +- llvm/lib/Transforms/Coroutines/CoroSplit.cpp | 6 +- llvm/lib/Transforms/Coroutines/Coroutines.cpp | 14 +- llvm/lib/Transforms/IPO/AttributorAttributes.cpp | 11 +- .../Transforms/InstCombine/InstCombineAddSub.cpp | 12 + .../Transforms/InstCombine/InstCombineAndOrXor.cpp | 9 + .../Transforms/InstCombine/InstCombineCalls.cpp | 26 +- .../Transforms/InstCombine/InstCombineInternal.h | 10 + .../InstCombine/InstCombineMulDivRem.cpp | 18 + .../Transforms/InstCombine/InstCombineSelect.cpp | 6 +- .../Transforms/InstCombine/InstCombineShifts.cpp | 3 + .../InstCombine/InstructionCombining.cpp | 64 + .../Instrumentation/HWAddressSanitizer.cpp | 17 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 36 +- llvm/lib/Transforms/Vectorize/VPlan.cpp | 8 + llvm/lib/Transforms/Vectorize/VPlan.h | 32 + llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp | 27 + llvm/lib/Transforms/Vectorize/VPlanTransforms.h | 4 + llvm/lib/Transforms/Vectorize/VPlanValue.h | 6 + llvm/runtimes/CMakeLists.txt | 14 +- .../CostModel/RISCV/fixed-vector-gather.ll | 2 +- .../CostModel/RISCV/fixed-vector-scatter.ll | 2 +- llvm/test/Analysis/CostModel/RISCV/rvv-shuffle.ll | 2 +- llvm/test/Bitcode/upgrade-datalayout3.ll | 2 +- llvm/test/Bitcode/upgrade-datalayout4.ll | 8 + llvm/test/CodeGen/AArch64/addsub-24bit-imm.mir | 63 + llvm/test/CodeGen/AArch64/addsub.ll | 96 +- llvm/test/CodeGen/AArch64/arm64-vhadd.ll | 427 +++ .../AArch64/xray-attribute-instrumentation.ll | 2 +- .../CodeGen/AArch64/xray-omit-function-index.ll | 4 +- .../xray-partial-instrumentation-skip-entry.ll | 2 +- .../xray-partial-instrumentation-skip-exit.ll | 2 +- llvm/test/CodeGen/AArch64/xray-tail-call-sled.ll | 2 +- .../AMDGPU/GlobalISel/image_ls_mipmap_zero.a16.ll | 667 ----- .../AMDGPU/GlobalISel/image_ls_mipmap_zero.ll | 403 --- .../llvm.amdgcn.image.sample.ltolz.a16.ll | 565 ---- .../GlobalISel/llvm.amdgcn.image.sample.ltolz.ll | 293 --- llvm/test/CodeGen/AMDGPU/cluster_stores.ll | 19 +- llvm/test/CodeGen/AMDGPU/copy-illegal-type.ll | 15 +- llvm/test/CodeGen/AMDGPU/dagcombine-fma-fmad.ll | 28 +- llvm/test/CodeGen/AMDGPU/image_ls_mipmap_zero.ll | 132 - .../AMDGPU/llvm.amdgcn.image.sample.ltolz.ll | 113 - llvm/test/CodeGen/AMDGPU/skip-if-dead.ll | 9 +- .../ARM/xray-armv6-attribute-instrumentation.ll | 4 +- .../ARM/xray-armv7-attribute-instrumentation.ll | 4 +- llvm/test/CodeGen/ARM/xray-tail-call-sled.ll | 4 +- llvm/test/CodeGen/AVR/lpmx.ll | 22 +- llvm/test/CodeGen/AVR/smul-with-overflow.ll | 2 +- llvm/test/CodeGen/AVR/store-undef.ll | 3 +- llvm/test/CodeGen/AVR/umul-with-overflow.ll | 2 +- llvm/test/CodeGen/CSKY/tls-models.ll | 179 ++ llvm/test/CodeGen/Hexagon/xray-pred-ret.ll | 2 +- llvm/test/CodeGen/Hexagon/xray.ll | 4 +- .../Mips/xray-mips-attribute-instrumentation.ll | 8 +- llvm/test/CodeGen/Mips/xray-section-group.ll | 8 +- llvm/test/CodeGen/PowerPC/ctrloop-fp128.ll | 52 +- .../PowerPC/xray-attribute-instrumentation.ll | 5 +- .../CodeGen/PowerPC/xray-conditional-return.ll | 2 +- .../test/CodeGen/PowerPC/xray-ret-is-terminator.ll | 2 +- llvm/test/CodeGen/PowerPC/xray-tail-call-hidden.ll | 2 +- llvm/test/CodeGen/PowerPC/xray-tail-call-sled.ll | 2 +- llvm/test/CodeGen/RISCV/add-before-shl.ll | 20 +- llvm/test/CodeGen/RISCV/addcarry.ll | 30 +- llvm/test/CodeGen/RISCV/atomic-rmw.ll | 2400 ++++++++--------- llvm/test/CodeGen/RISCV/atomic-signext.ll | 480 ++-- llvm/test/CodeGen/RISCV/attributes.ll | 24 +- .../RISCV/bswap-bitreverse-ctlz-cttz-ctpop.ll | 2761 ++++++++++++++++++++ llvm/test/CodeGen/RISCV/bswap-ctlz-cttz-ctpop.ll | 1032 -------- llvm/test/CodeGen/RISCV/callee-saved-gprs.ll | 796 +++--- .../calling-conv-ilp32-ilp32f-ilp32d-common.ll | 76 +- .../RISCV/calling-conv-lp64-lp64f-lp64d-common.ll | 38 +- llvm/test/CodeGen/RISCV/double-arith-strict.ll | 92 +- llvm/test/CodeGen/RISCV/double-arith.ll | 208 +- llvm/test/CodeGen/RISCV/double-convert.ll | 186 +- llvm/test/CodeGen/RISCV/double-fcmp-strict.ll | 64 +- llvm/test/CodeGen/RISCV/double-fcmp.ll | 32 +- llvm/test/CodeGen/RISCV/float-arith-strict.ll | 32 +- llvm/test/CodeGen/RISCV/float-arith.ll | 124 +- llvm/test/CodeGen/RISCV/float-convert.ll | 88 +- llvm/test/CodeGen/RISCV/fp128.ll | 32 +- llvm/test/CodeGen/RISCV/fpclamptosat.ll | 414 +-- llvm/test/CodeGen/RISCV/fpclamptosat_vec.ll | 1177 ++++----- llvm/test/CodeGen/RISCV/half-arith.ll | 708 +++-- llvm/test/CodeGen/RISCV/half-convert.ll | 112 +- llvm/test/CodeGen/RISCV/half-intrinsics.ll | 152 +- llvm/test/CodeGen/RISCV/mul.ll | 388 ++- llvm/test/CodeGen/RISCV/remat.ll | 44 +- llvm/test/CodeGen/RISCV/rv32i-rv64i-half.ll | 24 +- llvm/test/CodeGen/RISCV/rv32zbb-zbp.ll | 30 +- llvm/test/CodeGen/RISCV/rv32zbb.ll | 96 +- llvm/test/CodeGen/RISCV/rv32zbp-intrinsic.ll | 18 + llvm/test/CodeGen/RISCV/rv32zbp.ll | 546 ++-- llvm/test/CodeGen/RISCV/rv32zbt.ll | 28 +- llvm/test/CodeGen/RISCV/rv64i-complex-float.ll | 8 +- llvm/test/CodeGen/RISCV/rv64zbp.ll | 56 +- llvm/test/CodeGen/RISCV/rvv/abs-sdnode.ll | 4 +- .../RISCV/rvv/access-fixed-objects-by-rvv.ll | 2 +- .../CodeGen/RISCV/rvv/addi-scalable-offset.mir | 2 +- llvm/test/CodeGen/RISCV/rvv/allocate-lmul-2-4-8.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/bitreverse-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/bswap-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/calling-conv-fastcc.ll | 90 +- llvm/test/CodeGen/RISCV/rvv/calling-conv.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/combine-sats.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/combine-splats.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/combine-store-fp.ll | 4 +- .../CodeGen/RISCV/rvv/common-shuffle-patterns.ll | 2 +- .../RISCV/rvv/commuted-op-indices-regression.mir | 2 +- llvm/test/CodeGen/RISCV/rvv/constant-folding.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/ctlz-sdnode.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/ctpop-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/cttz-sdnode.ll | 8 +- .../CodeGen/RISCV/rvv/debug-info-rvv-dbg-value.mir | 4 +- llvm/test/CodeGen/RISCV/rvv/emergency-slot.mir | 2 +- llvm/test/CodeGen/RISCV/rvv/extload-truncstore.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/extract-subvector.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/extractelt-fp-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/extractelt-fp-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/extractelt-i1.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/extractelt-int-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/extractelt-int-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/fceil-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/ffloor-sdnode.ll | 4 +- .../fixed-vector-strided-load-store-negative.ll | 2 +- .../RISCV/rvv/fixed-vector-strided-load-store.ll | 92 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-abs.ll | 8 +- .../rvv/fixed-vectors-bitcast-large-vector.ll | 6 +- .../CodeGen/RISCV/rvv/fixed-vectors-bitcast.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-bitreverse.ll | 182 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bswap.ll | 88 +- .../RISCV/rvv/fixed-vectors-calling-conv-fastcc.ll | 4 +- .../RISCV/rvv/fixed-vectors-calling-conv.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctlz.ll | 34 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctpop.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz.ll | 86 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-elen.ll | 36 +- .../RISCV/rvv/fixed-vectors-emergency-slot.mir | 2 +- .../RISCV/rvv/fixed-vectors-extload-truncstore.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-extract-i1.ll | 4 +- .../RISCV/rvv/fixed-vectors-extract-subvector.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-extract.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-bitcast.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-buildvec.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-conv.ll | 8 +- .../RISCV/rvv/fixed-vectors-fp-interleave.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-setcc.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-shuffles.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-splat.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-vrgather.ll | 56 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp2i.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-i2fp.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-insert-i1.ll | 4 +- .../RISCV/rvv/fixed-vectors-insert-subvector.ll | 18 +- .../test/CodeGen/RISCV/rvv/fixed-vectors-insert.ll | 4 +- .../RISCV/rvv/fixed-vectors-int-buildvec.ll | 4 +- .../RISCV/rvv/fixed-vectors-int-exttrunc.ll | 12 +- .../RISCV/rvv/fixed-vectors-int-interleave.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-int-setcc.ll | 4 +- .../RISCV/rvv/fixed-vectors-int-shuffles.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-int-splat.ll | 12 +- .../RISCV/rvv/fixed-vectors-int-vrgather.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-marith-vp.ll | 4 +- .../RISCV/rvv/fixed-vectors-mask-buildvec.ll | 28 +- .../RISCV/rvv/fixed-vectors-mask-load-store.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-mask-logic.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-mask-splat.ll | 8 +- .../RISCV/rvv/fixed-vectors-masked-gather.ll | 4 +- .../RISCV/rvv/fixed-vectors-masked-load-fp.ll | 4 +- .../RISCV/rvv/fixed-vectors-masked-load-int.ll | 4 +- .../RISCV/rvv/fixed-vectors-masked-scatter.ll | 4 +- .../RISCV/rvv/fixed-vectors-masked-store-fp.ll | 4 +- .../RISCV/rvv/fixed-vectors-masked-store-int.ll | 4 +- .../RISCV/rvv/fixed-vectors-reduction-fp-vp.ll | 4 +- .../RISCV/rvv/fixed-vectors-reduction-fp.ll | 4 +- .../RISCV/rvv/fixed-vectors-reduction-int-vp.ll | 4 +- .../RISCV/rvv/fixed-vectors-reduction-int.ll | 4 +- .../RISCV/rvv/fixed-vectors-reduction-mask-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-select-fp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-select-int.ll | 4 +- .../RISCV/rvv/fixed-vectors-stepvector-rv32.ll | 4 +- .../RISCV/rvv/fixed-vectors-stepvector-rv64.ll | 4 +- .../RISCV/rvv/fixed-vectors-store-merge-crash.ll | 2 +- .../CodeGen/RISCV/rvv/fixed-vectors-unaligned.ll | 36 +- .../CodeGen/RISCV/rvv/fixed-vectors-vadd-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vand-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vdiv-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vdivu-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vfadd-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vfdiv-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmax.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmin.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vfmul-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vfrdiv-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vfrsub-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vfsub-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vmul-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vnsra-vnsrl.ll | 4 +- .../test/CodeGen/RISCV/rvv/fixed-vectors-vor-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vpgather.ll | 4 +- .../test/CodeGen/RISCV/rvv/fixed-vectors-vpload.ll | 22 +- .../CodeGen/RISCV/rvv/fixed-vectors-vpscatter.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vpstore.ll | 4 +- .../RISCV/rvv/fixed-vectors-vreductions-mask.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-vrem-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vremu-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vrsub-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsadd.ll | 4 +- .../test/CodeGen/RISCV/rvv/fixed-vectors-vsaddu.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vselect-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vselect.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vshl-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vsra-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vsrl-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vssub.ll | 4 +- .../test/CodeGen/RISCV/rvv/fixed-vectors-vssubu.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vsub-vp.ll | 4 +- .../test/CodeGen/RISCV/rvv/fixed-vectors-vwmacc.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vwmaccu.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmul.ll | 4 +- .../test/CodeGen/RISCV/rvv/fixed-vectors-vwmulu.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vxor-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/frameindex-addr.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/ftrunc-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/get-vlen-debugloc.mir | 2 +- llvm/test/CodeGen/RISCV/rvv/inline-asm.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/insert-subvector.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/insertelt-fp-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/insertelt-fp-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/insertelt-i1.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/insertelt-int-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/insertelt-int-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/interleave-crash.ll | 4 +- .../CodeGen/RISCV/rvv/large-rvv-stack-size.mir | 2 +- .../test/CodeGen/RISCV/rvv/legalize-load-sdnode.ll | 4 +- .../RISCV/rvv/legalize-scalable-vectortype.ll | 4 +- .../CodeGen/RISCV/rvv/legalize-store-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/load-add-store-16.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/load-add-store-32.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/load-add-store-64.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/load-add-store-8.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/load-mask.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/localvar.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/marith-vp.ll | 4 +- .../CodeGen/RISCV/rvv/mask-exts-truncs-rv32.ll | 2 +- .../CodeGen/RISCV/rvv/mask-exts-truncs-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/mask-reg-alloc.mir | 2 +- llvm/test/CodeGen/RISCV/rvv/masked-load-fp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/masked-load-int.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/masked-store-fp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/masked-store-int.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/memory-args.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/mgather-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/mscatter-sdnode.ll | 4 +- .../RISCV/rvv/named-vector-shuffle-reverse.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/no-reserved-frame.ll | 10 +- llvm/test/CodeGen/RISCV/rvv/pr52475.ll | 4 +- .../test/CodeGen/RISCV/rvv/reg-alloc-reserve-bp.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/reg-coalescing.mir | 2 +- llvm/test/CodeGen/RISCV/rvv/regalloc-fast-crash.ll | 2 +- .../CodeGen/RISCV/rvv/rv32-spill-vector-csr.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/rv32-spill-vector.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/rv32-spill-zvlsseg.ll | 4 +- .../CodeGen/RISCV/rvv/rv32-vsetvli-intrinsics.ll | 2 +- .../CodeGen/RISCV/rvv/rv64-spill-vector-csr.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/rv64-spill-vector.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/rv64-spill-zvlsseg.ll | 4 +- .../CodeGen/RISCV/rvv/rv64-vsetvli-intrinsics.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/rvv-args-by-mem.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/rvv-framelayout.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/rvv-out-arguments.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/rvv-vscale.i32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/rvv-vscale.i64.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/saddo-sdnode.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/select-fp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/select-int.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/select-sra.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/setcc-fp-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/setcc-fp-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/setcc-integer-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/setcc-integer-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/sink-splat-operands.ll | 1465 ++++++++--- llvm/test/CodeGen/RISCV/rvv/smulo-sdnode.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/stepvector.ll | 4 +- .../RISCV/rvv/tail-agnostic-impdef-copy.mir | 6 +- llvm/test/CodeGen/RISCV/rvv/umulo-sdnode.ll | 2 +- .../CodeGen/RISCV/rvv/unaligned-loads-stores.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/undef-vp-ops.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/urem-seteq-vec.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vaadd-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vaadd-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vaaddu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vaaddu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vadc-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vadc-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vadd-policy.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vadd-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vadd-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vadd-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vadd-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vand-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vand-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vand-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vand-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vasub-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vasub-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vasubu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vasubu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vcompress-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vcompress-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vcpop-rv32.ll | 282 -- llvm/test/CodeGen/RISCV/rvv/vcpop-rv64.ll | 282 -- llvm/test/CodeGen/RISCV/rvv/vcpop.ll | 284 ++ llvm/test/CodeGen/RISCV/rvv/vdiv-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vdiv-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vdiv-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vdiv-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vdivu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vdivu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vdivu-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vdivu-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vexts-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfabs-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfadd-rv32.ll | 1417 ---------- llvm/test/CodeGen/RISCV/rvv/vfadd-rv64.ll | 1386 ---------- llvm/test/CodeGen/RISCV/rvv/vfadd-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfadd-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfadd.ll | 1357 ++++++++++ llvm/test/CodeGen/RISCV/rvv/vfclass-rv32.ll | 692 ----- llvm/test/CodeGen/RISCV/rvv/vfclass-rv64.ll | 692 ----- llvm/test/CodeGen/RISCV/rvv/vfclass.ll | 694 +++++ llvm/test/CodeGen/RISCV/rvv/vfcopysign-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfcvt-f-x-rv32.ll | 617 ----- llvm/test/CodeGen/RISCV/rvv/vfcvt-f-x-rv64.ll | 617 ----- llvm/test/CodeGen/RISCV/rvv/vfcvt-f-x.ll | 619 +++++ llvm/test/CodeGen/RISCV/rvv/vfcvt-f-xu-rv32.ll | 617 ----- llvm/test/CodeGen/RISCV/rvv/vfcvt-f-xu-rv64.ll | 617 ----- llvm/test/CodeGen/RISCV/rvv/vfcvt-f-xu.ll | 619 +++++ llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-x-f-rv32.ll | 617 ----- llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-x-f-rv64.ll | 617 ----- llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-x-f.ll | 619 +++++ llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-xu-f-rv32.ll | 617 ----- llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-xu-f-rv64.ll | 617 ----- llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-xu-f.ll | 619 +++++ llvm/test/CodeGen/RISCV/rvv/vfcvt-x-f-rv32.ll | 617 ----- llvm/test/CodeGen/RISCV/rvv/vfcvt-x-f-rv64.ll | 617 ----- llvm/test/CodeGen/RISCV/rvv/vfcvt-x-f.ll | 619 +++++ llvm/test/CodeGen/RISCV/rvv/vfcvt-xu-f-rv32.ll | 617 ----- llvm/test/CodeGen/RISCV/rvv/vfcvt-xu-f-rv64.ll | 617 ----- llvm/test/CodeGen/RISCV/rvv/vfcvt-xu-f.ll | 619 +++++ llvm/test/CodeGen/RISCV/rvv/vfdiv-rv32.ll | 1417 ---------- llvm/test/CodeGen/RISCV/rvv/vfdiv-rv64.ll | 1385 ---------- llvm/test/CodeGen/RISCV/rvv/vfdiv-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfdiv-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfdiv.ll | 1357 ++++++++++ llvm/test/CodeGen/RISCV/rvv/vfirst-rv32.ll | 282 -- llvm/test/CodeGen/RISCV/rvv/vfirst-rv64.ll | 282 -- llvm/test/CodeGen/RISCV/rvv/vfirst.ll | 284 ++ llvm/test/CodeGen/RISCV/rvv/vfmacc-rv32.ll | 1154 -------- llvm/test/CodeGen/RISCV/rvv/vfmacc-rv64.ll | 1130 -------- llvm/test/CodeGen/RISCV/rvv/vfmacc.ll | 1108 ++++++++ llvm/test/CodeGen/RISCV/rvv/vfmadd-rv32.ll | 1154 -------- llvm/test/CodeGen/RISCV/rvv/vfmadd-rv64.ll | 1130 -------- llvm/test/CodeGen/RISCV/rvv/vfmadd-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfmadd.ll | 1108 ++++++++ llvm/test/CodeGen/RISCV/rvv/vfmax-rv32.ll | 1417 ---------- llvm/test/CodeGen/RISCV/rvv/vfmax-rv64.ll | 1385 ---------- llvm/test/CodeGen/RISCV/rvv/vfmax-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfmax.ll | 1357 ++++++++++ llvm/test/CodeGen/RISCV/rvv/vfmerge-rv32.ll | 933 ------- llvm/test/CodeGen/RISCV/rvv/vfmerge-rv64.ll | 917 ------- llvm/test/CodeGen/RISCV/rvv/vfmerge.ll | 904 +++++++ llvm/test/CodeGen/RISCV/rvv/vfmin-rv32.ll | 1417 ---------- llvm/test/CodeGen/RISCV/rvv/vfmin-rv64.ll | 1385 ---------- llvm/test/CodeGen/RISCV/rvv/vfmin-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfmin.ll | 1357 ++++++++++ llvm/test/CodeGen/RISCV/rvv/vfmsac-rv32.ll | 1154 -------- llvm/test/CodeGen/RISCV/rvv/vfmsac-rv64.ll | 1130 -------- llvm/test/CodeGen/RISCV/rvv/vfmsac.ll | 1108 ++++++++ llvm/test/CodeGen/RISCV/rvv/vfmsub-rv32.ll | 1154 -------- llvm/test/CodeGen/RISCV/rvv/vfmsub-rv64.ll | 1130 -------- llvm/test/CodeGen/RISCV/rvv/vfmsub-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfmsub.ll | 1108 ++++++++ llvm/test/CodeGen/RISCV/rvv/vfmul-rv32.ll | 1417 ---------- llvm/test/CodeGen/RISCV/rvv/vfmul-rv64.ll | 1385 ---------- llvm/test/CodeGen/RISCV/rvv/vfmul-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfmul-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfmul.ll | 1357 ++++++++++ llvm/test/CodeGen/RISCV/rvv/vfmv.f.s.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfmv.s.f-rv32.ll | 197 -- llvm/test/CodeGen/RISCV/rvv/vfmv.s.f-rv64.ll | 197 -- llvm/test/CodeGen/RISCV/rvv/vfmv.s.f.ll | 200 ++ llvm/test/CodeGen/RISCV/rvv/vfmv.v.f-rv32.ll | 482 ---- llvm/test/CodeGen/RISCV/rvv/vfmv.v.f-rv64.ll | 482 ---- llvm/test/CodeGen/RISCV/rvv/vfmv.v.f.ll | 484 ++++ llvm/test/CodeGen/RISCV/rvv/vfncvt-f-f-rv32.ll | 380 --- llvm/test/CodeGen/RISCV/rvv/vfncvt-f-f-rv64.ll | 380 --- llvm/test/CodeGen/RISCV/rvv/vfncvt-f-f.ll | 382 +++ llvm/test/CodeGen/RISCV/rvv/vfncvt-f-x-rv32.ll | 380 --- llvm/test/CodeGen/RISCV/rvv/vfncvt-f-x-rv64.ll | 380 --- llvm/test/CodeGen/RISCV/rvv/vfncvt-f-x.ll | 382 +++ llvm/test/CodeGen/RISCV/rvv/vfncvt-f-xu-rv32.ll | 380 --- llvm/test/CodeGen/RISCV/rvv/vfncvt-f-xu-rv64.ll | 380 --- llvm/test/CodeGen/RISCV/rvv/vfncvt-f-xu.ll | 382 +++ llvm/test/CodeGen/RISCV/rvv/vfncvt-rod-f-f-rv32.ll | 380 --- llvm/test/CodeGen/RISCV/rvv/vfncvt-rod-f-f-rv64.ll | 380 --- llvm/test/CodeGen/RISCV/rvv/vfncvt-rod-f-f.ll | 382 +++ llvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-x-f-rv32.ll | 632 ----- llvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-x-f-rv64.ll | 632 ----- llvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-x-f.ll | 634 +++++ .../test/CodeGen/RISCV/rvv/vfncvt-rtz-xu-f-rv32.ll | 632 ----- .../test/CodeGen/RISCV/rvv/vfncvt-rtz-xu-f-rv64.ll | 632 ----- llvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-xu-f.ll | 634 +++++ llvm/test/CodeGen/RISCV/rvv/vfncvt-x-f-rv32.ll | 632 ----- llvm/test/CodeGen/RISCV/rvv/vfncvt-x-f-rv64.ll | 632 ----- llvm/test/CodeGen/RISCV/rvv/vfncvt-x-f.ll | 634 +++++ llvm/test/CodeGen/RISCV/rvv/vfncvt-xu-f-rv32.ll | 632 ----- llvm/test/CodeGen/RISCV/rvv/vfncvt-xu-f-rv64.ll | 632 ----- llvm/test/CodeGen/RISCV/rvv/vfncvt-xu-f.ll | 634 +++++ llvm/test/CodeGen/RISCV/rvv/vfneg-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfnmacc-rv32.ll | 1154 -------- llvm/test/CodeGen/RISCV/rvv/vfnmacc-rv64.ll | 1130 -------- llvm/test/CodeGen/RISCV/rvv/vfnmacc.ll | 1108 ++++++++ llvm/test/CodeGen/RISCV/rvv/vfnmadd-rv32.ll | 1154 -------- llvm/test/CodeGen/RISCV/rvv/vfnmadd-rv64.ll | 1130 -------- llvm/test/CodeGen/RISCV/rvv/vfnmadd-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfnmadd.ll | 1108 ++++++++ llvm/test/CodeGen/RISCV/rvv/vfnmsac-rv32.ll | 1154 -------- llvm/test/CodeGen/RISCV/rvv/vfnmsac-rv64.ll | 1130 -------- llvm/test/CodeGen/RISCV/rvv/vfnmsac.ll | 1108 ++++++++ llvm/test/CodeGen/RISCV/rvv/vfnmsub-rv32.ll | 1154 -------- llvm/test/CodeGen/RISCV/rvv/vfnmsub-rv64.ll | 1130 -------- llvm/test/CodeGen/RISCV/rvv/vfnmsub-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfnmsub.ll | 1108 ++++++++ llvm/test/CodeGen/RISCV/rvv/vfpext-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfptoi-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfptrunc-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfrdiv-rv32.ll | 739 ------ llvm/test/CodeGen/RISCV/rvv/vfrdiv-rv64.ll | 707 ----- llvm/test/CodeGen/RISCV/rvv/vfrdiv-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfrdiv.ll | 679 +++++ llvm/test/CodeGen/RISCV/rvv/vfrec7-rv32.ll | 617 ----- llvm/test/CodeGen/RISCV/rvv/vfrec7-rv64.ll | 617 ----- llvm/test/CodeGen/RISCV/rvv/vfrec7.ll | 619 +++++ llvm/test/CodeGen/RISCV/rvv/vfredmax-rv32.ll | 692 ----- llvm/test/CodeGen/RISCV/rvv/vfredmax-rv64.ll | 692 ----- llvm/test/CodeGen/RISCV/rvv/vfredmax.ll | 694 +++++ llvm/test/CodeGen/RISCV/rvv/vfredmin-rv32.ll | 692 ----- llvm/test/CodeGen/RISCV/rvv/vfredmin-rv64.ll | 692 ----- llvm/test/CodeGen/RISCV/rvv/vfredmin.ll | 694 +++++ llvm/test/CodeGen/RISCV/rvv/vfredosum-rv32.ll | 692 ----- llvm/test/CodeGen/RISCV/rvv/vfredosum-rv64.ll | 692 ----- llvm/test/CodeGen/RISCV/rvv/vfredosum.ll | 694 +++++ llvm/test/CodeGen/RISCV/rvv/vfredusum-rv32.ll | 692 ----- llvm/test/CodeGen/RISCV/rvv/vfredusum-rv64.ll | 692 ----- llvm/test/CodeGen/RISCV/rvv/vfredusum.ll | 694 +++++ llvm/test/CodeGen/RISCV/rvv/vfrsqrt7-rv32.ll | 617 ----- llvm/test/CodeGen/RISCV/rvv/vfrsqrt7-rv64.ll | 617 ----- llvm/test/CodeGen/RISCV/rvv/vfrsqrt7.ll | 619 +++++ llvm/test/CodeGen/RISCV/rvv/vfrsub-rv32.ll | 739 ------ llvm/test/CodeGen/RISCV/rvv/vfrsub-rv64.ll | 708 ----- llvm/test/CodeGen/RISCV/rvv/vfrsub-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfrsub.ll | 679 +++++ llvm/test/CodeGen/RISCV/rvv/vfsgnj-rv32.ll | 1417 ---------- llvm/test/CodeGen/RISCV/rvv/vfsgnj-rv64.ll | 1385 ---------- llvm/test/CodeGen/RISCV/rvv/vfsgnj.ll | 1357 ++++++++++ llvm/test/CodeGen/RISCV/rvv/vfsgnjn-rv32.ll | 1417 ---------- llvm/test/CodeGen/RISCV/rvv/vfsgnjn-rv64.ll | 1385 ---------- llvm/test/CodeGen/RISCV/rvv/vfsgnjn.ll | 1357 ++++++++++ llvm/test/CodeGen/RISCV/rvv/vfsgnjx-rv32.ll | 1417 ---------- llvm/test/CodeGen/RISCV/rvv/vfsgnjx-rv64.ll | 1385 ---------- llvm/test/CodeGen/RISCV/rvv/vfsgnjx.ll | 1357 ++++++++++ llvm/test/CodeGen/RISCV/rvv/vfslide1down-rv32.ll | 739 ------ llvm/test/CodeGen/RISCV/rvv/vfslide1down-rv64.ll | 707 ----- llvm/test/CodeGen/RISCV/rvv/vfslide1down.ll | 679 +++++ llvm/test/CodeGen/RISCV/rvv/vfslide1up-rv32.ll | 754 ------ llvm/test/CodeGen/RISCV/rvv/vfslide1up-rv64.ll | 722 ----- llvm/test/CodeGen/RISCV/rvv/vfslide1up.ll | 694 +++++ llvm/test/CodeGen/RISCV/rvv/vfsqrt-rv32.ll | 548 ---- llvm/test/CodeGen/RISCV/rvv/vfsqrt-rv64.ll | 707 ----- llvm/test/CodeGen/RISCV/rvv/vfsqrt-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfsqrt.ll | 619 +++++ llvm/test/CodeGen/RISCV/rvv/vfsub-rv32.ll | 1417 ---------- llvm/test/CodeGen/RISCV/rvv/vfsub-rv64.ll | 1386 ---------- llvm/test/CodeGen/RISCV/rvv/vfsub-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfsub-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfsub.ll | 1357 ++++++++++ llvm/test/CodeGen/RISCV/rvv/vfwadd-rv32.ll | 848 ------ llvm/test/CodeGen/RISCV/rvv/vfwadd-rv64.ll | 848 ------ llvm/test/CodeGen/RISCV/rvv/vfwadd-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfwadd.ll | 832 ++++++ llvm/test/CodeGen/RISCV/rvv/vfwadd.w-rv32.ll | 1275 --------- llvm/test/CodeGen/RISCV/rvv/vfwadd.w-rv64.ll | 1275 --------- llvm/test/CodeGen/RISCV/rvv/vfwadd.w.ll | 1250 +++++++++ llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-f-rv32.ll | 380 --- llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-f-rv64.ll | 380 --- llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-f.ll | 382 +++ llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-x-rv32.ll | 632 ----- llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-x-rv64.ll | 632 ----- llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-x.ll | 634 +++++ llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-xu-rv32.ll | 632 ----- llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-xu-rv64.ll | 632 ----- llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-xu.ll | 634 +++++ llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-x-f-rv32.ll | 380 --- llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-x-f-rv64.ll | 380 --- llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-x-f.ll | 382 +++ .../test/CodeGen/RISCV/rvv/vfwcvt-rtz-xu-f-rv32.ll | 380 --- .../test/CodeGen/RISCV/rvv/vfwcvt-rtz-xu-f-rv64.ll | 380 --- llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-xu-f.ll | 382 +++ llvm/test/CodeGen/RISCV/rvv/vfwcvt-x-f-rv32.ll | 380 --- llvm/test/CodeGen/RISCV/rvv/vfwcvt-x-f-rv64.ll | 380 --- llvm/test/CodeGen/RISCV/rvv/vfwcvt-x-f.ll | 382 +++ llvm/test/CodeGen/RISCV/rvv/vfwcvt-xu-f-rv32.ll | 380 --- llvm/test/CodeGen/RISCV/rvv/vfwcvt-xu-f-rv64.ll | 380 --- llvm/test/CodeGen/RISCV/rvv/vfwcvt-xu-f.ll | 382 +++ llvm/test/CodeGen/RISCV/rvv/vfwmacc-rv32.ll | 848 ------ llvm/test/CodeGen/RISCV/rvv/vfwmacc-rv64.ll | 848 ------ llvm/test/CodeGen/RISCV/rvv/vfwmacc.ll | 832 ++++++ llvm/test/CodeGen/RISCV/rvv/vfwmsac-rv32.ll | 848 ------ llvm/test/CodeGen/RISCV/rvv/vfwmsac-rv64.ll | 848 ------ llvm/test/CodeGen/RISCV/rvv/vfwmsac.ll | 832 ++++++ llvm/test/CodeGen/RISCV/rvv/vfwmul-rv32.ll | 848 ------ llvm/test/CodeGen/RISCV/rvv/vfwmul-rv64.ll | 848 ------ llvm/test/CodeGen/RISCV/rvv/vfwmul-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfwmul.ll | 832 ++++++ llvm/test/CodeGen/RISCV/rvv/vfwnmacc-rv32.ll | 848 ------ llvm/test/CodeGen/RISCV/rvv/vfwnmacc-rv64.ll | 848 ------ llvm/test/CodeGen/RISCV/rvv/vfwnmacc.ll | 832 ++++++ llvm/test/CodeGen/RISCV/rvv/vfwnmsac-rv32.ll | 848 ------ llvm/test/CodeGen/RISCV/rvv/vfwnmsac-rv64.ll | 848 ------ llvm/test/CodeGen/RISCV/rvv/vfwnmsac.ll | 832 ++++++ llvm/test/CodeGen/RISCV/rvv/vfwredosum-rv32.ll | 508 ---- llvm/test/CodeGen/RISCV/rvv/vfwredosum-rv64.ll | 508 ---- llvm/test/CodeGen/RISCV/rvv/vfwredosum.ll | 510 ++++ llvm/test/CodeGen/RISCV/rvv/vfwredusum-rv32.ll | 508 ---- llvm/test/CodeGen/RISCV/rvv/vfwredusum-rv64.ll | 508 ---- llvm/test/CodeGen/RISCV/rvv/vfwredusum.ll | 510 ++++ llvm/test/CodeGen/RISCV/rvv/vfwsub-rv32.ll | 848 ------ llvm/test/CodeGen/RISCV/rvv/vfwsub-rv64.ll | 848 ------ llvm/test/CodeGen/RISCV/rvv/vfwsub-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfwsub.ll | 832 ++++++ llvm/test/CodeGen/RISCV/rvv/vfwsub.w-rv32.ll | 1275 --------- llvm/test/CodeGen/RISCV/rvv/vfwsub.w-rv64.ll | 1275 --------- llvm/test/CodeGen/RISCV/rvv/vfwsub.w.ll | 1250 +++++++++ llvm/test/CodeGen/RISCV/rvv/vid-rv32.ll | 758 ------ llvm/test/CodeGen/RISCV/rvv/vid-rv64.ll | 758 ------ llvm/test/CodeGen/RISCV/rvv/vid.ll | 760 ++++++ llvm/test/CodeGen/RISCV/rvv/viota-rv32.ll | 882 ------- llvm/test/CodeGen/RISCV/rvv/viota-rv64.ll | 882 ------- llvm/test/CodeGen/RISCV/rvv/viota.ll | 884 +++++++ llvm/test/CodeGen/RISCV/rvv/vitofp-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vle-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vle-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vleff-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vleff-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlm-rv32.ll | 94 - llvm/test/CodeGen/RISCV/rvv/vlm-rv64.ll | 94 - llvm/test/CodeGen/RISCV/rvv/vlm.ll | 96 + llvm/test/CodeGen/RISCV/rvv/vloxei-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vloxei-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vloxseg-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vloxseg-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlse-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlse-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlseg-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlseg-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlsegff-rv32-dead.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlsegff-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlsegff-rv64-dead.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlsegff-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlsseg-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlsseg-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vluxei-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vluxei-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vluxseg-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vluxseg-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmacc-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmacc-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmadc-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmadc-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmadc.carry.in-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmadc.carry.in-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmadd-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmadd-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmadd-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vmand-rv32.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmand-rv64.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmand.ll | 144 + llvm/test/CodeGen/RISCV/rvv/vmandn-rv32.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmandn-rv64.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmandn.ll | 144 + llvm/test/CodeGen/RISCV/rvv/vmarith-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vmax-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmax-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmax-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vmaxu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmaxu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmaxu-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vmclr-rv32.ll | 114 - llvm/test/CodeGen/RISCV/rvv/vmclr-rv64.ll | 114 - llvm/test/CodeGen/RISCV/rvv/vmclr.ll | 116 + llvm/test/CodeGen/RISCV/rvv/vmerge-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmerge-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfeq-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfeq-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfge-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfge-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfgt-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfgt-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfle-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfle-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmflt-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmflt-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfne-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfne-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmin-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmin-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmin-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vminu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vminu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vminu-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vmnand-rv32.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmnand-rv64.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmnand.ll | 144 + llvm/test/CodeGen/RISCV/rvv/vmnor-rv32.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmnor-rv64.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmnor.ll | 144 + llvm/test/CodeGen/RISCV/rvv/vmor-rv32.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmor-rv64.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmor.ll | 144 + llvm/test/CodeGen/RISCV/rvv/vmorn-rv32.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmorn-rv64.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmorn.ll | 144 + llvm/test/CodeGen/RISCV/rvv/vmsbc-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsbc-rv64.ll | 2 +- .../test/CodeGen/RISCV/rvv/vmsbc.borrow.in-rv32.ll | 2 +- .../test/CodeGen/RISCV/rvv/vmsbc.borrow.in-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsbf-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsbf-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmseq-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmseq-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmset-rv32.ll | 114 - llvm/test/CodeGen/RISCV/rvv/vmset-rv64.ll | 114 - llvm/test/CodeGen/RISCV/rvv/vmset.ll | 116 + llvm/test/CodeGen/RISCV/rvv/vmsge-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsge-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsgeu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsgeu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsgt-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsgt-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsgtu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsgtu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsif-rv32.ll | 296 --- llvm/test/CodeGen/RISCV/rvv/vmsif-rv64.ll | 296 --- llvm/test/CodeGen/RISCV/rvv/vmsif.ll | 298 +++ llvm/test/CodeGen/RISCV/rvv/vmsle-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsle-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsleu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsleu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmslt-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmslt-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsltu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsltu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsne-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsne-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsof-rv32.ll | 296 --- llvm/test/CodeGen/RISCV/rvv/vmsof-rv64.ll | 296 --- llvm/test/CodeGen/RISCV/rvv/vmsof.ll | 298 +++ llvm/test/CodeGen/RISCV/rvv/vmul-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmul-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmul-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vmul-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vmulh-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmulh-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmulh-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vmulhsu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmulhsu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmulhu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmulhu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmulhu-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vmv.s.x-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmv.s.x-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmv.v.v-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmv.v.v-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmv.v.x-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmv.v.x-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmv.x.s-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmv.x.s-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmxnor-rv32.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmxnor-rv64.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmxnor.ll | 144 + llvm/test/CodeGen/RISCV/rvv/vmxor-rv32.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmxor-rv64.ll | 142 - llvm/test/CodeGen/RISCV/rvv/vmxor.ll | 144 + llvm/test/CodeGen/RISCV/rvv/vnclip-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnclip-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnclipu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnclipu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnmsac-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnmsac-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnmsub-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnmsub-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnmsub-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vnsra-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnsra-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnsra-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vnsrl-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnsrl-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnsrl-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vor-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vor-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vor-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vor-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vpgather-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vpload.ll | 54 +- llvm/test/CodeGen/RISCV/rvv/vpscatter-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vpstore.ll | 56 +- llvm/test/CodeGen/RISCV/rvv/vredand-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredand-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredmax-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredmax-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredmaxu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredmaxu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredmin-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredmin-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredminu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredminu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredor-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredor-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredsum-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredsum-rv64.ll | 2 +- .../CodeGen/RISCV/rvv/vreductions-fp-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vreductions-fp-vp.ll | 4 +- .../test/CodeGen/RISCV/rvv/vreductions-int-rv32.ll | 2 +- .../test/CodeGen/RISCV/rvv/vreductions-int-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vreductions-int-vp.ll | 10 +- llvm/test/CodeGen/RISCV/rvv/vreductions-mask-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vreductions-mask.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vredxor-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredxor-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vrem-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vrem-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vrem-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vrem-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vremu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vremu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vremu-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vremu-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vrgather-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vrgather-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vrgatherei16-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vrgatherei16-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vrsub-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vrsub-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vrsub-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vrsub-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsadd-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsadd-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsadd-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsaddu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsaddu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsaddu-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsbc-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsbc-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vse-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vse-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vselect-fp-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vselect-fp-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vselect-int-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vselect-int-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vselect-mask.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vselect-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsetvl-ext.ll | 2 +- .../CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll | 2 +- .../CodeGen/RISCV/rvv/vsetvli-insert-crossbb.mir | 4 +- llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.mir | 4 +- llvm/test/CodeGen/RISCV/rvv/vsetvli-regression.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsext-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsext-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vshl-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vshl-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vslide1down-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vslide1down-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vslide1up-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vslide1up-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vslidedown-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vslidedown-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vslideup-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vslideup-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsll-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsll-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsm-rv32.ll | 137 - llvm/test/CodeGen/RISCV/rvv/vsm-rv64.ll | 137 - llvm/test/CodeGen/RISCV/rvv/vsm.ll | 139 + llvm/test/CodeGen/RISCV/rvv/vsmul-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsmul-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsoxei-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsoxei-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsoxseg-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsoxseg-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsplats-fp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsplats-i1.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsplats-i64.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsra-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsra-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsra-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsra-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsrl-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsrl-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsrl-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsrl-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsse-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsse-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsseg-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsseg-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vssra-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vssra-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vssrl-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vssrl-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vssseg-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vssseg-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vssub-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vssub-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vssub-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vssubu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vssubu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vssubu-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsub-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsub-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsub-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsub-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsuxei-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsuxei-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsuxseg-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsuxseg-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vtruncs-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vwadd-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwadd-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwadd-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vwadd.w-rv32.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vwadd.w-rv64.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vwaddu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwaddu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwaddu.w-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwaddu.w-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwmacc-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwmacc-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwmacc-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vwmaccsu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwmaccsu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwmaccu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwmaccu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwmaccus-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwmaccus-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwmul-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwmul-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwmulsu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwmulsu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwmulu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwmulu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwredsum-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwredsum-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwredsumu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwredsumu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwsub-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwsub-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwsub-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vwsub.w-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwsub.w-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwsubu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwsubu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwsubu.w-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwsubu.w-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vxor-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vxor-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vxor-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vxor-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vzext-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vzext-rv64.ll | 2 +- .../CodeGen/RISCV/rvv/wrong-stack-slot-rv32.mir | 2 +- .../CodeGen/RISCV/rvv/wrong-stack-slot-rv64.mir | 2 +- llvm/test/CodeGen/RISCV/rvv/zvlsseg-copy.mir | 2 +- llvm/test/CodeGen/RISCV/rvv/zvlsseg-spill.mir | 2 +- llvm/test/CodeGen/RISCV/rvv/zvlsseg-zero-vl.ll | 2 +- llvm/test/CodeGen/RISCV/sadd_sat.ll | 8 +- llvm/test/CodeGen/RISCV/sadd_sat_plus.ll | 12 +- llvm/test/CodeGen/RISCV/scalable-vector-struct.ll | 2 +- .../test/CodeGen/RISCV/select-optimize-multiple.ll | 98 +- llvm/test/CodeGen/RISCV/sextw-removal.ll | 12 +- llvm/test/CodeGen/RISCV/shadowcallstack.ll | 16 +- llvm/test/CodeGen/RISCV/shifts.ll | 484 ++-- llvm/test/CodeGen/RISCV/spill-fpr-scalar.ll | 2 +- .../test/CodeGen/RISCV/srem-seteq-illegal-types.ll | 36 +- llvm/test/CodeGen/RISCV/srem-vector-lkk.ll | 948 ++++--- llvm/test/CodeGen/RISCV/ssub_sat.ll | 14 +- llvm/test/CodeGen/RISCV/ssub_sat_plus.ll | 16 +- llvm/test/CodeGen/RISCV/stack-store-check.ll | 84 +- llvm/test/CodeGen/RISCV/tail-calls.ll | 8 +- .../RISCV/umulo-128-legalisation-lowering.ll | 146 +- .../test/CodeGen/RISCV/urem-seteq-illegal-types.ll | 16 +- llvm/test/CodeGen/RISCV/urem-vector-lkk.ll | 950 ++++--- llvm/test/CodeGen/RISCV/vec3-setcc-crash.ll | 20 +- llvm/test/CodeGen/RISCV/xaluo.ll | 840 +++--- llvm/test/CodeGen/X86/avx512-mask-op.ll | 112 +- llvm/test/CodeGen/X86/ibtseal-kernel.ll | 19 + llvm/test/CodeGen/X86/ibtseal-large.ll | 19 + llvm/test/CodeGen/X86/ibtseal-small.ll | 19 + llvm/test/CodeGen/X86/long-double-abi-align.ll | 4 +- llvm/test/CodeGen/X86/parity-vec.ll | 165 +- llvm/test/CodeGen/X86/scalar-fp-to-i32.ll | 219 +- llvm/test/CodeGen/X86/scalar-fp-to-i64.ll | 32 +- llvm/test/CodeGen/X86/select-lea.ll | 177 ++ llvm/test/CodeGen/X86/smul-with-overflow.ll | 734 +++++- llvm/test/CodeGen/X86/vector-fshl-128.ll | 165 +- llvm/test/CodeGen/X86/vector-fshl-256.ll | 117 +- llvm/test/CodeGen/X86/vector-fshl-512.ll | 130 +- .../CodeGen/X86/xray-attribute-instrumentation.ll | 7 +- llvm/test/CodeGen/X86/xray-custom-log.ll | 4 +- llvm/test/CodeGen/X86/xray-empty-firstmbb.mir | 2 +- .../test/CodeGen/X86/xray-ignore-loop-detection.ll | 4 +- llvm/test/CodeGen/X86/xray-log-args.ll | 4 +- llvm/test/CodeGen/X86/xray-loop-detection.ll | 4 +- .../CodeGen/X86/xray-multiplerets-in-blocks.mir | 2 +- .../X86/xray-partial-instrumentation-skip-entry.ll | 7 +- .../X86/xray-partial-instrumentation-skip-exit.ll | 6 +- llvm/test/CodeGen/X86/xray-section-group.ll | 6 +- .../CodeGen/X86/xray-selective-instrumentation.ll | 2 +- llvm/test/CodeGen/X86/xray-tail-call-sled.ll | 4 +- llvm/test/DebugInfo/X86/base-type-size.ll | 50 + llvm/test/DebugInfo/X86/tu-to-non-tu.ll | 330 ++- .../JITLink/RISCV/ELF_pc_relative.s | 19 + .../ExecutionEngine/JITLink/RISCV/ELF_reloc_set.s | 31 + .../JITLink/RISCV/anonymous_symbol.s | 21 + llvm/test/MC/ELF/debug-hash-file.s | 20 +- llvm/test/MC/PowerPC/gnu-attribute.s | 11 + llvm/test/MC/RISCV/attribute-arch-invalid.s | 6 - llvm/test/MC/RISCV/attribute-arch.s | 113 +- llvm/test/MC/RISCV/rv32zbkb-only-valid.s | 16 + llvm/test/MC/RISCV/rv32zbkb-valid.s | 45 + llvm/test/MC/RISCV/rv32zbkc-invalid.s | 9 + llvm/test/MC/RISCV/rv32zbkc-valid.s | 23 + llvm/test/MC/RISCV/rv32zbp-aliases-valid.s | 10 +- llvm/test/MC/RISCV/rv32zbp-only-valid.s | 6 + llvm/test/MC/RISCV/rv32zbp-valid.s | 2 +- llvm/test/MC/RISCV/rv64-zbkb-valid.s | 20 + llvm/test/MC/RISCV/rv64zbkb-only-valid.s | 9 + llvm/test/MC/RISCV/rv64zbp-aliases-valid.s | 2 +- llvm/test/MC/RISCV/rvv/add.s | 8 +- llvm/test/MC/RISCV/rvv/aliases.s | 4 +- llvm/test/MC/RISCV/rvv/and.s | 8 +- llvm/test/MC/RISCV/rvv/clip.s | 8 +- llvm/test/MC/RISCV/rvv/compare.s | 8 +- llvm/test/MC/RISCV/rvv/convert.s | 8 +- llvm/test/MC/RISCV/rvv/div.s | 8 +- llvm/test/MC/RISCV/rvv/ext.s | 8 +- llvm/test/MC/RISCV/rvv/fadd.s | 8 +- llvm/test/MC/RISCV/rvv/fcompare.s | 8 +- llvm/test/MC/RISCV/rvv/fdiv.s | 8 +- llvm/test/MC/RISCV/rvv/fmacc.s | 8 +- llvm/test/MC/RISCV/rvv/fminmax.s | 8 +- llvm/test/MC/RISCV/rvv/fmul.s | 8 +- llvm/test/MC/RISCV/rvv/fmv.s | 8 +- llvm/test/MC/RISCV/rvv/fothers.s | 8 +- llvm/test/MC/RISCV/rvv/freduction.s | 8 +- llvm/test/MC/RISCV/rvv/fsub.s | 8 +- llvm/test/MC/RISCV/rvv/invalid-eew.s | 2 +- llvm/test/MC/RISCV/rvv/invalid.s | 2 +- llvm/test/MC/RISCV/rvv/load.s | 8 +- llvm/test/MC/RISCV/rvv/macc.s | 8 +- llvm/test/MC/RISCV/rvv/mask.s | 8 +- llvm/test/MC/RISCV/rvv/minmax.s | 8 +- llvm/test/MC/RISCV/rvv/mul.s | 8 +- llvm/test/MC/RISCV/rvv/mv.s | 8 +- llvm/test/MC/RISCV/rvv/or.s | 8 +- llvm/test/MC/RISCV/rvv/others.s | 8 +- llvm/test/MC/RISCV/rvv/reduction.s | 8 +- llvm/test/MC/RISCV/rvv/shift.s | 8 +- llvm/test/MC/RISCV/rvv/sign-injection.s | 8 +- llvm/test/MC/RISCV/rvv/snippet.s | 4 +- llvm/test/MC/RISCV/rvv/store.s | 8 +- llvm/test/MC/RISCV/rvv/sub.s | 8 +- llvm/test/MC/RISCV/rvv/vsetvl-invalid.s | 4 +- llvm/test/MC/RISCV/rvv/vsetvl.s | 8 +- llvm/test/MC/RISCV/rvv/xor.s | 8 +- llvm/test/MC/RISCV/rvv/zvlsseg.s | 8 +- .../CodeGenPrepare/AArch64/large-offset-gep.ll | 5 +- .../InstCombine/AMDGPU/amdgcn-intrinsics.ll | 1045 ++++++-- .../Transforms/InstCombine/binop-phi-operands.ll | 122 +- .../Transforms/InstCombine/intrinsic-select.ll | 2 +- llvm/test/Transforms/InstCombine/intrinsics.ll | 56 +- .../Transforms/InstCombine/masked_intrinsics.ll | 62 + .../test/Transforms/InstCombine/mul-masked-bits.ll | 47 +- llvm/test/Transforms/InstCombine/zext-or-icmp.ll | 12 +- .../Transforms/InstSimplify/ConstProp/bitcount.ll | 36 +- .../Transforms/InstSimplify/ConstProp/loads.ll | 58 +- .../LoopVectorize/RISCV/masked_gather_scatter.ll | 4 +- .../Transforms/LoopVectorize/RISCV/reg-usage.ll | 8 +- .../LoopVectorize/RISCV/riscv-interleaved.ll | 2 +- .../Transforms/LoopVectorize/RISCV/riscv-unroll.ll | 8 +- .../LoopVectorize/RISCV/scalable-reductions.ll | 2 +- .../LoopVectorize/RISCV/scalable-vf-hint.ll | 2 +- .../RISCV/unroll-in-loop-vectorizer.ll | 2 +- llvm/test/Transforms/NewGVN/phi-of-ops-loads.ll | 148 ++ .../SLPVectorizer/RISCV/rvv-min-vector-size.ll | 6 +- llvm/test/tools/gold/X86/cache.ll | 4 +- .../tools/llvm-objcopy/MachO/update-section.test | 115 + .../Inputs/{basic-aa.txt => basic-aa.crlf} | 0 llvm/test/tools/split-file/Inputs/basic-bb.crlf | 4 + llvm/test/tools/split-file/basic.crlf.test | 10 + llvm/tools/llvm-diff/llvm-diff.cpp | 1 + llvm/tools/llvm-lto/llvm-lto.cpp | 1 + llvm/tools/llvm-modextract/llvm-modextract.cpp | 1 + llvm/tools/llvm-objcopy/MachO/MachOObjcopy.cpp | 56 + llvm/tools/llvm-objdump/MachODump.cpp | 4 +- llvm/tools/llvm-objdump/WasmDump.cpp | 2 +- llvm/tools/llvm-pdbutil/MinimalSymbolDumper.cpp | 11 +- llvm/tools/llvm-readobj/COFFDumper.cpp | 1 + llvm/tools/llvm-readobj/XCOFFDumper.cpp | 1 + llvm/tools/llvm-reduce/llvm-reduce.cpp | 1 + llvm/tools/llvm-split/llvm-split.cpp | 1 + llvm/tools/llvm-stress/llvm-stress.cpp | 1 + llvm/tools/split-file/split-file.cpp | 3 +- llvm/unittests/ADT/BitVectorTest.cpp | 26 + llvm/unittests/ADT/StringRefTest.cpp | 30 + llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp | 2 +- llvm/unittests/Support/Casting.cpp | 34 +- llvm/unittests/Support/CommandLineTest.cpp | 89 +- .../Support/DynamicLibrary/DynamicLibraryTest.cpp | 42 +- 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