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from ab16d0abcd6 [Transforms] Fix some Clang-tidy modernize and Include What [...] new 5a3d179fab7 [RISCV] Initial codegen support for ALU operations

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Summary of changes: lib/Target/RISCV/CMakeLists.txt | 11 ++ lib/Target/RISCV/LLVMBuild.txt | 3 +- lib/Target/RISCV/RISCV.h | 31 +++++ lib/Target/RISCV/RISCV.td | 7 +- lib/Target/RISCV/RISCVAsmPrinter.cpp | 67 +++++++++++ lib/Target/RISCV/RISCVCallingConv.td | 29 +++++ lib/Target/RISCV/RISCVFrameLowering.cpp | 29 +++++ lib/Target/RISCV/RISCVFrameLowering.h | 35 ++++++ lib/Target/RISCV/RISCVISelDAGToDAG.cpp | 63 ++++++++++ lib/Target/RISCV/RISCVISelLowering.cpp | 170 +++++++++++++++++++++++++++ lib/Target/RISCV/RISCVISelLowering.h | 62 ++++++++++ lib/Target/RISCV/RISCVInstrInfo.cpp | 31 +++++ lib/Target/RISCV/RISCVInstrInfo.h | 32 +++++ lib/Target/RISCV/RISCVInstrInfo.td | 60 +++++++++- lib/Target/RISCV/RISCVMCInstLower.cpp | 50 ++++++++ lib/Target/RISCV/RISCVRegisterInfo.cpp | 61 ++++++++++ lib/Target/RISCV/RISCVRegisterInfo.h | 40 +++++++ lib/Target/RISCV/RISCVRegisterInfo.td | 13 +- lib/Target/RISCV/RISCVSubtarget.cpp | 48 ++++++++ lib/Target/RISCV/RISCVSubtarget.h | 75 ++++++++++++ lib/Target/RISCV/RISCVTargetMachine.cpp | 26 +++- lib/Target/RISCV/RISCVTargetMachine.h | 6 + test/CodeGen/RISCV/alu32.ll | 163 +++++++++++++++++++++++++ test/{Object => CodeGen}/RISCV/lit.local.cfg | 0 24 files changed, 1101 insertions(+), 11 deletions(-) create mode 100644 lib/Target/RISCV/RISCV.h create mode 100644 lib/Target/RISCV/RISCVAsmPrinter.cpp create mode 100644 lib/Target/RISCV/RISCVCallingConv.td create mode 100644 lib/Target/RISCV/RISCVFrameLowering.cpp create mode 100644 lib/Target/RISCV/RISCVFrameLowering.h create mode 100644 lib/Target/RISCV/RISCVISelDAGToDAG.cpp create mode 100644 lib/Target/RISCV/RISCVISelLowering.cpp create mode 100644 lib/Target/RISCV/RISCVISelLowering.h create mode 100644 lib/Target/RISCV/RISCVInstrInfo.cpp create mode 100644 lib/Target/RISCV/RISCVInstrInfo.h create mode 100644 lib/Target/RISCV/RISCVMCInstLower.cpp create mode 100644 lib/Target/RISCV/RISCVRegisterInfo.cpp create mode 100644 lib/Target/RISCV/RISCVRegisterInfo.h create mode 100644 lib/Target/RISCV/RISCVSubtarget.cpp create mode 100644 lib/Target/RISCV/RISCVSubtarget.h create mode 100644 test/CodeGen/RISCV/alu32.ll copy test/{Object => CodeGen}/RISCV/lit.local.cfg (100%)