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from bc5e95e9a99 AMDGPU/GlobalISel: Define instruction mapping for @llvm.amdgcn.exp new e82f69197bc AMDGPU/GlobalISel: InstrMapping for llvm.amdgcn.exp.compr new 8c77607fcb9 [AArch64] Add support for secrel add/load/store relocations [...]

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Summary of changes: docs/Extensions.rst | 24 ++++++++++++ lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp | 14 +++++-- .../AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp | 3 +- lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.cpp | 2 + lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.h | 3 ++ .../MCTargetDesc/AArch64WinCOFFObjectWriter.cpp | 14 +++++++ lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 20 ++++++++-- ...-exp.mir => regbankselect-amdgcn-exp-compr.mir} | 44 +++++++++------------- test/MC/AArch64/coff-relocations.s | 13 +++++++ 9 files changed, 102 insertions(+), 35 deletions(-) copy test/CodeGen/AMDGPU/GlobalISel/{regbankselect-amdgcn-exp.mir => regbankselect [...]