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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_build/master-arm in repository toolchain/ci/gcc.

from cf966403d91 Daily bump. adds 3540429be7a Support 128/256/512-bit vector plus/smin/smax reduction for [...] adds 9cfb95f9b92 Relax condition of (vec_concat:M(vec_select op0 idx0)(vec_s [...] adds e475ae9bbf0 Control all jump threading passes with -fjump-threads. new 6fabd9e25d1 Fix gcc.dg/vect/bb-slp-pr65935.c FAIL with AVX after recent change

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Summary of changes: gcc/config/i386/i386-expand.c | 3 + gcc/config/i386/sse.md | 10 ++- gcc/simplify-rtx.c | 3 +- gcc/testsuite/gcc.dg/auto-init-uninit-1.c | 2 +- gcc/testsuite/gcc.dg/auto-init-uninit-15.c | 2 +- gcc/testsuite/gcc.dg/guality/example.c | 1 - gcc/testsuite/gcc.dg/loop-8.c | 2 +- gcc/testsuite/gcc.dg/strlenopt-40.c | 2 +- gcc/testsuite/gcc.dg/tree-ssa/pr18133-2.c | 2 +- gcc/testsuite/gcc.dg/tree-ssa/pr18134.c | 2 +- gcc/testsuite/gcc.dg/uninit-1.c | 2 +- gcc/testsuite/gcc.dg/uninit-pr44547.c | 2 +- gcc/testsuite/gcc.dg/uninit-pr59970.c | 2 +- gcc/testsuite/gcc.dg/vect/bb-slp-pr65935.c | 1 + .../{vect-rebuild.c => avx512f-vect-rebuild.c} | 22 ++--- .../gcc.target/i386/avx512fp16-reduce-op-2.c | 96 ++++++++++++++++++++++ .../gcc.target/i386/avx512fp16-reduce-op-3.c | 91 ++++++++++++++++++++ gcc/testsuite/gcc.target/i386/vect-rebuild.c | 2 +- gcc/tree-ssa-threadbackward.c | 4 +- gcc/tree-ssa-threadedge.c | 3 + gcc/tree-ssa-threadupdate.c | 2 + 21 files changed, 223 insertions(+), 33 deletions(-) copy gcc/testsuite/gcc.target/i386/{vect-rebuild.c => avx512f-vect-rebuild.c} (51%) create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-reduce-op-2.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-reduce-op-3.c