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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-defconfig in repository toolchain/ci/llvm-project.

from b45853f1731 [lldb][NFC] Cleanup mentions and code related to lldb-mi adds 870f49e6903 AMDGPU: Add some function return test cases adds 86383e66266 [Format/ObjC] Avoid breaking between unary operators and operands adds 910323e6676 [libc++] Integrate the PSTL into libc++ adds a5bd48939cd [libc++] Use _EnableIf instead of std::enable_if in deducti [...] adds b50f10875b3 [llvm-lipo] Remove trailing whitespace. NFC adds 318a6553699 GlobalISel: Add GINodeEquiv for fcopysign adds 7df225dfc25 AMDGPU/GlobalISel: Fix MMO flags for kernel argument loads adds 01fcf9238f8 [AMDGPU] Allow register tuples to set asm names adds 2272be94f22 [RISCV] Disable tests failing on buildbots. adds 4e9196ebcb9 Revert "Use the MachineBasicBlock symbol for a callbr target" adds 3b1ef581282 [libc++] Allow passing additional CMake arguments in macOS [...] adds ff9c9e644db [AMDGPU] Add test case on crashing of `si-lower-sgpr-spills` pass adds a3c83b7511a Revert "[libc++] Integrate the PSTL into libc++" adds c14334e9592 LiveIntervals: Fix handleMove asserting on BUNDLE adds 4e8c8aa959a [libc++] Mark libcpp_deallocate.sh.cpp as UNSUPPORTED inste [...] adds 85f38901266 AMDGPU: Force s_waitcnt after GWS instructions adds 48c0df5d460 AMDGPU: Don't rely on m0 being -1 for GWS offsets adds e3401a9b861 AMDGPU: Redefine setcc condition PatLeafs adds e664319e7a1 Expand pseudo-components before embedding in llvm-config adds 18230ecf7ef [InstCombine] Add test cases for PR42691. NFC adds 4933c717ecb Fix a latent bug discovered by r366610: nativecodegen inclu [...] adds 5e23f428203 AMDGPU: Avoid custom predicates for stores with glue adds 3a3c58f0459 [InstCombine] Fix copy/paste mistake in the test cases I ad [...] adds 34da8dfba08 Revert r366610 and r366612: Expand pseudo-components before [...] adds 7b5a54e3690 [AMDGPU] Fixed occupancy calculation for gfx10 adds f4038e75d20 Disallow most calling convention attributes on PS4 adds 407e8375402 Revert "Fix asan infinite loop on undefined symbol" adds 05d9e6a2a3d [AMDGPU] Autogenerate register sequences in tuples adds a29002e59b5 [NFC] Remove unused variable adds f3bfb85bcea AMDGPU/GlobalISel: Legalize GEP for other 32-bit address spaces adds 578e8fa8337 Re-commit: r366610 and r366612: Expand pseudo-components be [...] adds 604f802fd30 [LTO] Always mark regular LTO units with EnableSplitLTOUnit=1 adds 5204f7611f4 [WebAssembly] Compute and export TLS block alignment adds 41affad967d [GlobalISel][AArch64] Contract trivial same-size cross-bank [...] adds 3bef014e7d7 Implement P1301R4, which allows specifying an optional mess [...] adds 1f8aa536f39 [cxx_status] Update status page for WG21 Cologne meeting motions. adds 1358af27c09 We support P1301R4 in C++2a as of r366626. adds 7017a6d3a3f Mark P1301R4 in C++2a as being SVN instead. adds 6a382050391 [c++20] P1161R3: a[b,c] is deprecated. adds fc0d766511e [CMake] Align debugserver with lldb-server on Darwin adds cbd28cd05bb Fix asan infinite loop on undefined symbol adds 0a7faa4e3d9 [Local] Zap blockaddress without users in ConstantFoldTerminator. adds 7a3d4c15a7f Revert "Fix asan infinite loop on undefined symbol" adds 12b48b16074 Fix cppcheck reduce scope variable warnings. NFCI adds adec0f22524 [X86][SSE] Use PSADBW to improve vXi8 sum reduction (PR42674)

No new revisions were added by this update.

Summary of changes: clang/include/clang/Basic/Attr.td | 3 +- clang/include/clang/Basic/AttrDocs.td | 7 + clang/include/clang/Basic/BuiltinsWebAssembly.def | 1 + clang/include/clang/Basic/DiagnosticGroups.td | 2 + clang/include/clang/Basic/DiagnosticSemaKinds.td | 9 + clang/include/clang/Basic/TargetInfo.h | 1 + clang/lib/Basic/Targets/OSTargets.h | 4 + clang/lib/CodeGen/BackendUtil.cpp | 2 +- clang/lib/CodeGen/CGBuiltin.cpp | 5 + clang/lib/CodeGen/TargetInfo.cpp | 2 +- clang/lib/Format/TokenAnnotator.cpp | 2 + clang/lib/Sema/SemaDecl.cpp | 6 +- clang/lib/Sema/SemaDeclAttr.cpp | 33 +- clang/lib/Sema/SemaExpr.cpp | 9 + clang/lib/Sema/SemaStmt.cpp | 15 +- .../CXX/dcl.dcl/dcl.attr/dcl.attr.nodiscard/p1.cpp | 4 +- .../CXX/dcl.dcl/dcl.attr/dcl.attr.nodiscard/p2.cpp | 34 +- clang/test/CodeGen/builtins-wasm.c | 6 + clang/test/CodeGen/split-lto-unit.c | 12 + clang/test/Preprocessor/has_attribute.cpp | 2 +- clang/test/Sema/c2x-nodiscard.c | 6 +- clang/test/Sema/no_callconv.cpp | 44 +++ clang/test/SemaCXX/cxx11-attr-print.cpp | 8 +- clang/test/SemaCXX/deprecated.cpp | 26 ++ clang/unittests/Format/FormatTestObjC.cpp | 12 + .../RecursiveASTVisitorTests/LambdaExpr.cpp | 2 + clang/www/cxx_status.html | 111 +++++- compiler-rt/lib/interception/interception_linux.cc | 9 +- .../test/asan/TestCases/Linux/dlopen-mixed-c-cxx.c | 42 --- libcxx/include/map | 24 +- libcxx/include/set | 24 +- .../support.dynamic/libcpp_deallocate.sh.cpp | 2 +- libcxx/utils/ci/macos-trunk.sh | 10 +- lld/test/wasm/{tls.ll => tls-align.ll} | 54 +-- lld/test/wasm/tls.ll | 27 ++ lld/wasm/Driver.cpp | 31 +- lld/wasm/Symbols.cpp | 1 + lld/wasm/Symbols.h | 4 + lld/wasm/Writer.cpp | 3 + lldb/cmake/modules/LLDBConfig.cmake | 10 +- lldb/test/CMakeLists.txt | 9 +- lldb/tools/CMakeLists.txt | 4 +- lldb/unittests/CMakeLists.txt | 2 +- lldb/unittests/tools/lldb-server/CMakeLists.txt | 2 +- llvm/cmake/modules/LLVM-Config.cmake | 161 ++++---- llvm/include/llvm/IR/IntrinsicsWebAssembly.td | 5 + .../llvm/Target/GlobalISel/SelectionDAGCompat.td | 1 + llvm/include/llvm/Target/Target.td | 9 +- .../lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp | 9 +- llvm/lib/CodeGen/LiveIntervals.cpp | 5 +- .../Target/AArch64/AArch64InstructionSelector.cpp | 49 +++ llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp | 2 +- llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | 10 +- llvm/lib/Target/AMDGPU/AMDGPUInstructions.td | 78 ++-- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 4 +- llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp | 25 +- llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h | 2 +- llvm/lib/Target/AMDGPU/DSInstructions.td | 5 +- .../AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp | 30 +- .../Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.h | 4 +- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 23 +- llvm/lib/Target/AMDGPU/SIISelLowering.h | 1 + llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 2 +- llvm/lib/Target/AMDGPU/SIInstrInfo.td | 42 ++- llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 15 +- llvm/lib/Target/AMDGPU/SIRegisterInfo.td | 418 +++++---------------- llvm/lib/Target/AMDGPU/SOPInstructions.td | 6 +- llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp | 18 +- llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h | 2 +- llvm/lib/Target/AMDGPU/VOPCInstructions.td | 19 +- .../Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp | 10 + .../Target/WebAssembly/WebAssemblyMCInstLower.cpp | 2 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 45 ++- llvm/lib/Transforms/Utils/Local.cpp | 6 + .../CodeGen/AArch64/GlobalISel/contract-store.mir | 89 +++++ .../CodeGen/AMDGPU/GlobalISel/inst-select-gep.mir | 86 +++++ .../GlobalISel/irtranslator-amdgpu_kernel.ll | 228 +++++------ .../CodeGen/AMDGPU/GlobalISel/legalize-gep.mir | 36 ++ llvm/test/CodeGen/AMDGPU/function-returns.ll | 20 + .../AMDGPU/hsa-metadata-kernel-code-props-v3.ll | 5 +- llvm/test/CodeGen/AMDGPU/idot8s.ll | 8 +- .../CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier.ll | 73 +++- .../test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.init.ll | 36 +- .../CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.br.ll | 7 +- .../CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.p.ll | 7 +- .../AMDGPU/llvm.amdgcn.ds.gws.sema.release.all.ll | 7 +- .../CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.v.ll | 7 +- llvm/test/CodeGen/AMDGPU/nsa-reassign.ll | 4 +- llvm/test/CodeGen/AMDGPU/regbank-reassign.mir | 12 + .../AMDGPU/scheduler-handle-move-bundle.mir | 52 +++ llvm/test/CodeGen/AMDGPU/si-lower-sgpr-spills.mir | 20 + llvm/test/CodeGen/AMDGPU/wave32.ll | 2 +- .../CodeGen/WebAssembly/tls-general-dynamic.ll | 10 + llvm/test/CodeGen/X86/callbr-asm-obj-file.ll | 19 - llvm/test/CodeGen/X86/callbr-asm.ll | 16 +- llvm/test/CodeGen/X86/vector-reduce-add-widen.ll | 192 +++------- llvm/test/CodeGen/X86/vector-reduce-add.ll | 192 +++------- llvm/test/MC/RISCV/rv32i-aliases-invalid.s | 1 + llvm/test/MC/RISCV/rv64i-aliases-invalid.s | 1 + llvm/test/Transforms/InstCombine/and-or-icmps.ll | 85 +++++ .../dce-cond-after-folding-terminator.ll | 5 +- llvm/test/tools/llvm-lipo/Inputs/arm64-slice.yaml | 12 +- llvm/test/tools/llvm-lipo/Inputs/armv7-slice.yaml | 12 +- llvm/test/tools/llvm-lipo/Inputs/i386-slice.yaml | 12 +- .../llvm-lipo/Inputs/i386-x86_64-universal.yaml | 30 +- llvm/test/tools/llvm-lipo/Inputs/x86_64-slice.yaml | 12 +- .../tools/llvm-lipo/verify-arch-macho-binary.test | 4 +- llvm/tools/llvm-config/BuildVariables.inc.in | 2 +- llvm/tools/llvm-config/CMakeLists.txt | 1 + llvm/utils/TableGen/CodeGenRegisters.cpp | 15 +- 110 files changed, 1661 insertions(+), 1293 deletions(-) create mode 100644 clang/test/CodeGen/split-lto-unit.c create mode 100644 clang/test/Sema/no_callconv.cpp delete mode 100644 compiler-rt/test/asan/TestCases/Linux/dlopen-mixed-c-cxx.c copy lld/test/wasm/{tls.ll => tls-align.ll} (50%) create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/contract-store.mir create mode 100644 llvm/test/CodeGen/AMDGPU/scheduler-handle-move-bundle.mir create mode 100644 llvm/test/CodeGen/AMDGPU/si-lower-sgpr-spills.mir delete mode 100644 llvm/test/CodeGen/X86/callbr-asm-obj-file.ll