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from e3ad0db GlobalISel: Implement widening for shifts new 1086a51 Re-commit: [globalisel] Tablegen-erate current Register Bank [...]

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Summary of changes: include/llvm/CodeGen/GlobalISel/RegisterBank.h | 2 +- .../llvm/Target/GlobalISel/RegisterBank.td | 9 +- include/llvm/Target/Target.td | 1 + lib/CodeGen/GlobalISel/RegisterBank.cpp | 7 +- lib/Target/AArch64/AArch64.td | 1 + lib/Target/AArch64/AArch64GenRegisterBankInfo.def | 209 +++----------- lib/Target/AArch64/AArch64RegisterBankInfo.cpp | 6 +- lib/Target/AArch64/AArch64RegisterBankInfo.h | 29 +- .../Target/AArch64/AArch64RegisterBanks.td | 15 +- lib/Target/AArch64/AArch64TargetMachine.cpp | 2 + lib/Target/AArch64/CMakeLists.txt | 1 + lib/Target/ARM/ARMRegisterBankInfo.cpp | 4 +- .../Target/GlobalISel/RegisterBank.td | 9 +- utils/TableGen/CMakeLists.txt | 1 + utils/TableGen/RegisterBankEmitter.cpp | 312 +++++++++++++++++++++ utils/TableGen/TableGen.cpp | 7 +- utils/TableGen/TableGenBackends.h | 1 + 17 files changed, 409 insertions(+), 207 deletions(-) copy tools/llvm-shlib/libllvm.cpp => include/llvm/Target/GlobalISel/RegisterBank.td (61%) copy bindings/go/llvm/version.go => lib/Target/AArch64/AArch64RegisterBanks.td (50%) copy tools/llvm-shlib/libllvm.cpp => llvm/Target/GlobalISel/RegisterBank.td (61%) create mode 100644 utils/TableGen/RegisterBankEmitter.cpp