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from afea6f4cd3a [RISCV] Bugfix createRISCVELFObjectWriter new 28cb7901b7b AMDGPU: Rename MaxFlatWorkgroupSize to MaxFlatWorkGroupSize [...] new 31ba2a29519 [Hexagon] Mark vector loads as predicable, update instructi [...]

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Summary of changes: docs/AMDGPUUsage.rst | 4 +- include/llvm/Support/AMDGPUKernelDescriptor.h | 2 +- include/llvm/Support/AMDGPUMetadata.h | 6 +- lib/Support/AMDGPUMetadata.cpp | 4 +- lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp | 2 +- lib/Target/Hexagon/HexagonDepInstrInfo.td | 185 ++++++++++++++------- lib/Target/Hexagon/HexagonInstrInfo.cpp | 25 +++ .../AMDGPU/attr-amdgpu-flat-work-group-size.ll | 8 +- .../AMDGPU/hsa-metadata-kernel-code-props.ll | 2 +- test/MC/AMDGPU/hsa-metadata-kernel-code-props.s | 4 +- 10 files changed, 170 insertions(+), 72 deletions(-)