This is an automated email from the git hooks/post-receive script.

unknown user pushed a change to branch master in repository llvm.

from 01f8f57 Reword comment to be more clear. new 05b523a ARM: Initialize LoadStore passes in TargetMachine new 7e0a8cb ARM/MIR: Move test from MIR to CodeGen/ARM directory new 4bd6d7f llc: Move pass query/add code into an own function; NFC new 3346c15 llc: Add support for -run-pass none

The 4 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.

Summary of changes: lib/Target/ARM/ARM.h | 4 ++ lib/Target/ARM/ARMLoadStoreOptimizer.cpp | 21 ++------ lib/Target/ARM/ARMTargetMachine.cpp | 4 ++ test/CodeGen/{MIR => }/ARM/ARMLoadStoreDBG.mir | 2 +- test/CodeGen/MIR/AArch64/cfi-def-cfa.mir | 2 +- .../MIR/AArch64/expected-target-flag-name.mir | 2 +- .../AArch64/generic-virtual-registers-error.mir | 2 +- .../MIR/AArch64/invalid-target-flag-name.mir | 2 +- test/CodeGen/MIR/AArch64/multiple-lhs-operands.mir | 2 +- .../MIR/AArch64/stack-object-local-offset.mir | 2 +- test/CodeGen/MIR/AArch64/target-flags.mir | 2 +- .../MIR/AMDGPU/expected-target-index-name.mir | 2 +- .../MIR/AMDGPU/invalid-target-index-operand.mir | 2 +- test/CodeGen/MIR/AMDGPU/target-index-operands.mir | 2 +- test/CodeGen/MIR/ARM/bundled-instructions.mir | 2 +- test/CodeGen/MIR/ARM/cfi-same-value.mir | 2 +- test/CodeGen/MIR/ARM/expected-closing-brace.mir | 2 +- .../MIR/ARM/extraneous-closing-brace-error.mir | 2 +- .../MIR/ARM/nested-instruction-bundle-error.mir | 2 +- test/CodeGen/MIR/Generic/basic-blocks.mir | 2 +- .../Generic/expected-colon-after-basic-block.mir | 2 +- .../expected-mbb-reference-for-successor-mbb.mir | 2 +- test/CodeGen/MIR/Generic/frame-info.mir | 2 +- .../Generic/function-missing-machine-function.mir | 2 +- .../MIR/Generic/invalid-jump-table-kind.mir | 2 +- .../CodeGen/MIR/Generic/llvm-ir-error-reported.mir | 2 +- test/CodeGen/MIR/Generic/llvmIR.mir | 2 +- test/CodeGen/MIR/Generic/llvmIRMissing.mir | 2 +- .../machine-basic-block-ir-block-reference.mir | 2 +- .../machine-basic-block-redefinition-error.mir | 2 +- .../machine-basic-block-undefined-ir-block.mir | 2 +- .../Generic/machine-basic-block-unknown-name.mir | 2 +- .../machine-function-missing-body-error.mir | 2 +- .../Generic/machine-function-missing-function.mir | 2 +- .../MIR/Generic/machine-function-missing-name.mir | 2 +- .../machine-function-redefinition-error.mir | 2 +- test/CodeGen/MIR/Generic/machine-function.mir | 2 +- test/CodeGen/MIR/Generic/register-info.mir | 2 +- ...ted-global-value-or-symbol-after-call-entry.mir | 2 +- test/CodeGen/MIR/Mips/memory-operands.mir | 2 +- .../MIR/NVPTX/expected-floating-point-literal.mir | 2 +- .../NVPTX/floating-point-immediate-operands.mir | 2 +- .../NVPTX/floating-point-invalid-type-error.mir | 2 +- .../MIR/PowerPC/unordered-implicit-registers.mir | 2 +- test/CodeGen/MIR/X86/basic-block-liveins.mir | 2 +- .../X86/basic-block-not-at-start-of-line-error.mir | 2 +- test/CodeGen/MIR/X86/block-address-operands.mir | 2 +- test/CodeGen/MIR/X86/callee-saved-info.mir | 2 +- test/CodeGen/MIR/X86/cfi-def-cfa-offset.mir | 2 +- test/CodeGen/MIR/X86/cfi-def-cfa-register.mir | 2 +- test/CodeGen/MIR/X86/cfi-offset.mir | 2 +- .../X86/constant-pool-item-redefinition-error.mir | 2 +- test/CodeGen/MIR/X86/constant-pool.mir | 2 +- test/CodeGen/MIR/X86/constant-value-error.mir | 2 +- test/CodeGen/MIR/X86/dead-register-flag.mir | 2 +- .../MIR/X86/def-register-already-tied-error.mir | 2 +- .../MIR/X86/duplicate-memory-operand-flag.mir | 2 +- .../MIR/X86/duplicate-register-flag-error.mir | 2 +- .../MIR/X86/early-clobber-register-flag.mir | 2 +- .../MIR/X86/expected-align-in-memory-operand.mir | 2 +- ...ted-alignment-after-align-in-memory-operand.mir | 2 +- .../X86/expected-basic-block-at-start-of-body.mir | 2 +- .../expected-block-reference-in-blockaddress.mir | 2 +- .../MIR/X86/expected-comma-after-cfi-register.mir | 2 +- .../X86/expected-comma-after-memory-operand.mir | 2 +- .../X86/expected-different-implicit-operand.mir | 2 +- .../expected-different-implicit-register-flag.mir | 2 +- ...ected-function-reference-after-blockaddress.mir | 2 +- .../expected-global-value-after-blockaddress.mir | 2 +- .../MIR/X86/expected-integer-after-offset-sign.mir | 2 +- .../MIR/X86/expected-integer-after-tied-def.mir | 2 +- .../X86/expected-integer-in-successor-weight.mir | 2 +- .../expected-load-or-store-in-memory-operand.mir | 2 +- test/CodeGen/MIR/X86/expected-machine-operand.mir | 2 +- ...expected-metadata-node-after-debug-location.mir | 2 +- .../X86/expected-metadata-node-after-exclaim.mir | 2 +- .../X86/expected-metadata-node-in-stack-object.mir | 2 +- .../expected-named-register-in-allocation-hint.mir | 2 +- ...ted-named-register-in-callee-saved-register.mir | 2 +- ...expected-named-register-in-functions-livein.mir | 2 +- .../MIR/X86/expected-named-register-livein.mir | 2 +- .../MIR/X86/expected-newline-at-end-of-list.mir | 2 +- test/CodeGen/MIR/X86/expected-number-after-bb.mir | 2 +- .../MIR/X86/expected-offset-after-cfi-operand.mir | 2 +- .../expected-pointer-value-in-memory-operand.mir | 2 +- .../expected-positive-alignment-after-align.mir | 2 +- .../X86/expected-register-after-cfi-operand.mir | 2 +- .../MIR/X86/expected-register-after-flags.mir | 2 +- ...xpected-size-integer-after-memory-operation.mir | 2 +- test/CodeGen/MIR/X86/expected-stack-object.mir | 2 +- .../MIR/X86/expected-subregister-after-colon.mir | 2 +- test/CodeGen/MIR/X86/expected-target-flag-name.mir | 2 +- .../MIR/X86/expected-tied-def-after-lparen.mir | 2 +- .../MIR/X86/expected-value-in-memory-operand.mir | 2 +- ...pected-virtual-register-in-functions-livein.mir | 2 +- test/CodeGen/MIR/X86/external-symbol-operands.mir | 2 +- .../MIR/X86/fixed-stack-memory-operands.mir | 2 +- .../X86/fixed-stack-object-redefinition-error.mir | 2 +- test/CodeGen/MIR/X86/fixed-stack-objects.mir | 2 +- .../MIR/X86/frame-info-save-restore-points.mir | 2 +- .../MIR/X86/frame-info-stack-references.mir | 2 +- .../MIR/X86/frame-setup-instruction-flag.mir | 2 +- test/CodeGen/MIR/X86/function-liveins.mir | 2 +- test/CodeGen/MIR/X86/generic-instr-type-error.mir | 2 +- test/CodeGen/MIR/X86/generic-virtual-registers.mir | 2 +- test/CodeGen/MIR/X86/global-value-operands.mir | 2 +- test/CodeGen/MIR/X86/immediate-operands.mir | 2 +- test/CodeGen/MIR/X86/implicit-register-flag.mir | 2 +- test/CodeGen/MIR/X86/inline-asm-registers.mir | 2 +- .../MIR/X86/instructions-debug-location.mir | 2 +- .../CodeGen/MIR/X86/invalid-constant-pool-item.mir | 2 +- .../CodeGen/MIR/X86/invalid-metadata-node-type.mir | 2 +- test/CodeGen/MIR/X86/invalid-target-flag-name.mir | 2 +- .../MIR/X86/invalid-tied-def-index-error.mir | 2 +- test/CodeGen/MIR/X86/jump-table-info.mir | 2 +- .../MIR/X86/jump-table-redefinition-error.mir | 2 +- test/CodeGen/MIR/X86/killed-register-flag.mir | 2 +- .../MIR/X86/large-cfi-offset-number-error.mir | 2 +- .../MIR/X86/large-immediate-operand-error.mir | 2 +- test/CodeGen/MIR/X86/large-index-number-error.mir | 2 +- test/CodeGen/MIR/X86/large-offset-number-error.mir | 2 +- .../MIR/X86/large-size-in-memory-operand-error.mir | 2 +- test/CodeGen/MIR/X86/liveout-register-mask.mir | 2 +- .../MIR/X86/machine-basic-block-operands.mir | 2 +- test/CodeGen/MIR/X86/machine-instructions.mir | 2 +- test/CodeGen/MIR/X86/machine-verifier.mir | 2 +- test/CodeGen/MIR/X86/memory-operands.mir | 2 +- test/CodeGen/MIR/X86/metadata-operands.mir | 2 +- test/CodeGen/MIR/X86/missing-closing-quote.mir | 2 +- test/CodeGen/MIR/X86/missing-comma.mir | 2 +- test/CodeGen/MIR/X86/missing-implicit-operand.mir | 2 +- test/CodeGen/MIR/X86/named-registers.mir | 2 +- test/CodeGen/MIR/X86/newline-handling.mir | 2 +- test/CodeGen/MIR/X86/null-register-operands.mir | 2 +- test/CodeGen/MIR/X86/register-mask-operands.mir | 2 +- .../X86/register-operands-target-flag-error.mir | 2 +- .../MIR/X86/simple-register-allocation-hints.mir | 2 +- .../X86/spill-slot-fixed-stack-object-aliased.mir | 2 +- .../spill-slot-fixed-stack-object-immutable.mir | 2 +- .../MIR/X86/spill-slot-fixed-stack-objects.mir | 2 +- test/CodeGen/MIR/X86/stack-object-debug-info.mir | 2 +- test/CodeGen/MIR/X86/stack-object-invalid-name.mir | 2 +- .../stack-object-operand-name-mismatch-error.mir | 2 +- test/CodeGen/MIR/X86/stack-object-operands.mir | 2 +- .../MIR/X86/stack-object-redefinition-error.mir | 2 +- test/CodeGen/MIR/X86/stack-objects.mir | 2 +- test/CodeGen/MIR/X86/standalone-register-error.mir | 2 +- test/CodeGen/MIR/X86/subreg-on-physreg.mir | 2 +- .../CodeGen/MIR/X86/subregister-index-operands.mir | 2 +- test/CodeGen/MIR/X86/subregister-operands.mir | 2 +- .../MIR/X86/successor-basic-blocks-weights.mir | 2 +- test/CodeGen/MIR/X86/successor-basic-blocks.mir | 2 +- test/CodeGen/MIR/X86/tied-def-operand-invalid.mir | 2 +- test/CodeGen/MIR/X86/undef-register-flag.mir | 2 +- .../MIR/X86/undefined-fixed-stack-object.mir | 2 +- test/CodeGen/MIR/X86/undefined-global-value.mir | 2 +- .../MIR/X86/undefined-ir-block-in-blockaddress.mir | 2 +- .../undefined-ir-block-slot-in-blockaddress.mir | 2 +- test/CodeGen/MIR/X86/undefined-jump-table-id.mir | 2 +- .../MIR/X86/undefined-named-global-value.mir | 2 +- test/CodeGen/MIR/X86/undefined-register-class.mir | 2 +- test/CodeGen/MIR/X86/undefined-stack-object.mir | 2 +- .../MIR/X86/undefined-value-in-memory-operand.mir | 2 +- .../CodeGen/MIR/X86/undefined-virtual-register.mir | 2 +- test/CodeGen/MIR/X86/unknown-instruction.mir | 2 +- .../MIR/X86/unknown-machine-basic-block.mir | 2 +- test/CodeGen/MIR/X86/unknown-metadata-keyword.mir | 2 +- test/CodeGen/MIR/X86/unknown-metadata-node.mir | 2 +- .../MIR/X86/unknown-named-machine-basic-block.mir | 2 +- test/CodeGen/MIR/X86/unknown-register.mir | 2 +- .../MIR/X86/unknown-subregister-index-op.mir | 2 +- test/CodeGen/MIR/X86/unknown-subregister-index.mir | 2 +- test/CodeGen/MIR/X86/unrecognized-character.mir | 2 +- .../MIR/X86/used-physical-register-info.mir | 2 +- .../X86/variable-sized-stack-object-size-error.mir | 2 +- .../MIR/X86/variable-sized-stack-objects.mir | 2 +- .../X86/virtual-register-redefinition-error.mir | 2 +- test/CodeGen/MIR/X86/virtual-registers.mir | 2 +- tools/llc/llc.cpp | 56 +++++++++++++--------- 179 files changed, 221 insertions(+), 214 deletions(-) rename test/CodeGen/{MIR => }/ARM/ARMLoadStoreDBG.mir (98%)