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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-allyesconfig in repository toolchain/ci/llvm-project.
from 7727cc242db7 [NFC][X86] Split VPMOV* AVX2 instructions into their own s [...] adds b32e76c6d507 [mlgo] fix build rules adds 2554f99b554f Opaque pointers: Migrate examples to use load with explicit type adds 499571ea835d Add workaround for false positive in -Wfree-nonheap-object adds 9f6649dd1249 Add void cast to suppress -Wunused-member-variable on asse [...] adds 30df6d5d6a85 Preprocessor conditionalize some assert-only functions to [...] adds 1cc9d949a123 [C++20, test] Fix use of undef FileCheck variable adds f1d4af4058e8 [InstCombine] Reapply update_test_checks.py to unsigned-mu [...] adds 732a90da785d [InstCombine] precommit pr49688.ll (NFC) adds 6147501617f0 [InstSimplify] Add a test for folding comparison with a un [...] adds 5207cde5cb41 [InstCombine] Conditionally fold select i1 into and/or adds 1b4800c26259 [clang][parser] Set source ranges for GNU-style attributes adds a2ea003fcb78 [RISCV] Don't convert fshr/fshl to target specific FSL/FSR [...] adds c4c511337247 [NFC][scudo] Restore !UseQuarantine check in tests adds 602ab188a7e1 Revert "Add support for fetching signed values from tagged [...] adds 3ac2541b5c31 [CVP] Add test for and of min (NFC) adds 72e0846ef87d [LVI] Don't bail on overdefined value in select adds 6e96de8abf27 [mlir][NFC] Fully spell mlir types names in LoopLikeOpInte [...] adds 6fbbb093aea5 Don't check that std::pair is trivially copyable on FreeBSD adds 64a52e1e3266 [llvm-exegesis] Don't erroneously refuse to measure POPCNT [...] adds fd73e4d4b299 [CVP] Add more tests for select with overdefined operand (NFC) adds d094f3c3c5c4 [llvm-exegesis] SnippetFile: do create source manager in M [...] adds 241d42c38226 Speculative fix for failing build bot. adds cb4443994e72 [SimplifyCFG] Make test more robust (NFC) adds 7ca168dd5ada [SimplifyCFG] Add switch-to-select test with two equal cas [...] adds 9bad7de9a3fb [SimplifyCFG] Handle two equal cases in switch to select adds f18efb70c43b [InstCombine] add tests for ctpop of power-of-2; NFC adds c0645f13243c [InstCombine] fold popcount of exactly one bit to shift adds f61978388279 [libcxx] [test] Link against msvcprt as C++ ABI library in tests adds e92d2b80c6c9 [Driver] Detect libstdc++ include paths for native gcc (-m [...] adds c2c68a5940dc [libc++] Improve generate_feature_test_macro_components.py. adds a41b5100e438 [HIP-Clang, test] Fix use of undef FileCheck var adds 292726b6443c [HIP, test] Fix use of undef FileCheck var adds 98d5db3e3a3f [RISCV] Lower orc.b intrinsic to RISCVISD::GORCI. adds 5352490ce613 [NFC][InstCombine] Add test for PR49778 adds dceb3e599668 [NFC][InstCombine] Extract canTryToConstantAddTwoShiftAmou [...] adds 2760a808b991 [InstCombine] dropRedundantMaskingOfLeftShiftInput(): chec [...] adds 27e5bffbf62c [libc++] Fix the header guard from _LIBCPP_STEAMBUF to _LI [...] adds 9abff04e506f [libc++] Fix test_macros.h in the same way as commit 49e5a [...] adds ec575e3b0a46 [sanitizer] Simplify GetTls with dl_iterate_phdr on Linux adds 4708a05da030 [RISCV] Use gorciw for i32 orc.b intrinsic when Zbp is enabled. adds 10ed479d7303 [lldb] Import ObjectiveC module instead of Foundation in test adds d1a1798e51a3 [lldb] Replace unneeded use of Foundation with ObjectiveC [...] adds 907af8439672 [CUDA][HIP] rename -fcuda-flush-denormals-to-zero adds a91628cb59f6 [Test] Add tests for various scenarios of PRE of a loop load adds 1a218589964a [Test] Split out new and old PM tests adds 67133ee1d280 [Test] Auto-update checks in a test adds 162848654842 ignore -flto= options recognized by GCC adds 5c25ff8739e0 [OCaml] Fix unsafe uses of Store_field adds 58bb9222dd29 [OCaml] Minor optimizations by avoiding double initialization adds e5b7fedc573c [OCaml] Code simplification using option allocation functions adds 2c82ea1849dc [OCaml] Code simplification using string allocation functions adds d9bbd9864578 [OCaml] Omit unnecessary GC root registrations adds 8e4fc55a0e54 [NFC][OCaml] Remove vestigial CAMLprim declarations adds f4d156aed0f8 [NFC][OCaml] Reformat to clean up following CAMLprim removal adds 4dd3e0feca92 [DebugInfo, CallSites, test] Fix use of undef FileCheck var adds 2523fe8a6895 [X86] Add second PR47603 test case adds 36d4f6d7f8ad [X86] Fold xor(zext(xor(x,c1)),c2) -> xor(zext(x),xor(zext [...] adds 0d0514dd9b81 [RISCV] Add a test showing incorrect codegen adds 5f57793c4fe4 * NFC. Refactored DIPrinter for better support of new prin [...] adds 13a84f21d7ce [TableGen] [docs] Correct a couple of mistakes; use 'true' [...] adds 00a84f9a7f89 [SLP]Improve vectorization of the CmpInst instructions. adds 2aebb7cb3c88 [OpenMP] Fix incorrect KMP_STRLEN() macro adds 660c4e57b4a7 [PowerPC] Fix issue where binary uses a .got but is missin [...] adds 803b79221edf [SemaObjC] Fix a -Wbridge-cast false-positive adds 3f0df4d7b026 [RISCV] Expand scalable-vector truncstores and extloads adds 62a94b725cd2 [M68k] Mark public functions with the LLVM_EXTERNAL_VISIBI [...] adds c0b0da468490 [InstCombine] add test for miscompile from select value eq [...] adds c590a9880d7a [InstCombine] fix potential miscompile in select value equ [...] adds af3a839c70ad [RISCV] Add support for bitcasts between scalars and fixed [...] adds 7416e8a8431a [flang][driver] Add options for -Werror adds df64f471d1e2 [analyzer] DynamicSize: Store the dynamic size adds 6a82ace5f27f [LoopFusion] Bails out if only the second candidate is gua [...] adds 31ad5c14fefa [flang][driver] Modify the existing test cases that use -M [...] adds 89d210fe1a7a [analyzer] DynamicSize: Debug facility adds 9b3df78b4c2a [analyzer] DynamicSize: Rename 'size' to 'extent' adds 5abc72501227 [gn build] Port 9b3df78b4c2a adds 0116d04d04f2 [TextAPI] move source code files out of subdirectory, NFC adds 982396ddd7df Revert "Fix build rules for LLVM_WITH_Z3 after D95727" adds e07e08f3662a Revert "llvm-shlib: Create object libraries for each compo [...] adds 6103f3f39cc9 [gn build] (manually) port 0116d04d04f2 adds dc1a08caeff4 [lld][WebAssembly] Rewrite exports test in assembly. NFC adds ea069aebccd3 [mlir][Linalg] NFC: Move populatePatterns* method into lin [...] adds 7078ef472250 [OPENMP51]Initial support for nocontext clause. adds 4db18d62afa8 [M68k] Add support for Motorola literal syntax to AsmParser adds 7edda698c0f0 [RISCV] Move VSLIDE1UP_VX pattern out of a loop that inclu [...] adds be11bd1e9f01 [tests] Precommmit tests for reasoning about equality of r [...] adds b0e59dd6e1f6 Extract a helper for figuring out if an operator is invert [...] adds 1d4c7429a72c Fix copy paste errors in tests from be11bd1e adds af2837675a70 [RISCV] Split RISCVISD::VMV_S_XF_VL into separate integer and FP. adds 780a47285a78 [RISCV] Add SDTCisInt to the SDTRVVSlide1 since it is only [...] adds 828ec9e9e5da [OpenCL, test] Fix use of undef FileCheck var adds 78e5cf66fec5 [InstSimplify] add test for vector select with operand rep [...] adds e2a0f512eaca [InstSimplify] fix potential miscompile in select value eq [...] adds 740e3497629c [libcxx] [ci] Add a Windows CI buildkite configuration adds a46f59a747a7 [mlir][sparse] move new test to right directory structure adds 9711118d2edf Rework the way statement attributes are processed; NFC adds 0e92cbd6a652 Revert "[sanitizer] Simplify GetTls with dl_iterate_phdr o [...] adds 8c7bf2f93da9 [flang] Improve constant folding for type parameter inquiries adds 944a2fe7633f [mlir][Linalg] Add callbacks to fusion of elementwise oper [...] adds 391514436db4 [RISCV] Add more RV32 vslide1up intrinsic test cases. NFC adds 30b3aab3299a Copy syncscope when expanding atomicrmw into cmpxchg loop adds be0ced03ba9b Revert "Revert "Add support for fetching signed values fro [...] adds dc8d864e3a91 Address minor post commit feedback on 0e59dd adds c25c22d5f9b7 [libcxx] moves `std::invoke` into `__functional_base` adds 812ce7f9beb2 [Polly] Refactoring isInnermost() from isl to use the C++ wrapper adds 13deb6aac723 Exact ashr/lshr don't loose any set bits and are thus triv [...] adds ea0e2ca1acb2 [SROA] Allow SROA on pointers with invariant group intrinsic uses adds 58ccbd0d08fe Comment adjustments for a rename adds cb1028a0b95f [RISCV] When custom iseling masked stores, copy the mask i [...] adds 872c57c90ac6 [NewPM] Change tests to run them without PreserveCFGChecker. NFC adds 0057ec8034d8 [Statepoint] Factor-out utility function to get non-foldab [...] adds 22411d807238 [MLIR][docs] Fixes to operation syntax in Lang Ref adds 39e3e3aa51d6 [NewPM] Redesign of PreserveCFG Checker adds 98742e42fc50 [NewPM] Fix unused lambda capture build error adds cc26943313de [clang][cli] Ensure plugin args are generated in determini [...] adds 94d0fc32f54b [AMDGPU] Add some missing testing for new subtargets gfx90 [...] adds ef05b08c612d [AArch64] Use 64-bit movi for zeroing halfs/floats adds f1313b3b249a [NFC][WebAssembly] Removed mangled name from test. adds b7ef80480785 Revert "[flang] Improve constant folding for type paramete [...] adds 2935737da32d [clang][tooling] Create SourceManager for DiagnosticsEngin [...] adds d5f1131c812d [AArch64] Default to zero-cycle-zeroing FP registers adds bee4813789a3 [clang][Checkers] Fix PthreadLockChecker state cleanup at [...] adds ddbb58736a3f [KnownBits] Rename KnownBits::computeForMul to KnownBits:: [...] adds 167ea67d76c2 [IR] Ignore bitcasts of function pointers which are only u [...] adds 2fc761aac93a [PhaseOrdering] Add PR45687 test coverage adds 638d70be6b93 [test, AArch64] Fix use of var defined in CHECK-NOT adds f8f4d8f87ba4 [lldb] Improve CPUInfo test predicate adds 66c05609e0d5 [RISCV][Clang] Add some RVV Integer intrinsic functions. adds 0a18ea01f197 [RISCV][Clang] Add RVV vnsra, vnsrl and vwmul intrinsic fu [...] adds f720c22e7729 [RISCV][Clang] Add RVV Widening Integer Extension intrinsi [...] adds fe252b509ee6 [RISCV][Clang] Add more RVV Integer intrinsic functions. adds f2a3601aa5a5 [RISCV][Clang] Add all RVV Fixed-Point Arithmetic intrinsi [...] adds 34f8a7f93c98 [lsan][test] Disable many_tls_keys_pthread.cpp on AArch64 adds f6ee97d8271e [rt] Update DIPrinter usage in 'sanitizer_symbolize.cpp`. adds 6eb5b06ecfe4 [AMDGPU] Regenerate checks to fix prefixes broken in D96340. NFC. adds 201877d57264 [CostModel][X86] Improve accuracy of vXi8 multiply reducti [...] adds 476e087939e4 [LLDB] Fix building for aarch64 windows after d6d3d21cd1cb [...] adds b78e883fd8b3 [CMake] Fix Python 3 lookup when building LLVM with tests adds 3eadcb86abd2 [AMDGPU][MC][GFX9] Corrected SMEM decoding adds a6b06b785cda [VPlan] Print VPValue operands for VPWidenPHI if possible. adds 857b8a73da91 [LoopVectorize] Change the identity element for FAdd adds 65c22acfa4a4 Silence -Woverloaded-virtual warnings from generated code; NFC adds 82b3e28e836d [SystemZ][z/OS][Windows] Add new OF_TextWithCRLF flag and [...] adds 2901dc757587 Don't directly dereference getAs<> casts to avoid potentia [...] adds b8aba76a4eab LoopFlatten - CanWidenIV - Fix uninitialized variable warn [...] adds 6fec0a34ceb0 [AMDGPU] Fix typo in regular expression checks. NFC. adds 7dc7790ec52e [mlir] Fix support for lowering non-32-bit affine reductions. adds e07a9b38a689 [InstCombine] Add PR45984 test case adds 0bf4836dc4cf [AMDGPU] Fix dubious regexes with unescaped brackets. NFC. adds bdfee7d5e192 [lldb][NFC] Fix misleading indentation in Cocoa.cpp adds 5efe9efdadcb [X86] Add ANDN test case for PR48768 adds 5ab489d9ae99 [NFC][InstCombine] Add tests for '((X - Y) - Z)' pattern ( [...] adds 31d219d2997f [InstCombine] Fold `((X - Y) - Z)` to `X - (Y + Z)` (PR49858) adds 849d3729433e [NFC][Clang] Speculative fix for builtins-ppc-quadword-noi128.c adds 1dcb5b5e8978 [X86] Improve optimizeCompareInstr for signed comparisons [...] adds 88c2454057b6 [InstCombine] Add PR38929 test case adds 7344f3d39a0d [LoopVectorize] Add strict in-order reduction support for [...] adds e9608a84d881 [AMDGPU][SDag] Add IMG init also for image_gather4 instructions adds ccb361af6cf7 [llvm-symbolizer] Don't use the same 'OutputStyle' name fo [...] adds cf4f5292f637 [AMDGPU] SIFoldOperands: use getVRegDef instead of getUniq [...] adds ce9cca6c3a31 [AMDGPU] SIFoldOperands: rename tryFoldInst to tryFoldCndMask adds 005dcd196ef6 [AMDGPU] SIFoldOperands: use range-based loops and make_ea [...] adds efc7bf27f5ee [AMDGPU] SIFoldOperands: use MachineRegisterInfo::hasOneNo [...] adds ce4acb01b315 Avoid unused variable warning in Release builds adds fb6a5237aa73 Revert "[IR] Ignore bitcasts of function pointers which ar [...] adds 23929af383f2 [Windows] Turn off text mode correctly in Rewriter to stop [...] adds 52ecd94cfbca Remove last remnants of PR49607 migration [NFC] adds 844012940e17 AMDGPU: Add isBranch=1 to SOPP branch instructions adds b660abc80d0d [ObjC] Add a command line flag that disables recognition o [...] adds 14a7296c0120 [clang][clangd] Avoid inconsistent target creation adds b36ef9f47db7 [MLIR, test] Fix use of undef FileCheck var adds fa818bb0357d [CMake][Compiler-rt] Compute `LLVM_MAIN_SRC_DIR` assuming [...] adds fd28517d878e [CMake][Compiler-rt] Make it possible to configure standal [...] adds 21d48399484c Move GCRelocateInst and GCResultInst to IntrinsicInst.h [nfc] adds 916093f49faf [SystemZ][z/OS] correct rc and errno within nanosleep() adds 518e6f341ddd [mlir][Linalg] Fix fusion on tensors operands / bbArg mismatch adds 53283cc2f1dd [X86][SSE] canonicalizeShuffleWithBinOps - add MOVSD/MOVSS [...] adds f98567b3fecb [AIX][TLS] Add support for TLS variables to XCOFF object writer adds 17f4f23eeab4 [MLIR, test] Fix use of undef FileCheck var adds 9c5ebf035896 [test, GVN] Fix use of var defined in CHECK-NOT adds 93c87fc06eca [index] Improve macro indexing support adds a3e1b1112317 [Sanitizer] Adopt Python 3 for iOS simulator test scripts adds 710651c61dcd [lldb] Fix bug where memory read --outfile is not truncati [...] adds 5571cc7deed6 [mlir][linalg] Add helpers for linalg.tiled_loop [nfc]. adds 04b3c8c52c54 Pass -fcrash-diagnostics-dir along to LLVM adds 9c8b28a69b95 [llvm-reduce] Remove unwanted module inline asm adds 96dbdd753a1f [libcxx] adds remaining callable concepts adds dc8d63de5d5e [lldb] Format Plugins/Language/ObjC/Cocoa.cpp (NFC) adds 8f798566a398 [AMDGPU] SIFoldOperands: use isUseMIInFoldList. NFC. adds 3ae03f67fe41 [RISCV] Add helper function to share some of the code for [...] adds 91d6debbb913 [libcxx] [test] Use dedicated types for the invocable conc [...] adds 948dd664c3ed [libcxx] Fix the type attribute for a couple templates adds 48268aa0a9c1 [mlir][python] Add missing affine map compression test adds 4059c1c32d37 [SimplifyInst] Use correct type for GEPs with vector indices. adds 801cea2ce951 [lldb] Fix else-after-return in AppleObjCRuntimeV2 (NFC) adds 4e83e59eb8f0 [GVN] Add missing ICF update adds a9a7498b3f25 [libcxx] [test] Allow C:\System Volume Information to be missing adds 3b1b1d7530e6 Fix f6ee97d8271e1dfd9b6572222fefe8f40433952e: adds a6d2a8d6f59a Add a subclass of IntrinsicInst for llvm.assume [nfc] adds e0df2b540a5a [lld-macho] Rename SubsectionMapping to SubsectionMap adds 174deb0539ee [lld-macho] clang-format cleanup adds fb41cae03976 More precisely type code used for gc.relocate assertions [nfc] adds a7ef45bc5c1d [NewPM] Fix -Wunused-lambda-capture in -DLLVM_ENABLE_ASSER [...] adds bd6033eca7be [PowerPC] Materialize 34-bit constants with pli directly adds 1d9d7f6a2c0f [MLIR, test] Fix use of undef FileCheck var adds 9456e720ec84 [lld-macho][nfc] Rename some tests adds 94f75202accb [lld-macho][nfc] Remove HelpHidden from aliases to impleme [...] adds ceec610754b0 [lld-macho] Fix & refactor symbol size calculations adds fcc57558783b [mlir] Remove no-op array assignment in dictionaryAttrSort(). adds ae318beb3551 [libc++] Post-commit review on D99928. adds 2d0f1fa472a9 [libc++] Header inclusion tests. adds 8fbc05acd553 [Windows] Add test coverage for line endings when rewritin [...] adds ddebed8e9742 [clang-tidy] performance-* checks: Match AllowedTypes agai [...] adds 61d065e21ff3 Let clang atomic builtins fetch add/sub support floating p [...] adds 0c3bc1f3a477 [ASan][RISCV] Fix RISC-V memory mapping adds b09df246cad9 [lit testing] Fix xfail-cl.py test worker count adds 96caf3817f47 [mlir] Hoist out getRequestedOpDefinitions helper adds 9ef6aa020b6f Plumb AssumeInst through operand bundle apis [nfc] adds d0615a93bb6d [NVPTX] Handle bitcast and ASC(101) when trying to avoid a [...] adds 3ba246719b7c [test, AArch64] Fix use of var defined in CHECK-NOT adds 69190f95b169 [libc++] NFCI: Fix test pinning down RTTI implementation o [...] adds 908215b34636 Use AssumeInst in a few more places [nfc] adds 4bf8985f4fb1 Replace calls to IntrinsicInst::Create with CallInst::Crea [...] adds dfec26b186d2 Thread safety analysis: Don't warn about managed locks on [...] adds 0312b25df0a8 [mlir][tosa] Add tosa.table lowering to linalg.generic adds c060945b23a1 [docs] Update documentation for bugprone-misplaced-widening-cast adds d81d9e8b8604 [SplitEdge] Update SplitCriticalEdge to return a nullptr o [...] adds 0126e906483c [MLIR] [Python] Add capsule methods for pybind11 to PyOperation adds 0d6dd23ca9a3 [MachineValueTypes] Add blank lines between floating point [...] adds 2461804b484e [lld-macho] Symbol::value should always be uint64_t adds 3da61ddae7fe [OpenMP] Define omp_is_initial_device() variants in omp.h adds 2641c1f15ea5 [RISCV] Don't custom type legalize fixed vector to scalar [...] adds 52cc9df1c14c [flang] Improve constant folding for type parameter inquiries adds a1aada75f565 [docs] Fix doxygen comments wrongly attached to the llvm n [...] adds 01a23dccb1a1 [RISCV] Add an assertion to the ReplaceNodeResults handlin [...] adds 4fd05e0ad7fb [HIP] Change to code object v4 adds 86175d5fedba Minor fix for test hip-code-object-version.hip adds e74e6afcf13a [shape] Add min and max ops adds 401826800ef1 Add missing CHECK lines in test adds b5c63e30ca1a [NewPM] Set verify-cfg-preserved=1 by default for debug builds adds c4c98c1b0a0c Removed redundant code. adds 5d07dc897707 [dsymutil] Don't emit .debug_pubnames and .debug_pubtypes adds 233c24330b8e [dsymutil] Don't keep old abbreviations adds 162c2759b66a [dsymutil] Stop emulating dsymutil-classic CIE caching behavior adds 8b109bc2eae0 [mlir,shape] Add max/min folder for simple case adds a547b4e26b31 Revert "[InstCombine] Fold `((X - Y) - Z)` to `X - (Y + Z) [...] adds cedd07df5136 [libcxx] fixes `common_reference` requirement for `swappab [...] adds 000cf84cf1bb Revert "[NFC][Clang] Speculative fix for builtins-ppc-quad [...] adds fee330824a2b [SCEV] Fix false-positive recognition of simple recurrence [...] adds 03f7b13d4452 [X86] Initialize TargetOptions::StackProtectorGuardOffset [...] adds 030ac786d4ff [Orc][examples] Add lit ToolSubst for LLJITWithRemoteDebug [...] adds 033c9c25520c [PowerPC] Fix use check of swap-reduction adds 0aa0458f1429 [CGCall] Annotate `this` argument with alignment adds b62c62c51973 [Coroutines, test] Fix use of var defined in CHECK-NOT adds e018698bec36 [clang, test] Fix use of undef FileCheck var adds 73a7d451a2ca [PowerPC, test] Fix use of undef FileCheck var adds c972e2d1c29f [NFC][InstCombine] Add sub-of-sub tests with constant expressions adds 93d1d94b745b [InstCombine] Restrict "C-(X+C2) --> (C-C2)-X" fold to imm [...] adds 2829094a8e25 Reland [InstCombine] Fold `((X - Y) - Z)` to `X - (Y + Z)` [...] adds 792ee5be3692 [Orc][examples] Add missing FileCheck for lit test and pol [...] adds 35bc7569f8ad [OpenCL] Add as_size/ptrdiff/intptr/uintptr_t operators adds cd824a48cccb [clang][Syntax] Handle invalid source range in expandedTokens. adds f37ea62e57b5 [CMake] try creating symlink first on windows adds 43637c0dfeeb Fix crash when an invalid URI is parsed and error handling [...] adds a7eb6b00e934 [X86] Add BZHI test case for PR48768 adds 4821c15691ba [analyzer] Fix body farm for Obj-C++ properties adds 3e738afae4b5 [Statepoint Lowering] Allow other than N byte sized types [...] adds 77f1e096e8a0 [-Wcompletion-handler] Don't recognize init methods as con [...] adds 583258723fe2 [X86] Improve optimizeCompareInstr for signed comparisons [...] adds f0e102c1a39f [analyzer][NFC] Add tests for extents adds 6951b72334bb [clang] Speedup line offset mapping computation adds 7ca4dd82175c [Clang] Extend test coverage for -f[no-]finite-loops options. adds c0ef93bec85a [X86] Add AND/OR/XOR signed-comparison overflow test cases [...] adds 65a3f289397f [mlir] Add "mask" operand to vector.transfer_read/write. adds e571e56ae839 [InstCombine] add tests for not-of-min/max; NFC adds 0333ed8e0c37 [InstCombine] move abs transform to helper function; NFC adds fc1117df5b87 [clang] Check AuxTarget exists when creating target in Com [...] adds b83a4450c216 [flang][driver] Add support for `-cpp/-nocpp` adds bf6cab6f07e1 [AMDGPU] SIFoldOperands: don't dump extra '\n' after Machi [...] adds 85b86c6f43ab [flang][driver] Fix `-fdebug-dump-provenance` adds a78e86e6beb2 [SLP]Avoid multiple attempts to vectorize CmpInsts. adds 302e7480655b [X86] Improve optimizeCompareInstr for signed comparisons [...] adds c22b09debddb Revert "[clang] Speedup line offset mapping computation" adds 798b0fd36b48 [NPM] Fix typo inisLTOPreLink for loop rotate adds 2dc6be52093a [AMDGPU] Update SGPRSpillVGPRCSR name. NFC adds f23b259e1877 [WebAssembly] Improve error messages regarding missing ind [...] adds 672f67300466 [SVE] Remove checks for warnings in scalable-vector tests. adds 628dda08b82f [mlir,shape] Update min/max op description adds 1bcf58b2136d [SystemZ][z/OS][TableGen] TableGen files should be text adds 3b460f8cc087 [mlir] Export python-related .cmake files adds 93fb72575f7a [X86][AVX] Add HADD lane crossing test adds 6d5132b426fb [CSSPGO] Fix incorrect probe distribution factor computati [...] adds d855a727bbf3 [lld-macho][nfc] Add test for ARM64 stubs adds 982e3c05108b [lld-macho] Sibling N_SO symbols must have the empty string adds c7ad02009934 [libcxx] adds remaining callable concepts adds 920c0f7e09e2 [libcxx] adds __cpp_lib_concepts feature-test macro adds 1894c6c59e37 [InstCombine] avoid infinite loop from partial undef vectors adds 48fa06f70b07 [libc++] Update contributor documentation. adds 24f67473dd12 [InstCombine] foldAddWithConstant(): don't deal with non-i [...] adds b3e9b07a7d1c Avoid testing for libc++ internal macros after D99834 adds 3acf49829c00 [mlir][sparse] support integral types i32,i16,i8 for *nume [...] adds 5fc0e98d9a06 [LoopIdiomRecognize] Minor cleanups to the FFS idiom match [...] adds 67953311e2e3 [SelectionDAG] Teach SelectionDAG::FoldConstantArithmetic [...] adds df59850038d8 [HIP] Fix rocm-detect.hip test path adds f087d7544a41 [RISCV] Support vslide1up/down intrinsics for SEW=64 on RV32. adds f49a4440d38a [lldb][Editline] Fix crash when navigating through empty c [...] adds ffc65824f0ee [lld-macho][nfc] Minor refactoring + clang-tidy fixes adds 028092eb613e Correct the tablegen logic for MutualExclusions attribute [...] adds 5c8462b5daa2 [Windows] Remove global OF_None flag for Windows in ToolOu [...] adds 90af13447333 Revert "[AsmPrinter] Delete dead takeDeletedSymbsForFunction()" adds 6415f424bc2a [AArch64] Materialize FP constant in code for large code model adds 6e36859a84df [BasicAA] Extend test coverage for GEP modulo logic. adds 989528519116 [RISCV] Replace 'return ReplaceNode' with 'ReplaceNode; re [...] adds 676a9ab5e406 Remove .gitignore entries not relevant in the monorepo. adds 39ee9fd8c1c2 [mlir] Fixed alignment attribute of alloc constant folding. adds 7d8513b7f2e9 [clang] Move int <-> float scalar conversion to a separate [...] adds ebf2dc33287e Fix missing generate capture expression for novariants condition. adds db851dfb4958 [lld-macho] Make time-trace* options more permissive. adds a723310b419b [Driver][test] Test intended target only adds 2da6ce60a5e9 [libc++abi] Adjust XFAIL for misaligned exception header on ARM adds 56ea2e2fdd69 [RISCV] Add a special case to lowerSELECT for select of 2 [...] adds 79ac5bbb96c4 [LLDB] Clarifying the documentation for variable formattin [...] adds aca26133309e [InstCombine] add test for min/max intrinsic with not ops; NFC adds c0bbd0cc35b9 [InstCombine] fold not ops around min/max intrinsics adds 0056e7e15ac0 [BasicAA] Add another GEP modulo test with shl with odd op. adds d5d412f2aec1 [AMDGPU] Split GCNRegBankReassign adds 4658cd4c18ba [AMDGPU] Update gfx90a memory model support adds 37878de50367 Disable use of SCC bit from asm adds d9065fe8ea64 [lld-macho] Parallelize __LINKEDIT generation adds 5f6b3d1833fd [RISCV] Use multiclass inheritance to simplify some of ris [...] adds f5645ea65f0d [LoopInterchange] Fix transformation bugs in loop interchange adds 2e9465ce2ef6 [NFC][AMDGPU] Correct indentation in AMDGPUUsage.rst adds 593cb4655097 Revert "[LoopInterchange] Fix transformation bugs in loop [...] adds 74e77295e754 [PowerPC] fixup killed flags for ri + addi to ri transformation adds d5fee599c520 [AMDGPU] Add some exhaustive ds read/write alignment tests adds ac64995ceb40 [AMDGPU] Only use ds_read/write_b128 for alignment >= 16 adds 65b1103798df [RISCV] DAG nodes and pseudo instructions for CSR access adds 8ac5e440615d [Driver] Drop $DEFAULT_TRIPLE-$name as a fallback program name adds 0918f44e2670 [docs] Document our norms around reverts adds 73cbc7f60ed9 Include `llvm-config` and `not` in AppleClang toolchains. adds eb7f5eaf3500 Change the default value for `preloadDialectsInContext` fo [...] adds 2a2720a2dec4 [CSSPGO] Move pseudo probes to the beginning of a block to [...] adds 648544f998cd [Constant] ConstantStruct/Array should not lower poison to undef adds fe16aa7d6551 [Constant] Remove unused variable adds b8cd6681156a [NFC][RISCV] Add test for scalable offset under large stack size. adds ba72bdef3250 [RISCV] Add scalable offset under very large stack size. adds 0c36da722aa5 [Debug-Info] Use inlined strings in .dwinfo section by def [...] adds 0a1c6637a1e8 [GreedyRA ORE] Compute ORE stats if extra analysis is enabled adds df2578779778 [GreedyRA ORE] Extract stats in RAGreedyStats struct. NFC. adds 6b64c662c795 [GreedyRA ORE] Extract computeNumberOfSplillsReloads to us [...] adds edb18ea5a913 [AsmParser] Recognize more escaped characters between sing [...] adds 20105b6b4874 [clang] Speedup line offset mapping computation adds b614ada0e80f [mlir] add support for index type in vectors. adds 04419628e011 [AMDGPU, test] Fix use of undef FileCheck var adds d9773c1b4eb1 Reorg firmware corefile tests; add test for OS plugin loading adds 8fcb114d002b [OpenCL] Fix mipmap read_image return types adds a5693445cac0 [RISCV] Support OR/XOR/AND reductions on vector masks adds 1a4d3d0bca2b [LV] Add a logical and/or select cost test. NFC adds 8675ef100f8c [LV] Logical and/or select costs adds e81b3401177a [flang][driver] Add debug options not requiring semantic checks adds a0e8738d4527 [GreedyRA ORE] Add function level spill/reloads stats adds 6e8601ff4ae1 [OpenCL][Docs] Fix typo in section label adds 4b273b198265 [flang][nfc] Rename some test files adds 2a1f87167cc0 [NVPTX] Fix compiler warning in NDEBUG build [NFC] adds b601c6719226 [lldb] [client] Support for multiprocess extension adds aa165eac322d [NFC][X86][CostModel] Add some load/store tests w/ non-pow [...] adds 140757bfaaa0 [DebugInfo] Prevent invalid debug info being produced duri [...] adds 94a6fe43de45 [AMDGPU] SIFoldOperands: refactor tryFoldCndMask with earl [...] adds 004f29c0bb3c [mlir][spirv] Timely fail type conversion adds 5299843c3146 [mlir][spirv] Add control for non-32-bit scalar type emulation adds 1206313f82f8 [CodeGen][AArch64] Fix isel crash for truncating FP stores adds 3b9a15d910a8 [TableGen] Add support for the 'assert' statement in multiclasses adds 14580ce2fdd1 [TableGen] Make behavior of list slice suffix consistent a [...] adds 6fccfd7cbdca [InstCombine] add icmp with no-wrap add tests; NFC adds c10cc4ea2729 [AMDGPU] Fix computing live registers in prolog adds 3344cd3a1477 [AMDGPU] SIFoldOperands: make tryFoldCndMask a member func [...] adds b785e03612d7 Support: mapped_file_region: Pass MAP_NORESERVE to mmap adds 9f0d8bac144c [analyzer] Fix dead store checker false positive adds e4de3cdf3d66 [LV] Pass VPWidenPHIRecipe to widenPHIInstruction (NFC). adds c28f79a0e335 [AMDGPU] SIFoldOperands: try harder to fold cndmask instructions adds 2724b57ecdbb [AMDGPU] SIFoldOperands: remove an unneeded make_early_inc [...] adds a250e91d1034 [AMDGPU] SIFoldOperands: make use of emplace_back. NFC. adds 9229465bad85 [NFC] Fix warning introduced in 20105b6b4874a85813f7a4a3d8 [...] adds 1e511bb1be71 [lldb] Re-skip TestVSCode_launch adds 2ecf928153fc [lldb/DWARF] Fix a crash parsing invalid dwarf (pr49678) adds 466fab5c9410 [lsan] Mark 2 new lsan tests unsupported on arm-linux adds 2cb8c10342ee Revert "Reduce the number of attributes attached to each f [...] adds a1a372dfb526 [AMDGPU] SIFoldOperands: remove an unneeded isReg check. NFC. adds e184eeaa3ba1 [AMDGPU] Add some implicit uses to tests. NFC. adds e10493eb5012 [DebugInfo] Correctly track SDNode dependencies for list d [...] adds 2690d4d45a63 [MLIR] Support symbols in emptiness checks for FlatAffineC [...] adds 050a7a27ca84 [lld-macho] Support --thinlto-jobs adds 3f6753efe199 [lld-macho][nfc] Extend abs-symbol.s to test for local abs [...] adds f08a2fc09e75 [MCA] Add tests for IPC on Cortex-A55 adds bcb8ef2d5a8b abtest.py: support bisection based on a response file adds a345419ee030 [lldb] [Process] Watch for fork/vfork notifications adds 1b589172bd19 Revert "[DebugInfo] Correctly track SDNode dependencies fo [...] adds 4b958dd6bcca [analyzer] Fix crash on spaceship operator (PR47511) adds 663ac91ed1d6 [analyzer] Fix false positives in inner pointer checker (PR49628) adds 151752ab2082 [mlir][linalg] Fix loop upper bounds in conv fusion test adds b68545acf977 [lldb] Improve the documentation (#42017) adds 3f919ff25013 Revert "[TableGen] Add support for the 'assert' statement [...] adds d01bff8cbdc9 [lldb] [test] Skip clone() tests on Linux/aarch64 adds c23b92acd065 [lld-macho] Support -add_ast_path adds c2e76a9a6dcc [lld-macho][nfc] Use varargs form of hasArg() adds 5f0ac1ef7888 Set IgnoreLLVMUsed to false in CallGraph::addToCallGraph() adds 02ef9963e1ad [RISCV] Prevent __builtin_riscv_orc_b_64 from being compil [...] adds c52dbdbc33b9 [InstCombine] add tests for min/max with negated operand; NFC adds 5094e1279eb2 [InstCombine] fold min/max intrinsic with negated operand to abs adds 461b55499981 [RISCV] Add InstAlias for Zbb Zbp and Zbs extension adds ce2db9005d70 [LoopInterchange] Fix transformation bugs in loop interchange adds 04e9cd09c888 [WebAssembly] Fix for PIC external symbol ISEL adds c3614358452e [mlir][StandardToSPIRV] Handle i1 case for lowering memref [...] adds 3a4c0354b6eb [flang][OpenMP] Add functionality to check "close nesting" [...] adds d5085617986e [AIX] Support init priority attribute adds 189310a140fa [AMDGPU] Allow -amdgpu-unsafe-fp-atomics to ignore denorm mode adds 59a2f67011ba [LoopRotate] Don't split loop pass manager adds dd453a1389b6 Add setting to disable LanguageRuntime UnwindPlans adds 627dab3dbfc9 [AMDGPU] Check for all meta instrs in GCNRegBankReassign adds 4fae63c612a7 AMDGPU: Add gfx90c support to code object v2 for backwards [...] adds 5ca168b03211 [FileCheck, test] Rename checkWildcardRegexCharMatchFailure adds f66e05a720f7 Include `count` in AppleClang toolchains. adds c5d1ccbcdfb1 [GVN] Properly invalidate ICF cache when we simplify a value adds 35393c865c2c [funcattrs] Infer nosync from instruction walk adds ab124bbe2a7c [SLP]Fix PR49898: Infinite loop in SLP vectorizer. adds e761b6b4c58d [lldb] (Temporarily) disable vfork-follow-parent-wp.test o [...] adds ac347a8a0fb4 [RISCV] Remove empty string after 'defm' at top level of v [...] adds 872931e5d857 [RISCV] Use multiclass inheritance where possible for the [...] adds a7b51d8a4fc8 [compiler-rt][hwasan] Add C++17 new/delete operators with [...] adds 2f181086b5cb [ASTMatchers] Add `cxxBaseSpecifier` matcher (non-top-level) adds 38b106f68157 Improve error message when tring to export to LLVM IR with [...] adds 429088b9e214 Support: Extract fs::resize_file_before_mapping_readwrite [...] adds 022ccedde887 Support: Use std::unique_ptr for SignpostEmitter::Impl, NFC adds bf12b711f9ec Support: Drop the no-op initializer for SignpostEmitterImp [...] adds 9be43874343b Support: Avoid unnecessary std::function for SignpostEmitt [...] adds 078072285d3f Revert "Support: Use std::unique_ptr for SignpostEmitter:: [...] adds e7ed5c920db3 Revert "Revert "Support: Use std::unique_ptr for SignpostE [...] adds e35afbe535f9 Revert "Revert "Revert "Support: Use std::unique_ptr for S [...] adds 6dc432510f29 Support: Use std::unique_ptr for SignpostEmitter::Impl, NF [...] adds 12ffc260678d [mlir][spirv] Define spv.ImageDrefGather operation adds 8294019633b5 Use default ref capture to avoid unused capture warning on [...] adds eb8a28e2cf03 DebugInfo: Include inline namespaces in template specializ [...] adds 4a84b03eced2 ADT: Sink the guts of StringMapEntry::Create into StringMa [...] adds ceeb5b0f87a3 [mlir][tosa] Add tosa.max_pool2d lowering to linalg int ma [...] adds f47a4c071376 [lld] Fixed CodeView GuidAdapter::format to handle GUID by [...] adds 49c79e3b5644 [RISCV][NFC] Add explicit type i64 to RV64 only patterns. adds ca55f0511698 [clang][SourceManager] Fix -Wparentheses warning (NFC) adds d2e15a83a664 [RS4GC] Cleanup meetBDVState. NFC. adds 79cade52ed94 [debug-info][NFC] Set -mtriple to avoid the test failure u [...] adds 4c89bcadf6ca [LICM] Hoist loads with invariant.group metadata adds 097d77d611d1 [libcxx] Allow shared_ptr's unique_ptr converting construc [...] adds f4eb681dc37a [mlir][Linalg] Drop unit-trip loops of reductions only if [...] adds f6e3b4fe582f [GreedyRA ORE] Re-factor computeNumberOfSplillsReloads. adds 65d09bcb078d [Test] Add two more tests on PRE with guards adds 6169f1537c87 [RISCV][NFC] Fix formatting adds 4b54345e4770 [NFC][PowerPC] add test cases for reverse memory op transf [...] adds 8bc08c55179f [lldb] Update UUID after https://reviews.llvm.org/D99978. adds 39ae25fb8c64 [lldb] Update object.test after 'nosync' inference was enabled. adds 623475248a9d [test, LoopVectorize] Fix use of var defined in CHECK-NOT adds 7eaa2810c441 [RISCV][NFC] Replace explicit type i64 with riscv customiz [...] adds 538254e8e0e0 [MLIR] Do not yield values from an assuming op that are ne [...] adds 275f3a2540fe [GVN][NFC] Factor out load elimination logic via PRE for reuse adds 36138db116a8 [AMDGPU] IsFlatScratch/Global -> FlatScratch/Global adds ba217b465532 [RegisterScavenging] Add asserts for better errors adds baf17e2cc97e [NFC] Move statictic increment out of helper adds 735eac7c0bff [FunctionAttrs] Force old pm in test so it doens't behave [...] adds 79d12ded535b [MLIR][Shape] Canonicalize `assuming_all` when all operand [...] adds 3ae0a405fc94 [X86] combineHorizOpWithShuffle - peek through one use bit [...] adds d066079728b9 [NFC][AA] Prepare to convert AliasResult to class with Par [...] adds 74d33052ddd2 [MLIR][Shape] Add convenience builder for `shape.assuming_all` adds c1a88e007b04 [AA][NFC] Convert AliasResult to class containing offset f [...] adds cc7add52986b [AMDGPU] Use SIInstrFlags for flat variants. NFC adds 99b46a6c5ba7 [X86] Add PR44136 test coverage adds af67deb005ca [OpenCL] Simplify InsertOCLBuiltinDeclarationsFromTable adds 494ba60bb71e [PowerPC, test] Fix use of undef FileCheck var adds 3b4936ba2905 [clangd] Add --check-lines to restrict --check to specific lines adds bb69173ae5d1 [PowerPC, test] Fix use of undef FileCheck var adds 0494b6b6769f [PowerPC, test] Fix use of undef FileCheck var adds 92498264269c [clang] Tiny format fix adds 5b23e38d9c7b [X86] Adjust PR44136 tests to add cmpne coverage as well adds a4ced03d3425 [AMDGPU] SIFoldOperands: eagerly delete dead copies adds acf3279a037f For non-null pointer checks, do not descend through out-of [...] adds 25942d7c49ed [AMDGPU] Allow relaxed/consume memory order for atomic inc/dec adds 175b8819f2ea [TableGen] [docs] Change title of tblgen.rst to fix man pa [...] adds b9b708eef8cb [clangd] Log a message when gRPC support is off, but remot [...] adds 68d62fe06859 [X86] Add zeroext attributes to i8/i16 and/or/xor overflow tests adds 5d7cb79416ad RISCVABIInfo::classifyArgumentType: Fix static analyzer wa [...] adds 1667fbe65082 [InstCombine] add test with multiple uses of min/max negat [...] adds 84cdccc9dc68 [InstCombine] try to eliminate an instruction in min/max - [...] adds f9264ac0fdb7 [HIP] Workaround ICE compiling SemaChecking.cpp with gcc 5 adds f3d7536b24f1 [libc++] Fix abs and div overload issue for compilers on AIX adds 245036950a7a [X86][BMI] Fold cmpeq/ne(or(X,Y),X) --> cmpeq/ne(and(~X,Y) [...] adds e413b86a2c0c [MLIR][Shape] Combine `cstr_eq` only if they share shape operands adds b7578f9d5a46 [RGT] Tweak test so assertion is always executed adds d8bc4de3cfe0 [X86] Fold cmpeq/ne(or(X,Y),X) --> cmpeq/ne(and(~X,Y),0) o [...] adds 18192228602c [clang] tests: cleanup, update and add some new ones adds aeff03d2df54 [InstCombine] Regenerate 2010-11-23-Distributed.ll tests adds 9da35814e5fb [Flang] Changes to mangling code adds f2dfacea3e3f [PhaseOrdering] add test for llvm.expect; NFC adds 6ce76ff7eb76 Update the linkage name of coro-split functions in the deb [...] adds 206343f319da [RGT] Disable some tests on Windows at compile-time, not runtime adds 16fe741c6942 [PowerPC] Add ROP Protection Instructions for PowerPC adds 40e75cafc0fe [AArch64][GlobalISel] Fix incorrect codegen for <16 x s8> G_ASHR. adds 107189a26eef [TableGen] Report an error message on a missing comma adds ed0bf875a93e [builtins] Avoid enum name conflicts with fenv.h adds dc4abca7662b Handle alloc_size attribute on function pointers adds f30c429da63a [WebAssembly] Add shuffles as an option for lowering BUILD_VECTOR adds b166441bbe7f [libcxx] [test] Use GetWindowsInaccessibleDir() instead of [...] adds 1f1f8e239bb3 [libcxx] [test] Use GetWindowsInaccessibleDir() in a coupl [...] adds 1e5f68d80a42 [libcxx] [test] Add more tests for renaming directories in [...] adds 365053d2a55b Support: Remove code duplication for mapped_file_region ac [...] adds 1a43fd27691c [OpenMP51] Initial support for masked directive and filter clause adds d9c9c0b2db0d [LLDB][NFC] Add clarifying comments for AddCXXSummary and [...] adds 5bca7cdafb89 Add correct types to the xxsplti32dx pattern. adds 034fe0e03d9e [AMDGPU] Added udot2 op_sel test. NFC. adds b12539225930 [libc++] NFC: Move unused include of <limits> to allocator [...] adds f6bff8d15778 [MSSA] Rename uses in IDF regardless of new def position i [...] adds d19a42eba98f [AMDGPU] SIFoldOperands: eagerly erase dead REG_SEQUENCEs adds 5a0117b2d0ea [AMDGPU] Remove MachineDCE after SIFoldOperands adds 3d816537df2c [OpenMP51][DOCS] Claimed masked construct and report curre [...] adds ca0e250ec6e0 [mlir] NFC - Add help functions to scf.ForOp adds 1a2756b777b6 Revert "[PowerPC] Add ROP Protection Instructions for PowerPC" adds 50979defc955 [scudo][standalone] Use BatchClassId in drain rather than 0 adds 7df30e77d499 [ASan] Allow new/delete replacement by making interceptors weak adds 99d6e31e0bd0 [NFC][SROA] Add C++'s `std::clamp()` testcase from PR47271 [...] adds 077bff39d463 [Analysis] isDereferenceableAndAlignedPointer(): recurse i [...] adds b6f22fa5feb6 [flang] Check for conflicting BIND(C) names adds 49c3565b9ba7 [AArch64][GlobalISel] Swap compare operands when it may be [...] adds 3d4730a73fd1 Revert "[AMDGPU] SIFoldOperands: eagerly erase dead REG_SE [...] adds 092f288d3644 Revert "[AMDGPU] Remove MachineDCE after SIFoldOperands" adds 5091671c9ba2 [flang] Enforce a limit on recursive PDT instantiations adds 88cb786ec261 [lld-macho][nfc] Remove DYSYM8 reloc attribute adds e11140451b5f [flang] RANDOM_NUMBER, RANDOM_SEED, RANDOM_INIT in runtime adds 0db6488a7704 Support: Add move semantics to mapped_file_region adds 4f173c0c42d0 [clang][AVR] Support variable decorator '__flash' adds 8f4b7e94a2b4 [AMDGPU][CostModel] Refine cost model for control-flow ins [...] adds 6270b3a1eafa Temporairly revert "[CGCall] Annotate `this` argument with [...] adds 471ae42c04e4 [RISCV][Clang] Add RVV vleff intrinsic functions. adds 71ab6c98a0d1 [Matrix] Implement C-style explicit type conversions for m [...] adds b6aaa8836ee0 [NFC][CVP] Add `@llvm.abs` test cases adds c329a47d9ed7 [CVP] @llvm.abs() handling adds 3b677b81cec7 [libtooling][clang-tidy] Fix diagnostics not highlighting [...] adds 0c184154969c zz adds 17cf2c94230b [NFC][ConstantRange] Add 'icmp' helper method adds 8371dde4857a Revert "zz" adds 7b12c8c59da6 Revert "[NFC][ConstantRange] Add 'icmp' helper method" adds e8c7f43e2c2c [NFC][ConstantRange] Add 'icmp' helper method adds 8fa39752477b [libtooling][clang-tidy] Fix off-by-one rendering issue wi [...] adds 8f16101c703e [flang] Accept & fold IEEE_SELECTED_REAL_KIND adds 03225969e39c [NFC] Rename LimitingIntrinsic into MinMaxIntrinsic adds 257eda07940d [NFC][LVI] getPredicateAt(): drop default value for UseBlockValue adds fe7b3ad8d5f7 [CVP] LVI: Use in-block values when checking value signedn [...] adds a407738def18 [NFC][CVP] Add statistic for function pointer argument non [...] adds f041757e9c2f [NFC][JumpThreading] Increment 'NumFolds' statistic all pl [...]
No new revisions were added by this update.
Summary of changes: clang-tools-extra/clang-move/tool/ClangMove.cpp | 3 +- clang-tools-extra/clang-tidy/ClangTidy.cpp | 33 +- .../clang-tidy/ClangTidyDiagnosticConsumer.cpp | 24 +- clang-tools-extra/clang-tidy/utils/Matchers.h | 73 +- clang-tools-extra/clangd/Compiler.cpp | 4 +- clang-tools-extra/clangd/ConfigCompile.cpp | 5 +- clang-tools-extra/clangd/Protocol.cpp | 1 + clang-tools-extra/clangd/test/check-lines.test | 15 + clang-tools-extra/clangd/tool/Check.cpp | 18 +- clang-tools-extra/clangd/tool/ClangdMain.cpp | 41 +- .../clangd/unittests/ConfigCompileTests.cpp | 12 +- clang-tools-extra/docs/ReleaseNotes.rst | 7 + .../checks/bugprone-misplaced-widening-cast.rst | 2 +- .../checks/performance-for-range-copy.rst | 4 +- ...performance-unnecessary-copy-initialization.rst | 6 +- .../checks/performance-unnecessary-value-param.rst | 5 +- clang-tools-extra/modularize/ModuleAssistant.cpp | 2 +- clang-tools-extra/pp-trace/PPTrace.cpp | 2 +- .../performance-for-range-copy-allowed-types.cpp | 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+- .../Checkers/ExprInspectionChecker.cpp | 136 +- .../Checkers/InnerPointerChecker.cpp | 80 +- .../Checkers/MPI-Checker/MPIChecker.cpp | 2 +- .../lib/StaticAnalyzer/Checkers/MallocChecker.cpp | 71 +- .../StaticAnalyzer/Checkers/PthreadLockChecker.cpp | 4 +- .../Checkers/ReturnPointerRangeChecker.cpp | 2 +- .../Checkers/StdLibraryFunctionsChecker.cpp | 4 +- .../StaticAnalyzer/Checkers/UndefResultChecker.cpp | 2 +- .../lib/StaticAnalyzer/Checkers/VLASizeChecker.cpp | 20 +- clang/lib/StaticAnalyzer/Core/CMakeLists.txt | 2 +- clang/lib/StaticAnalyzer/Core/DynamicExtent.cpp | 92 + clang/lib/StaticAnalyzer/Core/DynamicSize.cpp | 71 - clang/lib/StaticAnalyzer/Core/ExprEngine.cpp | 1 + clang/lib/StaticAnalyzer/Core/ExprEngineC.cpp | 4 + .../Core/ExprEngineCallAndReturn.cpp | 31 +- clang/lib/StaticAnalyzer/Core/MemRegion.cpp | 12 +- clang/lib/StaticAnalyzer/Core/PlistDiagnostics.cpp | 2 +- clang/lib/StaticAnalyzer/Core/RegionStore.cpp | 1 - clang/lib/StaticAnalyzer/Core/SValBuilder.cpp | 8 + clang/lib/StaticAnalyzer/Core/SarifDiagnostics.cpp | 2 +- clang/lib/Tooling/CMakeLists.txt | 2 - clang/lib/Tooling/Core/Diagnostic.cpp | 5 +- clang/lib/Tooling/Syntax/Tokens.cpp | 16 +- clang/lib/Tooling/Tooling.cpp | 4 + clang/test/AST/sourceranges.cpp | 18 + clang/test/Analysis/PR47511.cpp | 19 + clang/test/Analysis/dead-stores.c | 41 + clang/test/Analysis/explain-svals.cpp | 2 +- clang/test/Analysis/expr-inspection.cpp | 2 +- clang/test/Analysis/inner-pointer.cpp | 30 + clang/test/Analysis/malloc.c | 13 + clang/test/Analysis/memory-model.cpp | 157 + clang/test/Analysis/properties.mm | 20 + clang/test/Analysis/pthreadlock.c | 6 + .../CXX/class/class.init/class.copy.elision/p3.cpp | 155 +- .../dcl.spec/dcl.type/dcl.spec.auto/p7-1y.cpp | 98 - .../dcl.spec/dcl.type/dcl.spec.auto/p7-cxx14.cpp | 100 + clang/test/CXX/drs/dr3xx.cpp | 25 +- .../CXX/expr/expr.prim/expr.prim.lambda/p4-1y.cpp | 69 - .../expr/expr.prim/expr.prim.lambda/p4-cxx14.cpp | 70 + clang/test/CXX/special/class.copy/p3-cxx11.cpp | 59 + clang/test/CXX/special/class.copy/p33-0x.cpp | 57 - clang/test/CXX/temp/temp.decls/temp.mem/p5.cpp | 6 +- .../RISCV/rvb-intrinsics/riscv32-zbb-error.c | 6 + .../RISCV/rvv-intrinsics-overloaded/vaadd.c | 2587 ++++ .../CodeGen/RISCV/rvv-intrinsics-overloaded/vadc.c | 1328 ++ .../CodeGen/RISCV/rvv-intrinsics-overloaded/vand.c | 2472 ++++ .../RISCV/rvv-intrinsics-overloaded/vasub.c | 2587 ++++ .../CodeGen/RISCV/rvv-intrinsics-overloaded/vdiv.c | 2472 ++++ .../RISCV/rvv-intrinsics-overloaded/vmacc.c | 2472 ++++ .../RISCV/rvv-intrinsics-overloaded/vmadc.c | 2566 ++++ .../RISCV/rvv-intrinsics-overloaded/vmadd.c | 2472 ++++ .../CodeGen/RISCV/rvv-intrinsics-overloaded/vmax.c | 2472 ++++ .../CodeGen/RISCV/rvv-intrinsics-overloaded/vmin.c | 2472 ++++ .../RISCV/rvv-intrinsics-overloaded/vmsbc.c | 2566 ++++ .../RISCV/rvv-intrinsics-overloaded/vmseq.c | 2584 ++++ .../RISCV/rvv-intrinsics-overloaded/vmsgt.c | 1287 ++ .../RISCV/rvv-intrinsics-overloaded/vmsle.c | 2599 ++++ .../RISCV/rvv-intrinsics-overloaded/vmslt.c | 2599 ++++ .../RISCV/rvv-intrinsics-overloaded/vmsne.c | 2584 ++++ .../CodeGen/RISCV/rvv-intrinsics-overloaded/vmul.c | 6168 ++++++++++ .../RISCV/rvv-intrinsics-overloaded/vnclip.c | 1793 +++ .../RISCV/rvv-intrinsics-overloaded/vnmsac.c | 2472 ++++ .../RISCV/rvv-intrinsics-overloaded/vnmsub.c | 2472 ++++ .../RISCV/rvv-intrinsics-overloaded/vnsra.c | 848 ++ .../RISCV/rvv-intrinsics-overloaded/vnsrl.c | 848 ++ .../CodeGen/RISCV/rvv-intrinsics-overloaded/vor.c | 2472 ++++ .../CodeGen/RISCV/rvv-intrinsics-overloaded/vrem.c | 2472 ++++ .../RISCV/rvv-intrinsics-overloaded/vrsub.c | 1240 ++ .../RISCV/rvv-intrinsics-overloaded/vsadd.c | 2587 ++++ .../CodeGen/RISCV/rvv-intrinsics-overloaded/vsbc.c | 1328 ++ .../RISCV/rvv-intrinsics-overloaded/vsext.c | 820 ++ .../CodeGen/RISCV/rvv-intrinsics-overloaded/vsll.c | 2472 ++++ .../RISCV/rvv-intrinsics-overloaded/vsmul.c | 1287 ++ .../CodeGen/RISCV/rvv-intrinsics-overloaded/vsra.c | 1240 ++ .../CodeGen/RISCV/rvv-intrinsics-overloaded/vsrl.c | 1240 ++ .../RISCV/rvv-intrinsics-overloaded/vssra.c | 1290 ++ .../RISCV/rvv-intrinsics-overloaded/vssrl.c | 1305 ++ .../RISCV/rvv-intrinsics-overloaded/vssub.c | 2587 ++++ .../CodeGen/RISCV/rvv-intrinsics-overloaded/vsub.c | 2472 ++++ .../RISCV/rvv-intrinsics-overloaded/vwmacc.c | 3186 +++++ .../RISCV/rvv-intrinsics-overloaded/vwmul.c | 2528 ++++ .../CodeGen/RISCV/rvv-intrinsics-overloaded/vxor.c | 2472 ++++ .../RISCV/rvv-intrinsics-overloaded/vzext.c | 820 ++ clang/test/CodeGen/RISCV/rvv-intrinsics/vaadd.c | 2587 ++++ clang/test/CodeGen/RISCV/rvv-intrinsics/vadc.c | 1328 ++ clang/test/CodeGen/RISCV/rvv-intrinsics/vand.c | 2472 ++++ clang/test/CodeGen/RISCV/rvv-intrinsics/vasub.c | 2587 ++++ clang/test/CodeGen/RISCV/rvv-intrinsics/vdiv.c | 2472 ++++ clang/test/CodeGen/RISCV/rvv-intrinsics/vleff.c | 2348 ++++ clang/test/CodeGen/RISCV/rvv-intrinsics/vmacc.c | 2472 ++++ clang/test/CodeGen/RISCV/rvv-intrinsics/vmadc.c | 2566 ++++ clang/test/CodeGen/RISCV/rvv-intrinsics/vmadd.c | 2472 ++++ clang/test/CodeGen/RISCV/rvv-intrinsics/vmax.c | 2473 ++++ clang/test/CodeGen/RISCV/rvv-intrinsics/vmin.c | 2472 ++++ clang/test/CodeGen/RISCV/rvv-intrinsics/vmsbc.c | 2566 ++++ clang/test/CodeGen/RISCV/rvv-intrinsics/vmseq.c | 2584 ++++ clang/test/CodeGen/RISCV/rvv-intrinsics/vmsgt.c | 1287 ++ clang/test/CodeGen/RISCV/rvv-intrinsics/vmsle.c | 2599 ++++ clang/test/CodeGen/RISCV/rvv-intrinsics/vmslt.c | 2599 ++++ clang/test/CodeGen/RISCV/rvv-intrinsics/vmsne.c | 2584 ++++ clang/test/CodeGen/RISCV/rvv-intrinsics/vmul.c | 6168 ++++++++++ clang/test/CodeGen/RISCV/rvv-intrinsics/vnclip.c | 1793 +++ clang/test/CodeGen/RISCV/rvv-intrinsics/vnmsac.c | 2472 ++++ clang/test/CodeGen/RISCV/rvv-intrinsics/vnmsub.c | 2472 ++++ clang/test/CodeGen/RISCV/rvv-intrinsics/vnsra.c | 848 ++ clang/test/CodeGen/RISCV/rvv-intrinsics/vnsrl.c | 848 ++ clang/test/CodeGen/RISCV/rvv-intrinsics/vor.c | 2472 ++++ clang/test/CodeGen/RISCV/rvv-intrinsics/vrem.c | 2472 ++++ clang/test/CodeGen/RISCV/rvv-intrinsics/vrsub.c | 1240 ++ clang/test/CodeGen/RISCV/rvv-intrinsics/vsadd.c | 2587 ++++ clang/test/CodeGen/RISCV/rvv-intrinsics/vsbc.c | 1328 ++ clang/test/CodeGen/RISCV/rvv-intrinsics/vsext.c | 820 ++ clang/test/CodeGen/RISCV/rvv-intrinsics/vsll.c | 2472 ++++ clang/test/CodeGen/RISCV/rvv-intrinsics/vsmul.c | 1287 ++ clang/test/CodeGen/RISCV/rvv-intrinsics/vsra.c | 1240 ++ clang/test/CodeGen/RISCV/rvv-intrinsics/vsrl.c | 1241 ++ clang/test/CodeGen/RISCV/rvv-intrinsics/vssra.c | 1290 ++ clang/test/CodeGen/RISCV/rvv-intrinsics/vssrl.c | 1305 ++ clang/test/CodeGen/RISCV/rvv-intrinsics/vssub.c | 2587 ++++ clang/test/CodeGen/RISCV/rvv-intrinsics/vsub.c | 2472 ++++ clang/test/CodeGen/RISCV/rvv-intrinsics/vwmacc.c | 3186 +++++ clang/test/CodeGen/RISCV/rvv-intrinsics/vwmul.c | 2528 ++++ clang/test/CodeGen/RISCV/rvv-intrinsics/vxor.c | 2472 ++++ clang/test/CodeGen/RISCV/rvv-intrinsics/vzext.c | 820 ++ clang/test/CodeGen/aarch64-neon-ldst-one.c | 11960 +++++++++---------- .../CodeGen/aarch64-neon-scalar-x-indexed-elem.c | 587 +- clang/test/CodeGen/aarch64-poly128.c | 281 +- clang/test/CodeGen/aarch64-poly64.c | 2 +- .../CodeGen/aarch64-sve-intrinsics/acle_sve_abd.c | 6 +- .../CodeGen/aarch64-sve-intrinsics/acle_sve_abs.c | 6 +- .../CodeGen/aarch64-sve-intrinsics/acle_sve_acge.c | 6 +- .../CodeGen/aarch64-sve-intrinsics/acle_sve_acgt.c | 6 +- .../CodeGen/aarch64-sve-intrinsics/acle_sve_acle.c | 6 +- .../CodeGen/aarch64-sve-intrinsics/acle_sve_aclt.c | 6 +- .../CodeGen/aarch64-sve-intrinsics/acle_sve_add.c | 6 +- .../CodeGen/aarch64-sve-intrinsics/acle_sve_adda.c | 6 +- .../CodeGen/aarch64-sve-intrinsics/acle_sve_addv.c | 6 +- .../CodeGen/aarch64-sve-intrinsics/acle_sve_adrb.c | 6 +- .../CodeGen/aarch64-sve-intrinsics/acle_sve_adrd.c | 6 +- .../CodeGen/aarch64-sve-intrinsics/acle_sve_adrh.c | 6 +- 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llvm/test/Analysis/CostModel/AArch64/sve-gather.ll | 7 +- .../Analysis/CostModel/AArch64/sve-intrinsics.ll | 7 +- .../test/Analysis/CostModel/AArch64/sve-scatter.ll | 8 +- .../CostModel/AArch64/sve-shuffle-broadcast.ll | 8 +- .../Analysis/CostModel/AArch64/sve-stepvector.ll | 7 +- llvm/test/Analysis/CostModel/AArch64/sve-trunc.ll | 6 +- .../CostModel/AArch64/sve-widening-instruction.ll | 6 +- llvm/test/Analysis/CostModel/AMDGPU/br.ll | 45 - .../test/Analysis/CostModel/AMDGPU/control-flow.ll | 52 + llvm/test/Analysis/CostModel/X86/load_store.ll | 104 + llvm/test/Analysis/CostModel/X86/reduce-mul.ll | 108 +- .../gep-induction-operand-typesize-warning.ll | 6 +- .../runtime-pointer-checking-insert-typesize.ll | 15 +- llvm/test/Analysis/ScalarEvolution/pr49856.ll | 24 + .../TypeBasedAliasAnalysis/functionattrs.ll | 6 +- .../test/Analysis/ValueTracking/known-non-equal.ll | 843 ++ llvm/test/CodeGen/AArch64/DAGCombine_vscale.ll | 5 +- ...ostlegalizer-lowering-swap-compare-operands.mir | 737 ++ .../AArch64/GlobalISel/select-vector-shift.mir | 4 +- llvm/test/CodeGen/AArch64/aarch64-tbz.ll | 16 +- .../CodeGen/AArch64/arm64-fast-isel-materialize.ll | 4 +- .../test/CodeGen/AArch64/arm64-fp-contract-zero.ll | 8 +- llvm/test/CodeGen/AArch64/arm64-rev.ll | 2 +- llvm/test/CodeGen/AArch64/arm64-spill-remarks.ll | 14 + .../CodeGen/AArch64/arm64-zero-cycle-zeroing.ll | 30 +- .../AArch64/dag-combine-insert-subvector.ll | 13 +- .../dag-combine-lifetime-end-store-typesize.ll | 9 +- llvm/test/CodeGen/AArch64/f16-imm.ll | 4 +- llvm/test/CodeGen/AArch64/fast-isel-fpimm.ll | 20 + llvm/test/CodeGen/AArch64/fpimm.ll | 30 +- llvm/test/CodeGen/AArch64/fptosi-sat-scalar.ll | 6 +- llvm/test/CodeGen/AArch64/fptosi-sat-vector.ll | 6 +- llvm/test/CodeGen/AArch64/fptoui-sat-scalar.ll | 34 +- llvm/test/CodeGen/AArch64/fptoui-sat-vector.ll | 46 +- llvm/test/CodeGen/AArch64/literal_pools_float.ll | 55 +- .../AArch64/llvm-masked-gather-legal-for-sve.ll | 6 +- .../AArch64/llvm-masked-scatter-legal-for-sve.ll | 6 +- .../AArch64/named-vector-shuffle-reverse-neon.ll | 10 +- .../AArch64/named-vector-shuffle-reverse-sve.ll | 9 +- llvm/test/CodeGen/AArch64/pr49781.ll | 13 + llvm/test/CodeGen/AArch64/remat-float0.ll | 6 +- .../sdag-no-typesize-warnings-regandsizes.ll | 5 +- llvm/test/CodeGen/AArch64/speculation-hardening.ll | 18 +- llvm/test/CodeGen/AArch64/sve-alloca-stackid.ll | 6 +- llvm/test/CodeGen/AArch64/sve-bit-counting-pred.ll | 6 +- llvm/test/CodeGen/AArch64/sve-bit-counting.ll | 6 +- llvm/test/CodeGen/AArch64/sve-bitcast.ll | 6 +- .../AArch64/sve-breakdown-scalable-vectortype.ll | 6 +- .../CodeGen/AArch64/sve-callbyref-notailcall.ll | 6 +- .../AArch64/sve-calling-convention-byref.ll | 6 +- .../AArch64/sve-calling-convention-tuple-types.ll | 6 +- .../test/CodeGen/AArch64/sve-calling-convention.ll | 8 +- llvm/test/CodeGen/AArch64/sve-cmp-select.ll | 6 +- .../AArch64/sve-coalesce-ptrue-intrinsics.ll | 6 +- llvm/test/CodeGen/AArch64/sve-extract-element.ll | 6 +- llvm/test/CodeGen/AArch64/sve-extract-subvector.ll | 6 +- llvm/test/CodeGen/AArch64/sve-extract-vector.ll | 6 +- llvm/test/CodeGen/AArch64/sve-fcmp.ll | 6 +- llvm/test/CodeGen/AArch64/sve-fcvt.ll | 6 +- .../CodeGen/AArch64/sve-fixed-length-subvector.ll | 5 +- llvm/test/CodeGen/AArch64/sve-fmul-idempotency.ll | 6 +- llvm/test/CodeGen/AArch64/sve-fold-vscale.ll | 6 +- llvm/test/CodeGen/AArch64/sve-forward-st-to-ld.ll | 6 +- llvm/test/CodeGen/AArch64/sve-fp-reduce.ll | 6 +- llvm/test/CodeGen/AArch64/sve-fp.ll | 6 +- llvm/test/CodeGen/AArch64/sve-fptrunc-store.ll | 62 + .../AArch64/sve-gather-scatter-dag-combine.ll | 6 +- llvm/test/CodeGen/AArch64/sve-gep.ll | 6 +- llvm/test/CodeGen/AArch64/sve-insert-element.ll | 6 +- llvm/test/CodeGen/AArch64/sve-insert-vector.ll | 5 +- llvm/test/CodeGen/AArch64/sve-int-arith-imm.ll | 6 +- llvm/test/CodeGen/AArch64/sve-int-arith-pred.ll | 6 +- llvm/test/CodeGen/AArch64/sve-int-arith.ll | 6 +- llvm/test/CodeGen/AArch64/sve-int-div-pred.ll | 6 +- llvm/test/CodeGen/AArch64/sve-int-imm.ll | 6 +- llvm/test/CodeGen/AArch64/sve-int-log-imm.ll | 6 +- llvm/test/CodeGen/AArch64/sve-int-log-pred.ll | 6 +- llvm/test/CodeGen/AArch64/sve-int-log.ll | 6 +- llvm/test/CodeGen/AArch64/sve-int-mad-pred.ll | 6 +- llvm/test/CodeGen/AArch64/sve-int-mul-pred.ll | 6 +- llvm/test/CodeGen/AArch64/sve-int-pred-reduce.ll | 6 +- llvm/test/CodeGen/AArch64/sve-int-reduce-pred.ll | 6 +- llvm/test/CodeGen/AArch64/sve-int-reduce.ll | 6 +- .../CodeGen/AArch64/sve-intrinsic-opts-ptest.ll | 6 +- .../AArch64/sve-intrinsic-opts-reinterpret.ll | 6 +- llvm/test/CodeGen/AArch64/sve-intrinsics-adr.ll | 6 +- llvm/test/CodeGen/AArch64/sve-intrinsics-bfloat.ll | 6 +- .../sve-intrinsics-contiguous-prefetches.ll | 6 +- .../CodeGen/AArch64/sve-intrinsics-conversion.ll | 6 +- .../AArch64/sve-intrinsics-counting-bits.ll | 6 +- .../AArch64/sve-intrinsics-counting-elems.ll | 6 +- .../CodeGen/AArch64/sve-intrinsics-create-tuple.ll | 6 +- llvm/test/CodeGen/AArch64/sve-intrinsics-dup-x.ll | 6 +- ...rinsics-ff-gather-loads-32bit-scaled-offsets.ll | 6 +- ...nsics-ff-gather-loads-32bit-unscaled-offsets.ll | 6 +- ...trinsics-ff-gather-loads-64bit-scaled-offset.ll | 6 +- ...insics-ff-gather-loads-64bit-unscaled-offset.ll | 6 +- ...nsics-ff-gather-loads-vector-base-imm-offset.ll | 6 +- ...cs-ff-gather-loads-vector-base-scalar-offset.ll | 6 +- .../AArch64/sve-intrinsics-ffr-manipulation.ll | 6 +- .../AArch64/sve-intrinsics-fp-arith-merging.ll | 6 +- .../CodeGen/AArch64/sve-intrinsics-fp-arith.ll | 6 +- .../CodeGen/AArch64/sve-intrinsics-fp-compares.ll | 6 +- .../CodeGen/AArch64/sve-intrinsics-fp-converts.ll | 6 +- .../CodeGen/AArch64/sve-intrinsics-fp-reduce.ll | 6 +- ...intrinsics-gather-loads-32bit-scaled-offsets.ll | 6 +- ...trinsics-gather-loads-32bit-unscaled-offsets.ll | 6 +- ...-intrinsics-gather-loads-64bit-scaled-offset.ll | 6 +- ...ntrinsics-gather-loads-64bit-unscaled-offset.ll | 6 +- ...trinsics-gather-loads-vector-base-imm-offset.ll | 6 +- ...nsics-gather-loads-vector-base-scalar-offset.ll | 6 +- ...gather-prefetches-scalar-base-vector-indexes.ll | 6 +- ...nsics-gather-prefetches-vect-base-imm-offset.ll | 6 +- ...ther-prefetches-vect-base-invalid-imm-offset.ll | 6 +- llvm/test/CodeGen/AArch64/sve-intrinsics-index.ll | 6 +- .../AArch64/sve-intrinsics-insert-extract-tuple.ll | 6 +- .../AArch64/sve-intrinsics-int-arith-imm.ll | 6 +- .../AArch64/sve-intrinsics-int-arith-merging.ll | 6 +- .../CodeGen/AArch64/sve-intrinsics-int-arith.ll | 6 +- .../sve-intrinsics-int-compares-with-imm.ll | 6 +- .../CodeGen/AArch64/sve-intrinsics-int-compares.ll | 6 +- .../sve-intrinsics-ld1-addressing-mode-reg-imm.ll | 6 +- .../sve-intrinsics-ld1-addressing-mode-reg-reg.ll | 6 +- llvm/test/CodeGen/AArch64/sve-intrinsics-ld1.ll | 6 +- ...sve-intrinsics-ld1ro-addressing-mode-reg-imm.ll | 6 +- ...sve-intrinsics-ld1ro-addressing-mode-reg-reg.ll | 6 +- llvm/test/CodeGen/AArch64/sve-intrinsics-ld1ro.ll | 6 +- .../sve-intrinsics-ldN-reg+imm-addr-mode.ll | 6 +- .../sve-intrinsics-ldN-reg+reg-addr-mode.ll | 6 +- .../CodeGen/AArch64/sve-intrinsics-loads-ff.ll | 6 +- .../CodeGen/AArch64/sve-intrinsics-loads-nf.ll | 6 +- llvm/test/CodeGen/AArch64/sve-intrinsics-loads.ll | 6 +- .../test/CodeGen/AArch64/sve-intrinsics-logical.ll | 6 +- .../CodeGen/AArch64/sve-intrinsics-matmul-fp32.ll | 6 +- .../CodeGen/AArch64/sve-intrinsics-matmul-fp64.ll | 6 +- .../CodeGen/AArch64/sve-intrinsics-matmul-int8.ll | 6 +- .../sve-intrinsics-perm-select-matmul-fp64.ll | 6 +- .../CodeGen/AArch64/sve-intrinsics-perm-select.ll | 6 +- .../AArch64/sve-intrinsics-pred-creation.ll | 6 +- .../AArch64/sve-intrinsics-pred-operations.ll | 6 +- .../CodeGen/AArch64/sve-intrinsics-pred-testing.ll | 6 +- .../CodeGen/AArch64/sve-intrinsics-reinterpret.ll | 6 +- .../CodeGen/AArch64/sve-intrinsics-reversal.ll | 6 +- .../AArch64/sve-intrinsics-scalar-to-vec.ll | 6 +- ...trinsics-scatter-stores-32bit-scaled-offsets.ll | 6 +- ...insics-scatter-stores-32bit-unscaled-offsets.ll | 6 +- ...ntrinsics-scatter-stores-64bit-scaled-offset.ll | 6 +- ...rinsics-scatter-stores-64bit-unscaled-offset.ll | 6 +- ...insics-scatter-stores-vector-base-imm-offset.ll | 6 +- ...ics-scatter-stores-vector-base-scalar-offset.ll | 6 +- llvm/test/CodeGen/AArch64/sve-intrinsics-sel.ll | 6 +- .../AArch64/sve-intrinsics-shifts-merging.ll | 6 +- llvm/test/CodeGen/AArch64/sve-intrinsics-shifts.ll | 6 +- llvm/test/CodeGen/AArch64/sve-intrinsics-sqdec.ll | 6 +- llvm/test/CodeGen/AArch64/sve-intrinsics-sqinc.ll | 6 +- .../sve-intrinsics-st1-addressing-mode-reg-imm.ll | 6 +- .../sve-intrinsics-st1-addressing-mode-reg-reg.ll | 6 +- llvm/test/CodeGen/AArch64/sve-intrinsics-st1.ll | 6 +- .../sve-intrinsics-stN-reg-imm-addr-mode.ll | 6 +- .../sve-intrinsics-stN-reg-reg-addr-mode.ll | 6 +- llvm/test/CodeGen/AArch64/sve-intrinsics-stores.ll | 6 +- llvm/test/CodeGen/AArch64/sve-intrinsics-uqdec.ll | 6 +- llvm/test/CodeGen/AArch64/sve-intrinsics-uqinc.ll | 6 +- llvm/test/CodeGen/AArch64/sve-intrinsics-while.ll | 6 +- llvm/test/CodeGen/AArch64/sve-ld-post-inc.ll | 6 +- .../AArch64/sve-ld1-addressing-mode-reg-imm.ll | 6 +- .../AArch64/sve-ld1-addressing-mode-reg-reg.ll | 6 +- .../test/CodeGen/AArch64/sve-masked-ldst-nonext.ll | 6 +- llvm/test/CodeGen/AArch64/sve-masked-ldst-sext.ll | 6 +- llvm/test/CodeGen/AArch64/sve-masked-ldst-trunc.ll | 6 +- llvm/test/CodeGen/AArch64/sve-masked-ldst-zext.ll | 6 +- llvm/test/CodeGen/AArch64/sve-merging-stores.ll | 6 +- llvm/test/CodeGen/AArch64/sve-mul-idempotency.ll | 6 +- llvm/test/CodeGen/AArch64/sve-pred-arith.ll | 6 +- ...pred-contiguous-ldst-addressing-mode-reg-imm.ll | 6 +- ...pred-contiguous-ldst-addressing-mode-reg-reg.ll | 6 +- llvm/test/CodeGen/AArch64/sve-pred-log.ll | 6 +- ...ed-non-temporal-ldst-addressing-mode-reg-imm.ll | 6 +- ...ed-non-temporal-ldst-addressing-mode-reg-reg.ll | 6 +- llvm/test/CodeGen/AArch64/sve-redundant-store.ll | 6 +- llvm/test/CodeGen/AArch64/sve-rev.ll | 6 +- llvm/test/CodeGen/AArch64/sve-select.ll | 6 +- llvm/test/CodeGen/AArch64/sve-setcc.ll | 6 +- llvm/test/CodeGen/AArch64/sve-sext-zext.ll | 5 +- llvm/test/CodeGen/AArch64/sve-split-extract-elt.ll | 6 +- llvm/test/CodeGen/AArch64/sve-split-fcvt.ll | 6 +- llvm/test/CodeGen/AArch64/sve-split-fp-reduce.ll | 6 +- llvm/test/CodeGen/AArch64/sve-split-insert-elt.ll | 6 +- .../CodeGen/AArch64/sve-split-int-pred-reduce.ll | 6 +- llvm/test/CodeGen/AArch64/sve-split-int-reduce.ll | 6 +- llvm/test/CodeGen/AArch64/sve-split-load.ll | 6 +- llvm/test/CodeGen/AArch64/sve-split-store.ll | 6 +- .../AArch64/sve-st1-addressing-mode-reg-imm.ll | 6 +- .../AArch64/sve-st1-addressing-mode-reg-reg.ll | 6 +- llvm/test/CodeGen/AArch64/sve-stepvector.ll | 6 +- llvm/test/CodeGen/AArch64/sve-tailcall.ll | 6 +- llvm/test/CodeGen/AArch64/sve-tbl-dupx.ll | 6 +- llvm/test/CodeGen/AArch64/sve-trunc.ll | 6 +- llvm/test/CodeGen/AArch64/sve-varargs.ll | 6 +- llvm/test/CodeGen/AArch64/sve-vector-splat.ll | 6 +- llvm/test/CodeGen/AArch64/sve-vscale-combine.ll | 6 +- llvm/test/CodeGen/AArch64/sve-vscale.ll | 6 +- llvm/test/CodeGen/AArch64/sve-vselect-imm.ll | 6 +- llvm/test/CodeGen/AArch64/sve-zeroinit.ll | 6 +- llvm/test/CodeGen/AArch64/sve2-bitwise-ternary.ll | 6 +- llvm/test/CodeGen/AArch64/sve2-int-addsub-long.ll | 6 +- llvm/test/CodeGen/AArch64/sve2-int-mul.ll | 6 +- .../sve2-intrinsics-binary-narrowing-add-sub.ll | 6 +- .../sve2-intrinsics-binary-narrowing-shr.ll | 6 +- .../AArch64/sve2-intrinsics-bit-permutation.ll | 6 +- .../AArch64/sve2-intrinsics-character-match.ll | 6 +- .../CodeGen/AArch64/sve2-intrinsics-complex-dot.ll | 6 +- ...ve2-intrinsics-contiguous-conflict-detection.ll | 6 +- .../test/CodeGen/AArch64/sve2-intrinsics-crypto.ll | 6 +- .../CodeGen/AArch64/sve2-intrinsics-fp-converts.ll | 6 +- .../sve2-intrinsics-fp-int-binary-logarithm.ll | 6 +- .../AArch64/sve2-intrinsics-fp-widening-mul-acc.ll | 6 +- .../AArch64/sve2-intrinsics-int-mul-lane.ll | 6 +- .../sve2-intrinsics-non-widening-pairwise-arith.ll | 6 +- ...insics-nt-gather-loads-32bit-unscaled-offset.ll | 6 +- ...trinsics-nt-gather-loads-64bit-scaled-offset.ll | 6 +- ...insics-nt-gather-loads-64bit-unscaled-offset.ll | 6 +- ...cs-nt-gather-loads-vector-base-scalar-offset.ll | 6 +- ...sics-nt-scatter-stores-32bit-unscaled-offset.ll | 6 +- ...insics-nt-scatter-stores-64bit-scaled-offset.ll | 6 +- ...sics-nt-scatter-stores-64bit-unscaled-offset.ll | 6 +- ...-nt-scatter-stores-vector-base-scalar-offset.ll | 6 +- .../CodeGen/AArch64/sve2-intrinsics-perm-tb.ll | 6 +- .../sve2-intrinsics-polynomial-arithmetic-128.ll | 6 +- .../sve2-intrinsics-polynomial-arithmetic.ll | 6 +- .../AArch64/sve2-intrinsics-unary-narrowing.ll | 6 +- .../sve2-intrinsics-uniform-complex-arith.ll | 6 +- .../AArch64/sve2-intrinsics-uniform-dsp-zeroing.ll | 6 +- .../CodeGen/AArch64/sve2-intrinsics-uniform-dsp.ll | 6 +- .../AArch64/sve2-intrinsics-vec-hist-count.ll | 6 +- llvm/test/CodeGen/AArch64/sve2-intrinsics-while.ll | 6 +- .../sve2-intrinsics-widening-complex-int-arith.ll | 6 +- .../AArch64/sve2-intrinsics-widening-dsp.ll | 6 +- .../sve2-intrinsics-widening-pairwise-arith.ll | 6 +- llvm/test/CodeGen/AArch64/sve2-mla-indexed.ll | 6 +- llvm/test/CodeGen/AArch64/sve2-mla-unpredicated.ll | 6 +- .../CodeGen/AMDGPU/GlobalISel/cvt_f32_ubyte.ll | 6 +- .../AMDGPU/GlobalISel/lds-misaligned-bug.ll | 8 +- .../GlobalISel/llvm.amdgcn.image.gather4.dim.ll | 63 + .../CodeGen/AMDGPU/GlobalISel/load-unaligned.ll | 4 +- llvm/test/CodeGen/AMDGPU/amdgpu.private-memory.ll | 3 - .../AMDGPU/callee-special-input-vgprs-packed.ll | 10 +- llvm/test/CodeGen/AMDGPU/cf-loop-on-constant.ll | 4 +- llvm/test/CodeGen/AMDGPU/dag-divergence-atomic.ll | 28 +- llvm/test/CodeGen/AMDGPU/ds-alignment.ll | 858 ++ llvm/test/CodeGen/AMDGPU/ds_read2.ll | 2 +- llvm/test/CodeGen/AMDGPU/ds_write2.ll | 19 +- .../CodeGen/AMDGPU/expand-atomicrmw-syncscope.ll | 73 + llvm/test/CodeGen/AMDGPU/fadd64.ll | 2 +- llvm/test/CodeGen/AMDGPU/fcmp64.ll | 12 +- llvm/test/CodeGen/AMDGPU/ffloor.f64.ll | 8 +- llvm/test/CodeGen/AMDGPU/flat-scratch-fold-fi.mir | 4 - llvm/test/CodeGen/AMDGPU/fneg-combines.ll | 4 +- llvm/test/CodeGen/AMDGPU/fold-cndmask-wave32.mir | 3 +- llvm/test/CodeGen/AMDGPU/fold-cndmask.mir | 3 +- llvm/test/CodeGen/AMDGPU/fold-imm-copy.mir | 2 +- llvm/test/CodeGen/AMDGPU/fold-imm-f16-f32.mir | 2 - llvm/test/CodeGen/AMDGPU/fold-operands-order.mir | 6 +- llvm/test/CodeGen/AMDGPU/fold-readlane.mir | 27 +- llvm/test/CodeGen/AMDGPU/fp64-atomics-gfx90a.ll | 71 +- llvm/test/CodeGen/AMDGPU/fptosi.f16.ll | 2 +- llvm/test/CodeGen/AMDGPU/fptoui.f16.ll | 2 +- llvm/test/CodeGen/AMDGPU/global-atomics-fp.ll | 80 +- llvm/test/CodeGen/AMDGPU/hoist-cond.ll | 2 +- .../CodeGen/AMDGPU/huge-number-operand-folds.mir | 1 - llvm/test/CodeGen/AMDGPU/inline-attr.ll | 6 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mlir/test/Dialect/Shape/canonicalize.mlir | 71 + mlir/test/Dialect/Shape/ops.mlir | 35 +- mlir/test/Dialect/Vector/ops.mlir | 57 +- mlir/test/IR/invalid-ops.mlir | 2 +- mlir/test/IR/invalid.mlir | 6 +- .../Dialect/Vector/CPU/test-index-vectors.mlir | 32 + .../Dialect/Vector/CPU/test-transfer-read.mlir | 23 + .../test/Integration/Sparse/CPU/sparse_matvec.mlir | 140 + mlir/test/Integration/Sparse/sparse_matvec.mlir | 140 - mlir/test/Integration/data/wide.mtx | 34 +- mlir/test/Target/SPIRV/image-ops.mlir | 4 +- mlir/test/Transforms/canonicalize.mlir | 15 +- mlir/test/lib/Transforms/CMakeLists.txt | 1 + .../lib/Transforms/TestLinalgElementwiseFusion.cpp | 79 + mlir/tools/mlir-opt/mlir-opt.cpp | 2 + mlir/tools/mlir-tblgen/CMakeLists.txt | 1 + mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp | 53 +- mlir/tools/mlir-tblgen/OpDocGen.cpp | 5 +- mlir/tools/mlir-tblgen/OpGenHelpers.cpp | 65 + mlir/tools/mlir-tblgen/OpGenHelpers.h | 30 + mlir/unittests/Analysis/AffineStructuresTest.cpp | 19 +- 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