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from 3b7d88c Updating branches/google/stable to r285906 adds a0e0673 [CMake] Make CMAKE_INSTALL_RPATH work again adds 497f200 replace a report_fatal_error with a ErrorOr. adds 6300980 Revert "[Thumb] Teach ISel how to lower compares of AND bitma [...] adds 58c4c96 Split out a getSectionIndex. adds de5ede6 DAGCombiner: fix use-after-free when merging consecutive stores adds d55aa1c Refactor creation of X86ISD::SETCC nodes to a helper function. NFC. adds d767830 [AMDGPU][CodeGen] To improve CGEMM performance: combine LDS reads. adds bd823cc Move a free function out of ELFFile. adds 2e9ec7b Return existing error code. adds d59cd54 vim: special case the CHECK prefix adds 93f2b8b Inline function into only use. adds e91b7e8 Move function out of line. NFC. adds b240000 Fix a bug found by inspection by PVS-Studio. adds 8eb98ef Make this test Windows-only (try to placate buildbots). adds 9421b70 Add lower level versions of some functions. adds 30b32cd Delete dead code. adds cad7687 Delete a dead store found by PVS-Studio. adds 9a2d9ba Delete some dead code and add a missing "0x" prefix to a hex [...] adds 7c173dd AMDGPU: Add VI i16 support adds 074ecc2 Delete dead code. adds 7446318 Replace a report_fatal_error with an ErrorOr. adds d77057e Replace another report_fatal_error with an ErrorOr. adds 604dd12 Remove a redundant condition found by PVS-Studio. adds f83a9ec AMDGPU/SI: Re add VIInstructions.td to unbreak bots adds c771cb1 Add error handling to getEntry. adds 1787ec7 PDB: Fix some APIs to avoid use-after-frees adds a625bff Remove the last use of report_fatal_error from ELF.h. adds cbbb2b1 [ADT] IntervalMap: fix setStart and setStop adds 2d1f4f5 [libFuzzer] fix -error_exitcode=N, now with a test adds 60a7c43 Add DWARF debug info support for C++11 inline namespaces. Thi [...] adds 6a44556 Don't error in the ELFFile constructor. adds e8078b2 NFC - Test commit. adds 00b62fb Add support for the ARM_THREAD_STATE64 and in llvm-objdump fo [...] adds 298455f [Cortex-M0] Atomic lowering adds 4373dd0 [Support] Fix a segfault in llvm::Expected. adds c6a42ba Sink all of the code relying on the MachO MachineModuleInfo t [...] adds ba7c327 [lit] Remove TODO adds 0425b29 X86: Move a non-null assert to before the pointer is dereferenced adds af0210f Fix typo adds 0e7e3d2 Hoist check for TLI above all of the attempts to use it (incl [...] adds 6c10c8c Only log the visit of a return instruction if we in fact foun [...] adds 202a8de Remove dead code trying to handle when the amount of data rea [...] adds f85fa80 Add a missing return to the move assignment operator for Sequ [...] adds 1228c39 Comment rewording in MachineScheduler.cpp. adds ae152bd Revert "AMDGPU: Add VI i16 support" adds 8530991 Add bugpoint-reduced reproducer for pr30693 adds 9933d26 [X86] Broadcast from memory intructions aren't unfoldable adds bbf0c3a [docs] Add initial Global ISel documentation. adds 933679b llvm/test/Transforms/DCE/calls-errno.ll: Suppress checking @p [...] adds 7e3119c Fix 24560: assembler does not share constant pool for same c [...] adds eefaf3b [Hexagon] Account for <def,read-undef> when validating moves [...] adds 3293f40 cmake: When using LLVM_DISTRIBUTION_COMPONENTS, adjust LLVMEx [...] adds f27a2d8 [ExecutionEngine] Document the insane ownership contract for [...] adds 1ac38d3 Append a (uint32_t)pad into arm_thread_state64_t. Implicit pa [...] adds cf48862 [X86] Remove broken support for autoupgrading llvm.x86.fma4.* [...] adds 1aa9c9a Correct mprotect page boundries to round up end page. Fixes PR30905. adds de7c146 [AVX-512] Use an equality compare instead of StringRef::start [...] adds d636a01 Strip trailing whitespace. NFCI. adds 60b1e12 [Hexagon] Split all selection patterns into a separate file adds dc9cfd5 [X86][SSE] Reuse zeroable element mask instead of regeneratin [...] adds de1867f [LoopStrengthReduce] Don't use a DenseSet<int64_t> when we mi [...] adds a5d2239 [X86][SSE] Reuse zeroable element mask in lowerVectorShuffleA [...] adds 4f6ce44 [X86][SSE] Reuse zeroable element mask in lowerVectorShuffleA [...] adds 85b073e [X86][SSE] Reuse zeroable element mask in PSHUFB vector shuff [...] adds 6048d74 [X86][SSE] Reuse zeroable element mask in SSE4A EXTRQ/INSERTQ [...] adds 30c59a5 [X86][SSE] Reuse zeroable element mask in lowerVectorShuffleA [...] adds cc24df9 [X86][SSE] Reuse zeroable element mask in lowerVectorShuffleA [...] adds 38e4e3f test commit adds 7930d75 [Hexagon] Round 1 of selection pattern simplifications adds 8509ed8 [Hexagon] Relocate pattern-related bits to proper places adds 04b2a60 [AVX-512] Add -show-mc-encoding to legacy vector intrinsic te [...] adds c67db1e [AVX-512] Lower SSE/AVX cvtdq2ps intrinsics directly to ISD:: [...] adds 197ca31 [AVX-512] Lower AVX cvtpd2ps intrinsic to ISD::FP_ROUND so it [...] adds ac00b70 [AVX-512] Add avx512vl command line to the fpext test and add [...] adds e7c8559 [AVX-512] Add missing EVEX version of pattern for (v2f64 (ext [...] adds c7524ad [APFloat] Make functions that produce APFloaat objects use co [...] adds 4a6fc8b Kill deprecated attribute API adds bd04d5b [X86] Add a few more fptoui test cases to the vec_fp_to_int.l [...] adds 12acb63 [BitcodeWriter] Replace a manual byteswap with read32be. adds 65d5c2d [X86][SSE] Reuse zeroable element mask in lowerVectorShuffleA [...] adds c7f268c [X86] Add knownbits vector or test adds 151fabe [AVX-512] Remove a 512-bit test cases from the avx512vl test [...] adds cd57e73 [AVX-512] Remove intrinsics for 128/256-bit masked shift by s [...] adds 67ef824 [SelectionDAG] Add support for vector demandedelts in OR opcodes adds 4734b82 [AVX-512] Remove intrinsics for 128/256-bit masked shift by i [...] adds 90419a0 [AVX-512] Remove intrinsics for 128/256-bit masked variable s [...] adds 20ea1e9 [X86] Add knownbits vector xor test adds dc0f6ae [SelectionDAG] Add support for vector demandedelts in XOR opcodes adds a1c42e6 [Hexagon] Round 2 of selection pattern simplifications adds 5d9ffcf [Hexagon] Round 3 of selection pattern simplifications adds 005dc5e [Hexagon] Round 4 of selection pattern simplifications adds b4680dd [Hexagon] Round 5 of selection pattern simplifications adds 2a82955 [Hexagon] Remove redundant custom selection code adds 1340fda Revert r286080: it breaks build bots adds 10d3cd3 ARM: lower fpowi appropriately for Windows ARM adds ef6860f [RandomNumberGenerator] Remove MSVC 2013 compatibility hack. adds b63144f Reapply r286080 with a phony change in Hexagon's CMakeLists.txt adds 671c411 Remove functions from go bindings that have been deleted in r286062. adds 5183128 Delete one more function that needs to go after r286062. adds cb096f0 Also delete the go side of the bindings deleted in r286085/r286086. adds 9fd28c5 [AVX-512] Remove 128/256 masked pshufb intrinsics. Autoupgrad [...] adds e132a76 [X86] Use StringRef::startswith to reduce a few compares in t [...] adds b4e2913 [X86] Remove GCCBuiltins from cvtsi2ss/cvtsi2sd/cvtss2sd intr [...] adds e69277c [AVX-512] Remove masked pmovzx/pmovsx builtins and autoupgrad [...] adds 069db88 Update CommandLine.rst getRegisteredOptions example adds 3e6b5bc [AVR] Enable the ISel, frame analyzer, and alloca passes adds bf0c64d [X86][SSE] Drop unnecessary -mcpu argument from trunc tests adds 657bbc5 [X86][AVX512] Add AVX512VL/AVX512BWVL vector truncation tests adds ba47969 [Thumb1] Move padding earlier when synthesizing TBBs off of the PC adds 4438f46 [AliasSetTracker] Make AST smarter about assume intrinsics th [...] adds d5d412e [SystemZ] Fixes in SchedModels for older subtargets. adds ea453ce [AArch64] Removed the narrow load merging code in the ld/st o [...] adds 813d120 This patch adds support for 16 bit floating point registers t [...] adds 175d83a [SystemZ] Correct the SchedModel regarding vector unit / inst [...] adds 901ccce [InstCombine] allow splat vector folds in adjustMinMax() (ret [...] adds e670c88 Fix 80-column violations. NFC. adds c6533e3 AMDGPU: Refactor copyPhysReg adds bbc0561 Add -O0 support for @llvm.invariant.group.barrier by discardi [...] adds 72dab34 AMDGPU: Try to fix (non-clang?) bot builds adds 644ae71 Add some facilities to work with a git monorepo (experimental setup) adds ad83aca Revert "Add some facilities to work with a git monorepo (expe [...] adds b54369e [X86] Fix test checks script to handle run lines with no pipe checks adds cfce1b9 [MemCpyOpt] Don't emit IR in an unspecified order adds 58d02e0 [X86] Fix test checks script to satisfy pyflakes adds 6afa68e Test commit, deleted empty line at the end of README.txt adds 2dd5f7e Remove Go Attribute type that was deleted from the C API in r286062. adds e5fd9c0 AMDGPU: Preserve vcc undef flags when inverting branch adds f577de3 AMDGPU: Remove unnecessary and on conditional branch adds 8882bb7 [tsan] Cast floating-point types correctly when instrumenting [...] adds 99d2cab [AArch64] Remove dead store. Found by gcc7. adds 7e34ddb Add some facilities to work with a git monorepo (experimental setup) adds d75c178 Disallow StringRef assignment from temporary std::strings. adds 59bbd3c Fix `git-llvm` script to handle `git worktree` setups correctly adds fd34be2 Add tests for r286139. adds d2b47f0 Use -fsanitize-recover instead of -mllvm -msan-keep-going. adds 2d2f4b6 [lib/Object] Modernize. NFCI. adds daf2128 Avoid tail recursion elimination across calls with operand bundles adds 14b08ac [lit] Print negative exit codes on Windows in hex adds 93cbe9b [lib/Object] Rename elf_hash to hashSysV. adds cc1ad89 Reset debug loc to OldInduction in InnerLoopVectorizer::creat [...] adds 9ebd843 [WebAssembly] Emit a BasePointer when we have overly-aligned [...] adds ffe516c Add experimental support for unofficial monorepo-like directo [...] adds d2b417a [doc] Add documentation about how to use a monorepo adds 3e9cd16 [TRE] Remove dead code adds 3fab936 [docs] Add a pointer to ExitOnError to the discussion of hand [...] adds 978966f [AArch64] Transfer memory operands when lowering vector load/ [...] adds 330e12b [OptDiag, opt-viewer] Save callee's location and display as link adds c312996 [AMDGPU] Allow hoisting of comparisons out of a loop and elim [...] adds 3fbb1a9 [opt-viewer] Avoid division by zero adds c6a1b2b [AArch64] Rename test to reflect changes after r286110. NFC. adds a5af556 [AArch64] Remove dead check prefixes after r286110. NFC. adds a19c76d [LTO] Add error message on IO error in compileOptimizedToFile. adds 648fd9b GlobalISel: constrain PHI registers on AArch64. adds e7ffbb5 [CMake] Fix llvm_setup_rpath function adds 7b11189 GlobalISel: support selecting G_SELECT on AArch64. adds 160a270 GlobalISel: improve error diagnostics when IRTranslation fails. adds ba37298 Add a missing break statement. NFC. adds ef0facc Bitcode: Split out block info reading into a separate function. adds 8fc9b4d Bitcode: Decouple block info block state from reader. adds adbd909 cmake: Don't try to install exports if there aren't any adds 5498e18 IR, Bitcode: Change bitcode reader to no longer own its memor [...] adds 2b94bbb [AVX-512] Add an avx512f without avx512vl command line to vec [...] adds 20b341a Fix memory leaks (coverity issues 1365586 & 1365591) adds 0a1b0ce Adds the loop end location to the loop metadata. adds 00b1a65 [mips] Renable small data section test. adds b576a60 [AArch64] Fix incorrect CSEL node created adds 174270c cleanup hashSysV a bit. adds 169b408 [VectorLegalizer] Expansion of CTLZ using CTPOP when possible adds ac54d00 [JumpThreading] Unfold selects that depend on the same condition adds abcddd5 [TargetLowering] Fix undef vector element issue with true/fal [...] adds 38950e5 [X86][SSE] Regenerate test (just adds missing header) adds 43252d0 Use the last 7 bits to represent the discriminator to fit it [...] adds a897799 [docs] fix link to AMD manuals (PR30946) adds 5addea5 Remove unused include. NFC. adds 96132e4 Fix PR27500: on MSP430 the branch destination offset is measu [...] adds 32edb7e GlobalISel: support selecting fpext/fptrunc instructions on AArch64. adds f153cd7 [InstCombine] update checks; NFC adds 9feaaa3 [InstCombine] move min/max tests to min/max test file; NFC adds 85bacc4 [RegAllocGreedy] Another fix about NewVRegs for last chance r [...] adds 5195166 NFC small changes in MemDep adds c84d2a5 [SystemZ] Refactor branch and conditional instruction patterns adds 4b0efd1 [MC][AArch64] Cleanup end-of-line parsing in AArch64 AsmParser. adds af4db13 [SystemZ] Rename some Inst* instruction format classes adds 1d55c52 [SystemZ] Refactor InstRR* instruction format patterns adds e4bca28 [SystemZ] Always use semantic instruction classes adds 6e40614 CODE_OWNERS: Take ownership of the loop vectorizer. adds e481b32 Fix typo in comment. NFC. adds 9579593 [LibcallsShrinkWrap] This pass doesn't preserve the CFG. adds 86b25f1 [GlobalISel] Permit select() to erase. adds 9da8087 [GlobalISel] Dump all instructions inserted by selector. adds e5d85d1 [WebAssembly] Convert stackified IMPLICIT_DEF into constant 0. adds 7ec8225 Don't store Twine in a local variable. adds 18fd3e6 [LoopDistribute] Preserve GlobalsAA also in the new Pass Manager. adds ba2fbb8 [SystemZ] Model access registers as LLVM registers adds c505e81 [SystemZ] Add program mask and addressing mode instructions adds d57fec9 [SystemZ] Add missing FP extension instructions adds 474c83f GlobalISel: allow CodeGen to fallback on VReg type/class issues. adds b73e155 [TBAA] Drop support for "old style" scalar TBAA tags adds 42c5a0b Use a default constructor. (NFC) Thanks to David Blaikie for [...] adds c6c2352 AArch64DeadRegisterDefinitionsPass: Fix Changed flag adds 665c3d9 [BasicAA] Teach BasicAA to handle the inaccessiblememonly and [...] adds 4f349ac [asan] Speed up compilation of large C++ stringmaps (tons of [...] adds 92bee0f [ThinLTO] Prevent exporting of locals used/defined in module [...] adds 9a9bc14 [libFuzzer] minor docs update adds c457ee1 GlobalISel: make sure debugging variables are appropriately e [...] adds bb82f0a Emit the DW_AT_type for a C++ static member definition if it [...] adds 7306956 [CodeView] Hook up CodeViewRecordIO to type serialization path. adds 82efd07 Fix some size_t / uint32_t ambiguity errors. adds 97d780b [InstCombine] reduce indentation; NFC adds 6382ee0 [InstCombine] fix profitability equation for max-of-nots transform adds a206940 Added the ability to dump hex bytes easily into a raw_ostream. adds ecca5dd [cmake] Fix handling compiler-rt in LLVM_ENABLE_PROJECTS by t [...] adds 78c322d [ValueTracking] recognize obfuscated variants of umin/umax adds f70da78 [XRay][Docs] Add documentation for XRay in LLVM adds d9a93c0 Bitcode: Change the BitcodeReader to use llvm::Error internally. adds 3885b5c Enable Loop Sink pass for functions that has profile. adds 85f5302 Bitcode: Remove the remnants of the BitcodeDiagnosticInfo class. adds 9e44836 [doc] Remove explicit CMake version requirement for MSVC adds 129c9fc Revert "[ThinLTO] Prevent exporting of locals used/defined in [...] adds 2adde22 [XRay][docs] Fix llvm snippets to be well-formed adds f43d5af [AVX-512] Make VBMI instruction set enabling imply that the B [...] adds 89f0495 [AVX-512] Add test cases to demonstrate PR30947. We accidenta [...] adds 4c1b9a2 [AVX-512] Use alignedstore256 in patterns that look for store [...] adds 106bb1f [AVX-512] Add more varied alignments to tests for storing the [...] adds 45b3e8f [X86] Lower AVX512 and SSE intrinsics for CVTTPD2DQ to X86ISD [...] adds 1f641ae [AVX-512] Add lowering to cvttpd2udq/cvttps2udq for fptoui v2 [...] adds 32054b5 [ARM] Loop Strength Reduction crashes when targeting ARM or Thumb. adds e9ba8f3 [MachineScheduler] Comments fixing. adds 6192bd7 [mips] Add non-const getter for the Elf_Mips_Options class. NFC adds 73ce0c0 [dsymutil] Replace TimeValue with TimePoint adds 517cd17 Zero-initialize chrono duration objects adds 15f3ab0 Remove TimeValue usage from Scalar/SROA.cpp. NFC. adds e6c9f7f [SystemZ] A few fixes in scheduler files. adds 0f89628 [Hexagon] Eliminate Insert4 pseudo-instruction, use combines instead adds 5d84a07 [Hexagon] Separate Hexagon subreg indices for different regis [...] adds 76c218e Bitcode: Change the materializer interface to return llvm::Error. adds d73ad9f [Hexagon] Silence "sometimes uninitialized" warning in Hexago [...] adds 7e3e10a X86: Introduce the "relocImm" ComplexPattern, which represent [...] adds 7deb9ee Revert r286384, "X86: Introduce the "relocImm" ComplexPattern [...] adds e3d8a20 [SCEV] Refactor out a useful pattern; NFC adds e77b2fd [Verifier] clang-format a section; NFC adds faf81d7 Minor unroll pass refacoring. adds d964c86 Make BitcodeReader::parseIdentificationBlock() robust to EOF adds 0034728 [tools] Unbreak the GCC build (workaround a GCC bug). adds c4a40a2 [InstCombine] regenerate checks; NFC adds b347251 [InstCombine] regenerate checks; NFC adds 7467893 Update vectorization debug info unittest. adds e6797b7 GlobalISel: translate invoke and landingpad instructions adds 5224b5a GlobalISel: fix typo. NFC adds 0e23db6 Preserve assumption cache in loop-rotate. adds 35ce2db Add isHotBB helper function to ProfileSummaryInfo adds 64af251 [AVR] Add all of the machine code test suite adds 619ca04 [AVR] Add a selection of CodeGen tests adds 027f4d0 Re-apply r286384, "X86: Introduce the "relocImm" ComplexPatte [...] adds 9c5e4ba [InstCombine] avoid infinite loop from shuffle-extract-insert [...] adds 5ffdf01 [AVX-512] Add test cases to show missed opportunities for usi [...] adds 40cc2d9 [LangRef] Drop "experimental" caveat from operand bundles adds 2513e75 [SCEV] Eta reduce some lambdas; NFC adds 66d2306 [X86] Remove some patterns still referencing int_x86_sse2_cvt [...] adds 7cf26e1 [X86] Move some custom patterns into the currently empty patt [...] adds 70894ee [X86] Convert int_x86_avx_cvtt_pd2dq_256 to fp_to_sint using [...] adds 8943248 [AVX-512][X86] Convert avx_cvtt_ps2dq_256 and sse2_cvttps2dq [...] adds 79013e5 [AVX-512] Allow legacy cvtpd2dq intrinsics to select EVEX enc [...] adds 32c8804 Lift out a helper lambda; NFC adds ea50f98 [SCEVExpander] Don't hoist divisions adds b2e86a3 [SCEVExpander] Hoist unsigned divisons when safe adds 4a04eb0 [ARM] Thumb2 LDR (literal) should accept PC as the destination adds 6392d73 [X86] Add knownbits vector logical shift test adds f524b35 [SelectionDAG] Add support for vector demandedelts in SHL/SRL [...] adds 541a4fd [RegionInfo] Add three tests that include infinite loops adds 3cc1604 [DAGCombiner] Show missed opportunity to UNDEF out-of-range SHL adds 1f5dcd8 Remove unnecessary check prefix directives. NFC. adds 0c5b3f0 [DAGCombiner] Correctly extract the ConstOrConstSplat shift v [...] adds dbb1fda [X86] Add knownbits vector arithmetic shift test adds 80dc268 [InstCombine] auto-generate better checks; NFC adds 2eb0b40 [SelectionDAG] Add support for vector demandedelts in SRA opcodes adds 3cc5ea9 [X86] Add knownbits vector MUL test adds 0deee39 AMDGPU: Add VI i16 support adds 1d957ff reproducer for pr29002 adds e84f684 [SelectionDAG] Add support for vector demandedelts in MUL opcodes adds a7d6813 Use common SDLoc. NFCI. adds 62e7077 Restore part of "[ThinLTO] Prevent exporting of locals used/d [...] adds 68c9861 [X86] Add knownbits vector TRUNC test adds fb6e3a8 Add comments about why we put LoopSink pass at the very late stage. adds 9ae088b [SelectionDAG] Add support for vector demandedelts in TRUNCAT [...] adds 9bf32e2 [OptDiag] Remove non-printable chars from function name adds 2e53b71 Revert r286437 r286438, they caused PR30976 adds 31593fa Fix some Clang-tidy modernize-use-default and readability-red [...] adds b7798f4 [Target] Rename X86/ARM Assembly printer to reflect reality. adds e13ecb7 [opt-viewer] Avoid duplicated remarks adds ab792ca [PDB] Begin adding documentation for the PDB file format. adds 48fbf5c [Support] Improve flexibility of binary blob formatter. adds 67e7880 Fix initialization order error. adds a6269f0 Fix type ambiguity with std::max adds a2ee7d2 AMDGPU: Emit runtime metadata as a note element in .note section adds 2821987 RegisterCoalescer: Ignore interferences for constant physregs adds d2d5b99 [X86] Add knownbits vector SUB test adds 7a98835 [SelectionDAG] Add support for splatted vectors in SUB opcode adds fc1b3b3 ScheduleDAGInstrs: Slightly simplify code; NFC adds d3f442d [X86] Add knownbits vector ADD test adds d31cbc4 [X86] Updated knownbits vector ADD/SUB test adds ca668e1 IR: Introduce inrange attribute on getelementptr indices. adds a145558 [LSR] Tweak loop-strength-reduce-crash test. Test-only change. adds c5bdc92 [SelectionDAG] Add support for vector demandedelts in ADD/SUB [...] adds b020491 GlobalISel: fix mistaken comment change adds 3f647d6 [DAG Combiner] Fix the native computation of the Newton serie [...] adds a461137 Timer: Remove group-less NamedRegionTimer constructor. adds 773603e ScheduleDAGInstrs: Ignore dependencies of constant physregs adds 0e71d50 Fix requirements. adds a0c045c Revert "[AMDGPU] Allow hoisting of comparisons out of a loop [...] adds c2e5ee3 [opt-viewer] Add syntax highlighting adds 2cb2d87 [opt-viewer] Mention Pygments in the description adds 9781343 [opt-viewer] Add option to set source directory adds 9295796 [opt-viewer] Display inlining context adds ee5205b ScheduleDAGInstrs: Add condjump deps to addSchedBarrierDeps() adds 58da394 [opt-viewer] Add column number support adds 55616f6 [llvm] Remove duplicate header from PassInfo.h adds 17ff155 [ADT/MathExtras] Introduce PowerOf2Ceil. adds 7b59fc9 Add a blank line for a test commit. adds 07ca53d [ADT/MathExtras] Add tests for PowerOf2Floor (previously untested). adds 81a2553 AMDGPU: Attempt to fix build failure on x86-64 selfhost build adds 30ebcd3 [IR/DataLayout] Simplify the code using PowerOf2Ceil. NFCI. adds 88b31bf [lli] Simplify the code a bit. No functional change intended. adds 6a1b55e llvm-strings: introduce basic strings tool adds ca29721 llvm-strings: explicitly include cctype adds 582d2b4 [ADT/MathExtras] Make buildbot happy again. adds 90ab4b2 CMake: make LLVM_OPTIMIZED_TABLEGEN friendly with LLVM_EXTERN [...] adds df0b8bc Make the Error class constructor protected adds 5652444 Prevent at compile time converting from Error::success() to E [...] adds 274b04e Fix build failure, update llvm-strings for the new Error API adds c75e3c2 [opt-viewer] PEPify opt-viewer.py adds a547919 Split Bitcode/ReaderWriter.h into separate reader and writer headers adds 85a1c21 Add missing file from r286566 adds 895b529 Fix examples files to reflect header split in r286566. adds 3619728 Fix gold plugin after Error API changes adds 29e1623 [opt-viewer] Make it work in the absence of hotness information adds 286599a [ARM] Add plumbing for GlobalISel adds a597cc6 [X86] Add knownbits vector UDIV test adds 5809b91 [SelectionDAG] Add support for vector demandedelts in UDIV opcodes adds afe6870 [X86] Add knownbits vector UREM/SREM tests adds 912c7ec [SelectionDAG] Add support for vector demandedelts in UREM/SR [...] adds 970d6e8 [X86] Add knownbits vector BSWAP test adds aa9211b [SelectionDAG] Add support for vector demandedelts in BSWAP opcodes adds 9035357 [SystemZ] Use LLGT(R) instructions adds 864946f [SystemZ] Support load-and-zero-rightmost-byte facility adds 93f9010 [SystemZ] Support CL(G)T instructions adds 45849f5 [AMDGPU] TargetStreamer: Fix .note section name adds 0906927 [AArch64] Enable merging of adjacent zero stores for all subtargets. adds 0018041 Fix test/tools/gold/X86/thinlto_funcimport.ll on non-X86 hosts adds 49e4628 llvm-strings: Fix r286556 to add required libraries. adds 3726719 [PowerPC] Add vector conversion builtins to altivec.h - LLVM portion adds f5acbc2 Clean up DWARFFormValue by reducing duplicated code and remov [...] adds 0818f49 Fix windows buildbot where warnings are errors. We had a swit [...] adds e58d246 [AArch64] Early return and minor renaming/refactoring to ease [...] adds 2104040 Fixed issues found by Paul Robinson with my patch for: adds d78e6da [InstCombine] fix formatting of FoldOpIntoSelect(); NFCI adds d22d099 [AArch64] Remove lots of redundant code. NFC. adds ec6378f Revert "Use private linkage for MergedGlobals variables" on Darwin. adds aa0c77bc Fix comments according to the LLVM coding guidelines. adds 81323af [cfi] Implement cfi-icall using inline assembly. adds d758cd3 [sancov] Don't instrument MSVC CRT stdio config helpers adds beb51d4 [AArch64] Fix bugs in isel lowering replaceSplatVectorStore. adds 687ce7f [AArch64] Add test to show narrow zero store merging is disab [...] adds a27bda7 [InstCombine] add tests to show size-increasing select transforms adds d8314f0 [ORC] Refactor the ORC RPC utilities to add some new features. adds b35b701 [ORC] Revert r286620 while I investigate a bot failure. adds 3352395 Bitcode: Prepare to move bitcode readers to free functions. adds 9b252f0 Bitcode: Clean up error handling for certain bitcode query fu [...] adds aeb2eff Bitcode: Change getModuleSummaryIndex() to return an llvm::Expected. adds ed7a0c4 [AArch64] Update a FIXME comment to reflect current state. NFC. adds 35cecc3 Fixed the lost FastMathFlags for FCmp operations in SLPVector [...] adds 6b8a078 Fix -Wpessimizing-move warning. adds 345d21c Make the FunctionComparator of the MergeFunctions pass a stan [...] adds 06f9b86 [cfi] Fix weak functions handling. adds 13e440e [PowerPC] Add remaining vector permute builtins in altivec.h [...] adds 085827f [ORC] Re-apply 286620 with fixes for the ErrorSuccess class. adds cd5b334 Fix a reference-to-temporary introduced in r286607. adds 2322de6 [Orc] Update the BuildingAJIT Chapter 5 server class for the [...] adds feb16c8 Simplify code and address review comments (NFC) adds 797e9cd NFC ProgrammersManual fix adds 823ac75 [ORC] Temporarily fix the RPCUtils unit test by explicitly sp [...] adds aa2b11d Fix static initialization order fiasco in MCTests adds eec5bf7 FunctionComparator: don't rely on argument evaluation order. adds 9755e15 ScheduleDAG: Identify EntrySU/ExitSU when dumping node ids adds e9923d3 MachineScheduler: Dump EntrySU/ExitSU if possible adds 97c4b7a ScheduleDAGInstrs: Move VRegUses to ScheduleDAGMILive; NFCI adds 59a5edd MachineScheduler/ScheduleDAG: Add support to skipping a node. adds dc2310f Revert "(origin/master, origin/HEAD) MachineScheduler/Schedul [...] adds 6d8b101 Fix typo in comment. adds e923c84 [RPC] Add const qualifier to MemberFnWrapper to make buildbot [...] adds 7f0fc37 [LV] Stop saying "use -Rpass-analysis=loop-vectorize" adds 1a26404 [tsan][llvm] Implement the function attribute to disable TSan [...] adds 9728332 [InstCombine] clean up foldSelectOpOp(); NFC adds 04777c4 [libFuzzer] do not initialize parts of TracePC -- let them be [...] adds 8d3ad73 [InstCombine] update test to use FileCheck; NFC adds a8a96a9 [InstCombine] use dyn_cast rather isa+cast; NFC adds d085da5 Print correct directory in merge script. adds 6687aab AMDGPU/SI: Fix visit order assumption in SIFixSGPRCopies adds cccd305 Define DbiStreamBuilder::addSectionContribs. adds 97dac2b [Support] Introduce llvm::formatv() function. adds 005ec66 Fix -Werror build with clang-cl. adds fb49289 Try to fix build after llvm::formatv() patch. adds da5a5c7 AMDGPU/SI: Promote i16 = fp_[us]int f32 for VI adds 2b728d1 Remove extra semicolon. adds 22480ff [libFuzzer] use less stack adds 672f0a3 Fix another problem with formatv(). adds aec8332 Add missing #include. adds 3978213 One more set of changes to fix formatv() on linux. adds 8524467 Improve `git llvm push` to suggest `git pull` when applying p [...] adds 4258590 [ORC] Add a WrappedHandlerReturn type to map handler return t [...] adds 8f3d5a3 [libFuzzer] use a valid ASCII string for a dummy seed corpus adds be30018 [libFuzzer] one more trophy adds b1cfc87 [C API] Fix several null pointer dereferences. adds 18c0ee2 [OCaml] Adapt to the new attribute C API. adds 421c744 llvm-strings: ensure that the last string is correctly printed adds 0a923ad build: add a dependency on llvm-strings adds ddd7d89 [AVX-512] Add support for lowering shuffles to VALIGND/VALIGNQ adds 328301f CODE_OWNERS: Take ownership of the X86 backend. adds 7fc9a56 [AVX-512] Add unmasked version of shift by immediate and shif [...] adds 8a6ccbe As we released 3.9, from the 4.0 release notes, points to ver [...] adds 4e9c4a8 [OCaml] Clear cross-target test deps when building out-of-tree adds fd34282 [Support] Add StringRef::find_lower and contains_lower. adds 7aa2751 [AVX-512] Remove the remaining masked shift by immediate or b [...] adds 98825db llvm-strings: trivialise logic until we support more options adds 763a1ec test: explicitly use gnu format adds a1e4ad0 [ORC] Remove the 'const' qualifier from the member function w [...] adds b2c07dd [X86][SSE] Add test case for PR30845 adds 4506e1d [x86] add smin/smax with zero tests adds eb14a74 [InstCombine][AVX-512] Expand vector shift handling to work o [...] adds 0177b1e [AVX-512] Move masked shift intrinsics tests to the autoupgra [...] adds e1f5c81 IR: Change the Type::get{Array,Vector,Pointer}ElementType() f [...] adds 77a1226 Bitcode: More precise casting. NFCI. adds b0c36f7 Analysis: Simplify the ScalarEvolution::getGEPExpr() interfac [...] adds dead081 Bitcode: Change module reader functions to return an llvm::Expected. adds 9027123 [AMDGPU] Add f16 support (VI+) adds 2460663 [AVX-512] Add unmasked intrinsics for variable shifts of dwor [...] adds e59ef16 [InstCombine][AVX-512] Teach InstCombineCalls to handle the n [...] adds 0a21d7d [X86][AVX512] Add patterns for all variants of VMOVSS/VMOVSD [...] adds 061d58f [X86][AVX512] Removing llvm x86 intrinsics for _mm_mask_move_ [...] adds 2bae973 [X86][SSE] Add additional test case for PR30845 adds 58917b8 [X86][AVX512] Add masked VPMOZX test case for PR26762 adds 85580f9 [X86][SSE] Add zero lower 32-bits test case for PR30845 adds b70e96e revert commit r286761, some builds failed on Win platforms adds 4404d0d AMDGPU: Implement SGPR spilling with scalar stores adds c99852c llvm-strings: support printing the filename adds 5eb34e8 [X86][IR] Reduce the number of full string comparisons in the [...] adds 7c0b299 [ValueTracking] move min/max matching to helper function; NFCI adds 2311432 test: synchronise lit substitutions adds 1bad30c [AVX-512] Fix a disassembler failure for AVX-512 vcmpss/vcmps [...] adds 38feb36 [ValueTracking] recognize even more variants of smin/smax adds a5627e5 llvm-cxxfilt: support reading from stdin adds 5b20442 test: remove the archive before modifying it adds 00eb18d [LangRef] Drop misleading anecdote adds d03c7ac [AVX-512] Remove and autoupgrade masked dword/qword variable [...] adds 460a780 [X86] Cleanup 'x' and 'y' mnemonic suffixes for vcvtpd2dq/vcv [...] adds c41a51e [AVX-512] Add suffixless aliases for EVEX encoded vcvtsi2ss/v [...] adds 1d94ec7 Demangle: only demangle mangled symbols adds dffdb5c Add explicit (void) cast to unused unique_ptr::release() results adds 4a8d98b GlobalISel: Fix typos. NFC adds f2c2f53 [JumpThreading] Prevent non-deterministic use lists adds e16596f GlobalISel: Fix indentation. NFC adds c4d8c58 Remove redundant condition (PR28800) NFCI. adds a52fb28 [InlineCost] Remove skew when calculating call costs adds 7ff5cb1 Remove redundant condition (PR28352) NFCI. adds bdeedc7 Revert "llvm-strings: support printing the filename" adds 91298c7 Reverting r285406, which was a temporary workaround to get on [...] adds 4bbcd0a [PPC] add intrinsics for vec extract exp/significand and vec [...] adds 2e6f35a [X86][AVX] Fixed v16i16/v32i8 ADD/SUB costs on AVX1 subtargets adds ad27fda [CostModel][X86] Added mul costs for vXi8 vectors adds 101d620 [ThinLTO] Make inline assembly handling more efficient in summary adds 0ff9bec Handle non-inlined clang::Type::getAs specializations in extr [...] adds 28b89d6 [Hexagon] Remove unsafe load instructions that affect Stack S [...] adds 8e04a1b Restore "[ThinLTO] Prevent exporting of locals used/defined i [...] adds b91d4c2 Typo adds 63165f6 Use _Unwind_Backtrace on Apple platforms. adds 3b7c9b9 [PDB] Add documentation for the PDB Stream. adds 576eea8 [PDB] Add documentation for the DBI Stream. adds b0a9b66 [X86] Adding reproducer for pr30981 adds af76145 AMDGPU/SI: Support data types other than V4f32 in image intrinsics adds f963245 [opt-viewer] Don't fail with remarks without debug location adds 41723f3 [PPC] Add intrinsic mapping to the xscvhpsp instruction adds b13bcfd92 Give SLP vectorizer credit where it's due. adds c822bf1 ARM: sort register lists by encoding in push/pop instructions. adds 561fa2f Revert "ARM: sort register lists by encoding in push/pop inst [...] adds ab5d486 Test commit adds 1505b20 Revert: r286868 - Test commit adds 43aeb78 [libFuzzer] replace 'auto' with 'auto *' to better follow the [...] adds 52fb4f3 [ThinLTO] Only promote exported locals as marked in index adds 0763004 [AArch64] Factor out transform code from split16BStore. NFC. adds 9640691 [AArch64] Split 0 vector stores into scalar store pairs. adds 2c2c719 [X86] Tests exhibiting bad parial reloading behavior. NFC. adds bf09fb4 [AArch64] Change some pointers to references. NFC. adds fcc03ff Recommit: ARM: sort register lists by encoding in push/pop in [...] adds b5aa1e1 ARM: try to fix GCC 4.8 compilation again after r286881. adds 2900d3d [Hexagon] Give a predicate function a more meaningful name adds 34a869c Add a checkSymbolTable() method to the MachOObjectFile class. adds 4da3d72 Revert "Revert "llvm-strings: support printing the filename"" adds d84b0f9 [tsan] Add support for C++ exceptions into TSan (call __tsan_ [...] adds 107362c RegAllocGreedy: Properly initialize this pass, so that -run-p [...] adds 5ffd1d0 Don't pass nullptr into memcpy adds c1aa37c Remove redundant uses of \brief. adds 34e4865 [InstCombine] add tests to show missing bitcast folds adds fe876c7 GlobalISel: add tests for G_ZEXT/G_SEXT to types smaller than [...] adds ae03f03 Linker: Remove unnecessary call to copyMetadata in IRLinker:: [...] adds 1529aa6 [AArch64] Compute the Newton series for reciprocals natively adds cc5f8fa Avoid calling std::memcmp with nullptr adds 5b9e507 MIRParser: Add support for parsing vreg reg alloc hints adds 856f369 AMDGPU: Fix formatting of 1/2pi immediate adds f32cff3 AMDGPU: Set hasExtraSrcRegAllocReq on v_div_scale_* adds fe23a5c llvm-strings: support the `-n` option adds 2c34688 [ORC] Temporarily disable RPCUtils unit test. adds baf920c Add a file magic for CL.exe's object file created with /GL. adds 648ba5f Fix -Wswitch. adds b07cdea Improve DWARF parsing speed by improving DWARFAbbreviationDec [...] adds d7ba4fc Simplify identify_magic. adds e95f35e [ORC] Work around an apparent modules/linkage issue. adds 9de96ca AMDGPU: Fix f16 fabs/fneg adds 436c139 [X86] Add LLVM version number for each intrinsic handled by a [...] adds 4edb3e4 [AVX-512] Add an example test case for PR31018. adds 1ccb8e7 [X86][GlobalISel] Add minimal call lowering support to the IR [...] adds ee23318 TableGen: Add operator !or adds ed37fbb DAGCombiner: fix combine of trunc and select adds d921006 [opt-viewer] Add support for libYAML for faster parsing adds 57a599e [tablegen] Extract portions of AsmMatcherEmitter for re-use b [...] adds 027cab5 Fix -Wunused introduced in r286945 for release builds. adds 51f2854 [ARM] Add machine scheduler for Cortex-R52 adds 02904ed Introduce TLI predicative for base-relative Jump Tables. adds 5d45e11 DWARFAbbreviationDeclaration.h: Fix a typo in r286924. [-Wdoc [...] adds 183b8aa clang format include/llvm/Support/ELF.h. NFC. adds cf8930d Test commit, remove trailing space. adds f042d84 [X86][FastISel] Fix lowering of overflow result on AVX512 targets adds 718ab76 [AMDGPU] TableGen: change individual instruction flags to bit [...] adds afe8736 [X86][FastISel] Assert that we are dealing with arithmetic wi [...] adds 6ee5459 Get GlobalISel to build on Linux after r286407 adds 6ad6c51 [PowerPC] Implement BE VSX load/store builtins - llvm portion. adds 75d0099 [LoopVectorizer] When estimating reg usage, unused insts may [...] adds 16b35fa [ARM] Make sure GlobalISel is only initialized once. NFCI adds 2d83e19 Revert "[JumpThreading] Prevent non-deterministic use lists" adds 31e986b Revert "[JumpThreading] Unfold selects that depend on the sam [...] adds 33942ae [InstCombine] add tests for bitcasted selects; NFC adds 5ecd473 [X86][SSE] Improve SINT_TO_FP of boolean vector results (signum) adds 5c8c065 [AVX-512] Add AVX-512 vector shift intrinsics to memory santitizer. adds 2e14486 [ARM] GlobalISel: Remove unused members. NFCI adds 334f714 [IndVars] Change the order to compute WidenAddRec in widenIVUse. adds 8ce3284 fix formatting; NFC adds 34888b1 vector load store with length (left justified) llvm portion adds 93f763c Integer legalization: fix MUL expansion adds 6c71701 [LSR] Allow formula containing Reg for SCEVAddRecExpr related [...] adds 1b2455d [x86] auto-generate checks; NFC adds 79f84ef [AMDGPU] Add wave barrier builtin adds 4e7cf47 [ELF] Rewrite isMips64EL() using isMipsELF64(). NFCI. adds 7946b10 AMDGPU: Replace assert(false) with unreachable adds a96c2c7 Revert r286999 which caused buildbot test failures. Some test [...] adds 123bf00 AMDGPU: Fix return after else adds 339cf19 AMDGPU: Analyze mubuf with immediate soffset adds 4436dc3 [AArch64] Lower multiplication by a constant int to shl+add+shl adds 7036e8d AMDGPU: Enable store clustering adds 3b2bb1a llvm-objdump: deal with unexpected object files more gracefully. adds 7e53cdd GlobalISel: remove unused variable to silence warning. adds 4a7eeb4 Fix llvm-symbolizer to correctly sort a symbol array and calc [...] adds dd850be [sanitizer-coverage] make sure asan does not instrument cover [...] adds 17fd000 [AArch64] Refactor test per Matthias' request. adds 0e5d70c [x86] add tests for FP-logic equivalent instruction replacement adds 1d353ca AMDGPU/SI: Fix pattern for i16 = sign_extend i1 adds eb47aeb [AArch64] Add support for Qualcomm's Falkor CPU. adds 0f03473 Object: replace backslashes with slashes in embedded relative [...] adds b451ba8 [C API] Prevent nullptr dereferences in C API for counting at [...] adds c8094ca [x86] auto-generate better checks; NFC adds ce26290 [AddressSanitizer] Add support for (constant-)masked loads an [...] adds df7f96e [x86] auto-generate better checks; NFC adds b572c5c [x86] auto-generate better checks; NFC adds 0156bda General clean up of Mach-O error handling in llvm-objdump. adds e9b0d80 [x86] regenerate checks; NFC adds ea73d16 AMDGPU/GCN: Exit early in hazard recognizer if there is no vr [...] adds 8833323 Always use relative jump table encodings on PowerPC64. adds d021118 Fix Modi and File count if there are more than 65535 modules/files. adds c18d950 [BypassSlowDivision] Simplify partially-tautological if statement. adds eb77a4a [BypassSlowDivision] Handle division by constant numerators better. adds 747716a Fixed the lost FastMathFlags for CALL operations in SLPVector [...] adds 1a2f700 Align Modi and FileInfo substreams on 32-byte offsets. adds 8934fe3 [RegAllocGreedy] Record missed hint for late recoloring. adds 30d8d08 [XRay][docs] Define requirements on installed log handlers. adds 7f4d4fd [AMDGPU] Handle f16 select{_cc} adds 79e3fcd Fix build break when the host C compiler is C89. adds 826ceab AArch64: Use DeadRegisterDefinitionsPass before regalloc. adds 925ac79 [AMDGPU] Refactor v_mac_{f16, f32} patterns into a class NFC adds 68e337a test: use separate input file for test adds 63830bc [ELF] Convert ELF.h to Expected<T>. adds 614df99 [X86] Remove the scalar intrinsics for fadd/fsub/fdiv/fmul adds 49b9925 [X86][AVX512] Removing llvm x86 intrinsics for _mm_mask_move_ [...] adds a33f3df Remove TimeValue class adds bc5962a [mips] not instruction alias adds 6847858 [mips] Fix unsigned/signed type error adds 44d2a03 [X86][SSE] Added PSUBUS from SELECT tests from D25987 adds e068e25 [X86] Regenerated integer divide tests to test on 32 and 64 b [...] adds dc01a45 [X86][AVX512] Added some mask/maskz tests for sitofp/uitofp i [...] adds f1f243f [X86][AVX512] Autoupgrade lossless i32/u32 to f64 conversion [...] adds 69cdcee [X86] Add integer division test for PR23590 adds 744fcd8 Add a little endian variant of TCE. adds 9285a58 test commit, changed tab to spaces, NFC adds 195a4bc [sancov] Name the global containing the main source file name adds 2ca233e [Orc] Re-enable the RPC unit test disabled in r286917. adds 2c72e2a [x86] add fake scalar FP logic instructions to ReplaceableIns [...] adds 337558b [ExecutionEngine] Fix some Clang-tidy modernize-use-default, [...] adds b152eae fix comment formatting; NFC adds 76141b4 [ExecutionEngine] Fix examples build broken in r287126 and ot [...] adds ae5ecee AMDGPU/SI: Avoid creating unnecessary copies in the SIFixSGPR [...] adds 23e86b5 [LoopVectorize] Fix for non-determinism in codegen adds 42fcf0e [AArch64] Handle vector types in replaceZeroVectorStore. adds 1c3c35e [InstCombine] fix formatting and add FIXMEs to foldOperationI [...] adds 4fbd908 AMDGPU: Enable ConstrainCopy DAG mutation adds 2318eb9 [InstCombine] replace unreachable with assert and remove unre [...] adds 4146fdb Make block placement deterministic adds 9769d9a ARM: fix CodeGen for 64-bit shifts. adds 34c84f4 Bitcode: Introduce initial multi-module reader API. adds 99e15d0 [ImplicitNullChecks] Do not not handle call MachineInstrs adds fb82552 X86: Simplify X86ISD::Wrapper operand checks. NFCI. adds 9991c32 Fix "isn't a prototype" warning adds d2c33c4 [AVR] Add the pseudo instruction expansion pass adds fbd189d General clean up of error handling in llvm-objdump to remove [...] adds cfe7cb0 [CodeGen] Sort MMI forward declarations. NFC. adds 8d35b78 [CodeGen] Cleanup MachineModuleInfo doxygen comments. NFC. adds f522e20 [CodeGen] Pull MMI helpers from FunctionLoweringInfo to MMI. NFC. adds 75fc882 Revert "Get GlobalISel to build on Linux after r286407" adds 03cebfb [CodeGen] Pass references, not pointers, to MMI helpers. NFC. adds 10adab0 [AsmParser] Avoid recursing when lexing ';'. NFC. adds 09b0be2 [x86] allow FP-logic ops when one operand is FP and result is FP adds 08c9ce1 [AVR] Add tests for counting leading/trailing zeros adds 96bd7c7 [AVR] Remove unused method from AVRTargetMachine adds ca6e81b [AVR] Fix basic block naming in ctlz and cttz tests adds af4a912 [AVR] Wrap all methods in the pseudo expansion pass in an ano [...] adds 510c1b6 Introduce GlobalSplit pass. adds b8248fe [AVR] Remove some accidentally-commited code that broke the bots adds d177313 llvm-dis: Remove dead code. adds a0c2c80 Remove a stale test case. adds 38b5ba0 [CUDA] Update docs to indicate that clang now supports std::c [...] adds 3ecb35b Use profile info to adjust loop unroll threshold. adds d47d405 [Orc] Clang-format the recent RPC update (r286620 and related). adds 54556b5 [AMDGPU] Expand `br_cc` for f16 adds 8fd8772 [AMDGPU] Promote f16/i16 conversions to f32/i32 adds 0c92298 [AMDGPU] Custom lower f16 = fp_round f64 adds 44a5962 [AMDGPU] Add missing test for rL287203 adds 92cb3ee [CMake] NFC. Updating CMake dependency specifications adds fb21e4d [CMake] [Darwin] Add support for debugging tablegen dependencies adds a685ab4 [XRay] Support AArch64 in LLVM adds 20732e5 [X86] Add a test case where, due to a bug in selectScalarSSEL [...] adds 03b8325 [X86] Fix formatting. NFC adds 74292e4 [ImplicitNullCheck] Fix an edge case where we were hoisting i [...] adds eaec8b3 Delete dead code and add asserts instead; NFC adds 92dbb17 [X86] RegCall - Handling v64i1 in 32/64 bit target adds 189d990 [ARM] Relax restriction on variadic functions for tailcall op [...] adds b83576e [cmake] Move LLVM_BUILD_STATIC check to an earlier point adds ace4c03 Fix spelling in comment. NFC. adds c9799c0 [X86][SSE] Improve lowering of vXi64 multiply with known zero [...] adds ba41afe Wdocumentation fix adds d5fb62a [SCEV] limit recursion depth of CompareSCEVComplexity adds 1d60951 Revert "AMDGPU: Enable ConstrainCopy DAG mutation" adds f29212f [asan] Turn on Mach-O global metadata liveness tracking by default adds f6d63cc [libFuzzer] better documentation for -fsanitize-coverage=trace-cmp adds 9927ed3 [CodeView] Fix some Clang-tidy modernize-use-default, moderni [...] adds cd5b3fa Fix spelling mistakes in X86 target comments. NFC. adds 48bbdf7 Fix spelling mistakes in Hexagon target comments. NFC. adds 2545ab0 [CMake] Error when LTO and lld are enabled on Darwin adds b28b8f2 [ReleaseNotes] Mention the completion of the upstreaming of t [...] adds 9754b3b [lli] Factor out error handling. NFCI. adds 5ef1278 [lli] Prefer `exit(1)` to `return 1` for consistency. adds 46f8597 [CUDA] Update docs; CUDA 8.0 is supported as of a while ago. adds e65e5dd [CUDA] Update docs to indicate that MacOS is now supported. adds dc5eb21 Add an option to disable libedit adds fdec4f5 [AVX-512] Support FCOPYSIGN for v16f32 and v8f64 adds 3d85988 [Docs][TableGen] Remove reference to tablegen supporting octa [...] adds bc5bb8c convert bpf assembler to look like kernel verifier output adds 3962c3a MachineOperand: Add dump() method adds fde9b8b Object: Simplify; remove unnecessary use of unique_ptr. adds cbafc58 AMDGPU: Fix crash on illegal type for inlineasm adds 94dac3b AMDGPU: Move redundant setting of inst properties adds e5e77e4 [AVX-512] Replace masked 16-bit element variable shift intrin [...] adds 35b775d [InstCombine][AVX-512] Teach InstCombineCalls how to handle t [...] adds d1894a1 Fix go binding to adapt the new attribute API adds 072e86d [PPC][DAGCombine] Convert SETCC to subtract when the result i [...] adds 178e833 Fix typo in comment. NFC. adds f04d638 [X86][AVX2] Add v8i32->v8i64 mul test (PR30845) adds 9f23214 Fix spelling mistakes in AMDGPU target comments. NFC. adds 3d73fca [Power9] Add patterns for vnegd, vnegw adds 546b063 Fix spelling mistakes in MIPS target comments. NFC. adds 1e27a61 AMDGPU: Fix legalization of MUBUF instructions in shaders adds f482b59 Cleanup function with clang-format. NFCI. adds 8a56643 [simplifycfg][loop-simplify] Preserve loop metadata in 2 tran [...] adds a006842 AMDGPU/SI: Remove zero_extend patterns for i16 ops selected t [...] adds eb33845 GlobalISel: Fix unconditional fallback with global isel abort [...] adds 0f37c5c [X86][AVX512] Split AVX512F/AVX512VL tests to demonstrate mis [...] adds a60ff0d [mips][msa] Implement f16 support adds 37f2389c [PPC] limit line width to 80 characters adds ed72617 Add link-time detection of LLVM_ABI_BREAKING_CHECKS mismatch adds 3e367e6 IRMover: Avoid accidentally mapping types from the destinatio [...] adds fc3b380 [DebugInfo] Fix some Clang-tidy modernize-use-default, modern [...] adds 8fb7aa0 [LTO] Add option to generate optimization records adds bd831c7 Fix test from r287353: don't use /dev/null adds 13892fc AMDGPU: Fix unused variable warning adds 181c24a [MIRPrinter] Print raw branch probabilities as expected by MIRParser adds 9262f00 Timer: Track name and description. adds 9df5d1c Statistic/Timer: Include timers in PrintStatisticsJSON(). adds c0aec7f Revert "Add link-time detection of LLVM_ABI_BREAKING_CHECKS m [...] adds 24feb85 [MIRPrinter] XFAIL test for powerpc adds 3a7f010 [LoopSimplify] Preserve LCSSA when removing edges from unreac [...] adds 38ccacb [Examples] Fix some Clang-tidy modernize-use-default and Incl [...] adds d4e6a9b [X86] Add knownbits concat_vector test adds 3000aab [SelectionDAG] Add knowbits support for CONCAT_VECTOR opcode adds 5527d64 [AMDGPU] Change frexp.exp intrinsic to return i16 for f16 input adds 7fd026b [CMake] LTO depends on intrinsics_gen adds 435a2cf [CMake] llvm-profdata depends on intrinsics_gen adds dafc355 [CMake] llvm-ar depends on intrinsics_gen adds 456e0ea [CMake] llvm-lto depends on intrinsics_gen adds b7195e7 [CMake] llvm-split depends on intrinsics_gen adds c4506a3 [InstCombine] add tests to show likely unwanted select widening; NFC adds 7ee6add [CMake] bugpoint depends on intrinsics_gen adds f3fc283 [lit] When setting SDKROOT on Darwin, use '--sdk macosx' to f [...] adds 4ed3553 [CMake] sanstats depends on intrinsics_gen adds fae8230 [CMake] verify-uselistorder depends on intrinsics_gen adds 420f51b [AVR] Remove a variable which was unused in release mode adds e208042 [CMake] Apply sandbox profile to target not directory adds eeb5052 [AVR] Remove a bunch of unused variables adds 6f60be5 [CMake] llvm-dsymutil depends on intrinsics_gen adds 2eb4133 [CMake] lli depends on intrinsics_gen adds ef6571d [CMake] lli-child-target depends on intrinsics gen adds 2e7d7fa [CMake] llc depends on intrinsics_gen adds 70a9767 [CMake] llvm-as depends on intrinsics_gen adds 9f6a4f3 [CMake] llvm-bcanalyzer depends on intrinsics_gen adds 801fb8c [CMake] bugpoint-passes depends on intrinsics_gen adds 2553460 [CMake] llvm-stress depends on intrinsics_gen adds 34c6cea [CMake] llvm-diff depends on intrinsics_gen adds 11f7af9 [CMake] llvm-dis depends on intrinsics_gen adds f079d1b [CMake] llvm-dwp depends on intrinsics_gen adds 4339d8b [CMake] llvm-extract depends on intrinsics_gen adds f11a790 [CMake] llvm-link depends on intrinsics_gen adds 252aa32 [CMake] llvm-nm depends on intrinsics_gen adds f6f5514 [CMake] opt depends on intrinsics_gen adds c466a4a [CMake] llvm-lto2 depends on intrinsics_gen adds 90085b5 [tablegen] Merge duplicate definitions of getMinimalTypeForRa [...] adds b313c74 Check that emitted instructions meet their predicates on all [...] adds 8417728 Try to fix unused variable warning on lld-x86_64-darwin13 aft [...] adds c170429 Try again to fix unused variable warning on lld-x86_64-darwin [...] adds aea6373 [X86] Simplify some code a little by removing a dulicate vari [...] adds cee7f67 [X86][AVX512] Added some more complex v64i8 shuffles adds 23f587b [X86][AVX512] Add avx512vbmi tests adds 1bb4b12 Change setDiagnosticsOutputFile to take a unique_ptr from a r [...] adds 4bd62ab [ThinLTO] Implement -pass-remarks-output in ThinLTOCodeGenerator adds c695a0b [ThinLTO] Fix crash when importing an opaque type adds b799ae9 [X86][AVX512] Add VPERMV/VPERMV3 v64i8 byte shuffles on avx51 [...] adds c6fddca [X86][SSE] Improve PSHUFB lowering from either input adds c57d1d6 Give some helper classes/functions internal linkage. NFC. adds 7f90f9e Demangle: use direct member initialization (NFC) adds e17a816 Demangle: replace custom typedef for std::string with std::string adds 21918ee Demangle: remove unnecessary typedef for std::vector adds 902878b Demangle: remove references to allocator for default allocator adds 8afc3ea SHA1: unroll loop in hashBlock. adds 54ac8be Fix buildbot. adds 533eaee Style fix. NFC. adds b665150 Attempt to fix big-endian buildbots. adds e58b8cc [bpf] add BPF disassembler adds 308b046 ExceptionDemo: prefer headers over redeclarations adds 802a1be ExceptionDemo: remove some undefined behaviour adds 15f7935 Fix file name resolution in nested response files adds 815a7e0 [X86][InlineAsm]Test commit. Fixing a wrong comment on X86Asm [...] adds 88688e8 [X86] RegCall - Handling long double arguments adds 0f550ef Fix comment typos. NFC. adds cc5e304 Fix spelling mistakes in SelectionDAG comments. NFC. adds 431da84 Fix spelling mistakes in Transforms comments. NFC. adds 84354d9 Fix spelling mistakes in Tools/Tests comments. NFC. adds 84d1e91 Fix comment typos. NFC. adds d40266b [X86][AVX512F] Add support for uint_to_fp v2i32 to v2f64 on A [...] adds 2cd09f3 Strip trailing whitespace adds de04029 [X86][AVX512VL] Removed duplicate operation action adds c04ba41 [X86][AVX512] Add some initial VBMI target shuffle combine tests adds ccb6a0c [X86][AVX512] Add support for VBMI VPERMV target shuffle combines adds 73373f7 [X86][AVX512] Add support for VBMI VPERMV3 target shuffle combines adds d14ddee [X86][AVX512] Combine unary + zero target shuffles to VPERMV3 [...] adds 89ba3f2 Some instructions were missing, other implemented falsely. th [...] adds 57e5556 The 'vpmultishiftqb' instruction was implemented falsely, thi [...] adds b19918a [AVX-512] Add tests for masked palignr/valignd/valignq shuffl [...] adds cbc1c49 [X86][SSE] Add some initial combine tests that could (should? [...] adds 544f14c [mips] Restrict tail call optimization adds 02ca2cb [GlobalSplit] Port to the new pass manager. adds 4fedda5 [XRay][AArch64] Implemented a test for the compile-time sleds [...] adds 51f0596 [X86] Remove duplicate instructions for (v)movq and replace w [...] adds 80f1fb4 [TableGen][ISel] Do a better job of factoring ScopeMatchers c [...] adds db476db [bpf] fix dwarf elf relocs and line numbers adds 7362a66 [bpf] attempt to fix big-endian bots adds fd72811 [AVX-512] Add EVEX form of VMOVZPQILo2PQIZrm to load folding [...] adds 6ea9891 [Sparc] Use target name instead of namespace as prefix for MC [...] adds 625dd9c Fixing a small typo (A->U). This seem to fixes PR30992. adds ac9341f [TLI] Add functions determining if int parameters/returns sho [...] adds f14d6e1 [InstrProfiling] Mark __llvm_profile_instrument_target last p [...] adds f3db8f5 [X86][SSE] Allow PACKSS to be used to truncate any type of al [...] adds b65e1c7 Adjust arm64-irtranslator.ll test to changes from r287368 adds c636d7a [llvm-cov] Avoid 0% when reporting something that's 0/0 adds 09211df [SelectionDAG] Add ComputeNumSignBits support for CONCAT_VECT [...] adds ab814ec [X86][SSE] Add SSE reciprocal estimate tests adds f570b5f Fix known zero bits for addrspacecast. adds bbc769f small fixup which enables the issuing of the aforementioned i [...] adds b68036c [CodeGenPrep] Skip merging empty case blocks adds da59113 [VectorLegalizer] Remove EVT::getSizeInBits code duplications. NFCI. adds d8c5ecb [MemorySSA] Fix for non-determinism in codegen adds e5154e9 [AsmPrinter] Enable codeview for windows-itanium adds b76c6d3 [TLI] Fix breakage introduced by D21739. adds f5fef36 Check proper live range in extendPHIRanges adds 426286d [mips] seq macro support adds 981f585 [mips] Add tests for half precision floating point support. adds 21e956f [MemorySSA] Fix unit tests broken by D26704 adds 131962d [asan] Make ASan compatible with linker dead stripping on Windows adds 52b86bf fix formatting; NFC adds 7281aa2 reassociate-deadinst.ll: avoid accidental match on path adds 150a3ca LSR debug fix. adds fea0530 [InstCombine] canonicalize min/max constant to select's false value adds ec8604f Remove LLVM_NODISCARD from StringRef. adds 9a48009 Fix attribute list syntax. adds 1e10f37 [LoopReroll] Make root-finding more aggressive. adds 6390da6 Remove LLVM_NODISCARD from getAsInteger(). adds 5db0e4c [CodeGenPrepare] Rewrite a loop in terms of llvm::none_of. NFC. adds 09220c8 [CodeGenPrepare] Don't sink non-cheap addrspacecasts. adds e6b0810 [AArch64LoadStoreOptimizer] Don't treat write to XZR/WZR as a [...] adds 8b17829 DAG: Ignore call site attributes when emitting target intrinsic adds cf423ec Remove LLVM_NODISCARD from two more StringRef members. adds 7625374 Remove LLVM_NODISCARD in one more place. adds d703e44 Analysis: gep inbounds (gep inbounds (...)) is inbounds. adds 64620b1 [AMDGPU] Fix multiple vreg definitions in si-lower-control-flow adds 76884e5 [ADT] Add initializer list support to SmallPtrSet so that set [...] adds b9b3908 Object: Make SymbolicFile::symbol_{begin,end}() virtual and r [...] adds 000f65d [AVX-512] Add support for changing the element size of PALIGN [...] adds 8edd5b4 MC: ensure that we have a section before accessing it adds aa9982b [AVX-512] Add support for commuting VPERMT2(B/W/D/Q/PS/PD) to [...] adds 74964ec [X86] Remove alternate CodeGenOnly version of (v)movq that de [...] adds 619a7d4 [TableGen][ISel] When factoring ScopeMatcher, if the child of [...] adds 4208630 Rename option to -lto-pass-remarks-output adds b6c1f00 [AVX512][inline-asm] Fix AVX512 inline assembly instruction r [...] adds 3d4bb54 [SelectionDAG] ComputeNumSignBits of TRUNCATE operations adds ef60bb0 [wasm] hack around test failure after r287553. adds 60c1ebd Fix line endings adds 691084e [AArch64] Maximize 80-column. NFC. adds af9ba45 [AArch64] Set the max interleave factor for Falkor. adds b7c9c25 [X86] Remove dead code from LowerVectorBroadcast adds 15f8e68 [X86] Change lowerBuildVectorToBitOp() to take a BuildVectorS [...] adds bc347f2 CodeGen: simplify TargetMachine::getSymbol interface. NFC. adds 8cb89db [mips] Add support for unaligned load/store macros. adds fcc1f76 [X86][SSE] Combine UNPCKL(FHADD,FHADD) -> FHADD for v2f64 shuffles. adds d93dfb1 [CostModel][X86] Updated sitofp/uitofp scalar/vector cost tests adds aa687a6 [PowerPC] Emit VMX loads/stores for aligned ops to avoid addi [...] adds a5156e5 Add IntrInaccessibleMemOnly property for intrinsics adds b095048 [mips] seb, seh instruction aliases adds 2fb7ff7 [LCG] Add utilities to compute parent and ascestor relationsh [...] adds d0843bf [Triple] Add Facebook vendor adds abb5e38 Restructure DwarfDebug::beginInstruction(). [NFC] Will help a [...] adds f060e3f Fixed the lost FastMathFlags in Reassociate optimization. Rev [...] adds 66b8dab Remove PDBFileBuilder::build() and related functions. adds 62cfc59 [LCG] Start using SCC relationship predicates in the unittest. adds f907632 Fixed the lost FastMathFlags in GVN(Global Value Numbering). [...] adds 15e8caa LTO: Remove a now-unused InputFile accessor. adds ecfbd3f [LCG] Add a previously missing assert about the relationship [...] adds 2d1bdd9 [X86][AVX512DQ] Add fp <-> int tests for AVX512DQ/AVX512DQ+VL adds fe998e6 [InstCombine] change bitwise logic type to eliminate bitcasts adds e436226 TargetSubtargetInfo: Move implementation to lib/CodeGen; NFC adds 4f65080 [SCCP] Remove code in visitBinaryOperator (and add tests). adds ded77cc Before sample pgo annotation, do not inline a function that h [...] adds 68d10b6 add and use isBitwiseLogicOp() helper function; NFCI adds ac4f8e1 [CUDA] Note in docs that you need to build with -lcudart on MacOS adds a9c2819 [StructurizeCFG] Make hasOnlyUniformBranches a non-member function. adds 9582fba [StructurizeCFG] Use a for-each loop instead of iterators in [...] adds 7532ceb [StructurizeCFG] Merge the two constructors into one. adds 31a9783 [StructurizeCFG] Remove unnecessary "using" in class. adds 9e95f26 [StructurizeCFG] Add whitespace in getAnalysisUsage. adds 65342d2 [StructurizeCFG] Refactor OrderNodes. adds 370e6fd Add some searching functions for ArrayRef<T>. adds 4aa1e95 Make STL range adapter naming consistent. adds 904bc55 [ADT] Fix some Clang-tidy modernize-use-default and Include W [...] adds 6356463 Add convenient functions to compute hashes of byte vectors. adds 329c83f [SCCP] Add a test for switches on undef. adds a64c974 [xray] Add XRay support for Mach-O in CodeGen adds 74e176a Fix builbots. adds 92a50aa [X86] Simplify lowerVectorShuffleAsBitMask to handle only int [...] adds fa494a8 [AVX-512] Remove intrinsics for valignd/q and autoupgrade the [...] adds fca1eea [CostModel][X86] Add v2f32 -> v2i64 fptosi/fptoui cost tests adds e776d60 [MD5] Use write32le instead of spelling it out with shifts. adds df7181d [CostModel][X86] Add missing AVX512DQ v8i64 fptosi/sitofp costs adds 310dd3e Type legalization for compressstore and expandload intrinsics. adds e547b01 [X86][AVX512] Add support for v4i64 fptosi/fptoui/sitofp/uito [...] adds fa8f011 [PowerPC] Remove InstAlias definitions that cause incorrect assembly adds aae639e [DAGCombiner] Fix infinite loop in vector mul/shl combining adds 3806d81 Fix doc of `llvm.bitreverse.iN` adds 3e65807 [DAG] Improve loads-from-store forwarding to handle TokenFactor adds 106bcf1 [LoadStoreVectorizer] Enable vectorization of stores in the p [...] adds 33d5681 [PM] Change the static object whose address is used to unique [...] adds fe8bde7 llvm-readobj: Use hash tables to print dynamic symbols. adds 4f54847 [X86] Allow folding of stack reloads when loading a subreg of [...] adds c293e51 Revert "[Triple] Add Facebook vendor" adds ede1dc8 [LoopUnroll] Move code to exit early. NFC. adds 82fd348 [SLP] Add more tests for SLP Vectorizer. adds 54801d6 llvm-nm: Don't print value or size for undefined or weak symbols adds 882017a llvm-nm: Print correct symbol types for init and fini sections adds 6e1a446 Revert "[lit] When setting SDKROOT on Darwin, use '--sdk maco [...] adds 79d4f8b AMDGPU: Fix MMO when splitting spill adds e834ce5 AMDGPU: Fix adding extra implicit def of register adds 057bbbe AMDGPU: Fix not setting kill flag on temp reg when spilling adds 06a2bf8 [X86][SSE] Add v2i64 -> v2i32 + zero codegen test adds ef97727 AMDGPU: Fix debug printing adds 6939475 AMDGPU: Cleanup immediate folding code adds cfae859 [X86][AVX512VL] Add v2f64 -> v2i32/v2f32 + zero codegen tests adds da8f0a5 [SelectionDAG] Early-out in TargetLowering::expandMUL (NFC) adds 38d2f63 [IR] Fix some Clang-tidy modernize-use-default, modernize-use [...] adds 89e45d5 [X86][SSE] Add awareness of (v)cvtpd2dq and vcvtpd2udq implic [...] adds a9f7e82 [DebugInfo] Fix some Clang-tidy modernize-use-default and Inc [...] adds 5603765 Rely on a single DWARF version instead of having two copies adds 6c40982 [lib/LTO] Rename few instances of Lto to LTO. adds 124ad83 AMDGPU: Make m0 unallocatable adds f18de36 AMDGPU: Remove m0 spilling code adds 1cb6ce6 TRI: Add hook to pass scavenger during frame elimination adds a5a179f AMDGPU: Preserve m0 value when spilling adds 4384b55 Object: Simplify the IRObjectFile symbol iterator implementation. adds 045ffc4 Object: Add IRObjectFile::getTargetTriple(). adds 5b3baa1 [AVX-512] Move a 16 x float shuffle test to the v16 test file [...] adds 538c8c0 [AVX-512] Fix some mask shuffle tests to actually test the ca [...] adds e6ee79f TableGen: Allow signed immediates for instruction aliases adds 3cd5f5b [CommandLine] Remove redundant initializers for StringRef members adds 846003a [X86] Generalize CVTTPD2DQ/CVTTPD2UDQ and CVTDQ2PD/CVTUDQ2PD [...] adds eef324f [AVR] Mark the 'select-must-add-unconditional-jump' test as 'XFAIL' adds 5f72eeb [x86] Rewrite getAddressFromInstr helper function adds 8ac75a1 [x86] Minor refactoring of X86TargetLowering::EmitInstrWithCu [...] adds 242e374 [x86] Fixing PR28755 by precomputing the address used in CMPXCHG8B adds 3609773 [X86][AVX512DQVL] Add v2i64 -> v2f32 + zero codegen tests adds ac42cfa [X86][AVX512DQVL] Add support for v2i64 -> v2f32 SINT_TO_FP/U [...] adds 1a88fd2 [X86][AVX512DQVL] Add awareness of vcvtqq2ps and vcvtuqq2ps i [...] adds 5d31f85 [X86][AVX512] Add support for v2i64 fptosi/fptoui/sitofp/uito [...] adds 911bcb3 [X86][SSE] Improve UINT_TO_FP v2i32 -> v2f64 adds 452417f [X86] Don't round trip a unique_ptr through a raw pointer for [...] adds a1807de Fix unused variable warning adds c3bdfe5 Test Commit, removing a blank line in CREDITS.TXT adds 7a525e0 [AVX-512] Add tests demonstrating failure to generated masked [...] adds ef5c24c Test commit access. adds 55853da [X86] Modify two tests that passed undef to both sides of a v [...] adds 670c05a [DAGCombine] Teach DAG combine that if both inputs of a vsele [...] adds 4162fd7 Add "compiler-rt", "libcxx" and "libcxxabi" to svn:ignore und [...] adds 78c076a [X86] Size a SmallVector to the worst case mask size for a 51 [...] adds 3f9deb7 [X86] Invert an 'if' and early out to fix a weird indentation. NFCI adds f5ba24d [mips] Correct jal expansion for local symbols in .local directives. adds f46b525 [X86][SSE] Added v16i8 shuffle test case from PR31151 adds a14bdf2 [Loop Unswitch] Patch to selective unswitch only the reachabl [...] adds 2e5c54d [X86][SSE] Added knownbits through bitcast test adds 238ebfa Revert "AMDGPU: Preserve m0 value when spilling" adds e2c9a9f Revert "AMDGPU: Remove m0 spilling code" adds 2acdc08 Revert "AMDGPU: Make m0 unallocatable" adds 47526ba Revert "AMDGPU: Fix not setting kill flag on temp reg when spilling" adds dec75f5 Revert "AMDGPU: Fix adding extra implicit def of register" adds 2d7b98b Revert "AMDGPU: Fix MMO when splitting spill" adds 82bcf46 Revert "AMDGPU: Implement SGPR spilling with scalar stores" adds 4baf78f [AVX-512] Add VPERMT2* and VPERMI2* instructions to load fold [...] adds 97ab1ab [AVX-512] Add support for changing VSHUFF64x2 to VSHUFF32x4 w [...] adds 552822c Use SDValue helper instead of explicitly going via SDValue::g [...] adds a9e6de7 Use SDValue helpers instead of explicitly going via SDValue:: [...] adds 2a24827 AMDGPU/SI: Add back reverted SGPR spilling code, but disable it adds 0ff16e1 [SimplifyCFG] auto-generate better checks; NFC adds f5c0d7f [SimplifyCFG] auto-generate better checks; NFC adds 6634682 Replace some callers of setTailCall with setTailCallKind adds 089ef05 [AVX-512] Put the AVX-512 sections of the load folding tables [...] adds e0c0f7a Un-XFAIL an AVR CodeGen test adds 7f41923 [X86] Add SSE, AVX, and AVX2 version of MOVDQU to the load/st [...] adds 24f3ff6 [X86][XOP] Add a reversed reg/reg form for VPROT instructions. adds 0bada48 AMDGPU/SI: Use float as the operand type for amdgcn.interp in [...] adds 3f93ecf [AVX-512] Add VLX versions of VDIVPD/PS and VMULPD/PS to load [...] adds 208b200 [AVX-512] Teach LowerFormalArguments to use the extended regi [...] adds 73b5f3e [AVX-512] Add masked 512-bit integer add/sub instructions to [...] adds d361156 [AVX-512] Add masked 128/256-bit integer add/sub instructions [...] adds 1c279fa [AVX-512] Add unmasked EVEX vpmovzx/sx instructions to load f [...] adds 572676f add optional param to copy metadata when creating selects; NFC adds adc3b91 [InstCombine] don't drop metadata in FoldOpIntoSelect() adds 52894d8 [InstCombine] add test to show missing vector optimization; NFC adds 4036e68 [X86] Add a hasOneUse check to selectScalarSSELoad to keep th [...] adds d6e2724 [X86] Simplify control flow. NFCI adds 968e0ef [X86] Fix the zero extending load detection in X86DAGToDAGISe [...] adds dc1d2a2 [X86] Remove hasOneUse check that is redundant with the one i [...] adds addcca1 [X86] Remove alignment restrictions from load folding table f [...] adds 20f5de8 [SLP] Add new and update existing lit testfor providing more [...] adds 9a74453 [AVX-512] Add masked EVEX vpmovzx/sx instructions to load fol [...] adds d9bcbff fix formatting; NFC adds 3fa74b3 add tests to show missing analysis; NFC adds d358f2c [X86][SSE] Added tests showing missed combines for shuffle to [...] adds 7912f85 [X86] Add TB_NO_REVERSE to entries in the load folding table [...] adds 61f3b2f [X86][SSE] Split lowerVectorShuffleAsShift ready for combines. NFCI. adds 1161bcc [AVX-512] Add integer and fp unpck instructions to load foldi [...] adds ded092b [InstSimplify] allow integer vector types to use computeKnownBits adds 685d8c4 [X86][SSE] Add support for combining target shuffles to 128/2 [...] adds 5e97e81 [X86] Add SHL by 1 to the load folding tables. adds 70ed140 [X86][FMA4] Add test cases to demonstrate missed folding oppo [...] adds 38ad529 [X86][FMA4] Add load folding support for FMA4 scalar intrinsi [...] adds a4203c3 [X86][FMA] Add missing Predicates qualifier around scalar FMA [...] adds 1230bb0 [X86][FMA4] Remove isCommutable from FMA4 scalar intrinsics. [...] adds 28f31d7 [PM] Add an ASCII-art diagram for the call graph in the CGSCC [...] adds 8db10dd Improve error handling in YAML parsing adds 9fdd2a6 Revert "Improve error handling in YAML parsing" adds 9bb8d18 [ThreadPool] Simplify the interface. NFCI. adds 2905563 [ThreadPool] Remove outdated comment after r288016. adds 6f0da3f [ThreadPool] Rollback recent changes until I figure out the b [...] adds 0afff63 [PM] Remove weird marking of invalidated analyses as "preserved". adds 325cb70 [InlineCost] Reduce inline thresholds to compensate for cost changes adds 0291833 [SystemZ] Improve use of conditional instructions adds 3079ca7 [SystemZ] Add remaining branch instructions adds 5952400 [SystemZ] Support load-and-trap instructions adds 7e1b0a5 [SystemZ] Support execution hint instructions adds ee055c7 [SystemZ] Fix build bot fallout from r288030 adds 78f5fdf Revert "[DAG] Improve loads-from-store forwarding to handle T [...] adds 3b038a2 Test commit adds 2ef5665 [X86][SSE] Added tests showing missed combines of shifts with [...] adds 8edff6c [X86][SSE] Added support for combining bit-shifts with shuffles. adds 5e45db3 [LTO] Move finishOptimizationRemarks after codegen adds 8459d93 [CMAKE] fix LLVM_OPTIMIZED_TABLEGEN for Visual Studio adds 55a0fd2 [x86] fix formatting; NFC adds e9741d2 [GVN] Basic optimization remark support adds 01ad79b [GVN, OptDiag] Include the value that is forwarded in load el [...] adds 0ffe6c0 [X86][SSE] Add initial support for combining (V)PMOVZX with s [...] adds 38c5492 [StructurizeCFG] Refactor NearestCommonDominator. adds 2e72c7b [StructurizeCFG] Use range-based for loops. adds 46cc792 Revert r287553: [CodeGenPrep] Skip merging empty case blocks adds ab827bd [AMDGPU] Allow hoisting of comparisons out of a loop and elim [...] adds 6f1fc60 Revert r287637 "[wasm] hack around test failure after r287553." adds 05bdd2e MachineScheduler: Export function to construct "default" scheduler. adds d86b9f2 [DebugInfo] Add support for DW_AT_main_subprogram on subprograms adds b54cba4 Improve error handling in YAML parsing adds 2365a7c [DAG] add helper function for selectcc --> and+shift transforms; NFC adds 56089e7 [SROA] Drop lifetime.start/end intrinsics when they block promotion. adds f75edf0 cmake: Set rpath for loadable modules as well as shared libraries. adds 78a6806 [PM] Extend the explicit 'invalidate' method API on analysis [...] adds 7b6b980 Add link-time detection of LLVM_ABI_BREAKING_CHECKS mismatch adds 2431dc2 Add error checking for Mach-O universal files. adds c3402f3 Put ABI breaking test in Error checking behind LLVM_ENABLE_AB [...] adds 92c01d8 [DAG] clean up foldSelectCCToShiftAnd(); NFCI adds 825a8f8 [GVN, OptDiag] Print the interesting instructions involved in [...] adds bde207a Recognize ${:uid} escapes in intel syntax inline asm adds d39b310 AMDGPU/SI: Avoid moving PHIs to VALU when phi values are defi [...] adds c2ee6e2 [asan/win] Align global registration metadata to its size adds a0894a8 Bitcode: Change expected layout of module blocks. adds 14cd316 Test commit. Comment changes. NFC. adds 62c10d6 [SLPVectorizer] Improved support of partial tree vectorization. adds 15bd673 [StringRef] Use default member initializers and = default. adds e1b9ddf [PM] Fix a bad invalid densemap iterator bug in the new inval [...] adds f4ee49f [X86][SSE] Added tests showing missed combines to (V)PMOVZX adds c02671c Avoid repeated calls to MVT::getScalarSizeInBits(). NFCI. adds bdcd71d [X86][SSE] Add initial support for combining target shuffles [...] adds 06f7518 [GVNHoist] Enable aggressive hoisting when optimizing for code-size adds b67e91e [GVNHoist] Rename variables. adds 341c07b [X86] Moved getTargetConstantFromNode function so a future pa [...] adds e58c265 [SLP] Add a new test for tree vectorization starting from ins [...] adds 1ec5b2f [PowerPC] Improvements for BUILD_VECTOR Vol. 1 adds a310ebc [CVP] Remove cvp-dont-process-adds flag adds 9d387d6 [CVP] Remove use of removed flag (-cvp-dont-process-adds) fro [...] adds f33188e Fix a linefeed at eof. adds e6dbf90 Suppress abi-breaking.h on cygming, for now. adds e148f0a Avoid repeated calls to MVT getSizeInBits and getScalarSizeIn [...] adds c72d18a [docs] Typos and whitespace fixed in LTO docs. adds ba3cf58 [AArch64] Fold spills of COPY of WZR/XZR adds 996fdfd Revert "[GVN, OptDiag] Print the interesting instructions inv [...] adds 5d693fa Revert "[GVN, OptDiag] Include the value that is forwarded in [...] adds f618d6e Revert "[GVN] Basic optimization remark support" adds 9ade85f [AArch64] add tests to show select transforms; NFC adds 57d4f76 [AArch64] add tests for bics; NFC adds a333ef5 AMDGPU: Refactor immediate folding logic adds 8d2aadb AMDGPU: Materialize frame index before add adds 3f36716 AMDGPU: Use else if adds a89dd1d AMDGPU: Rename flat operands to match mubuf adds 81e1a9d [LiveRangeEdit] Handle instructions with no defs correctly. adds c562d96 AMDGPU: Use SGPR_64 for argument lowerings adds a55fccb AMDGPU: Disallow exec as SMEM instruction operand adds 375d719 Use CallSite to simplify code adds c83371f [AArch64] Add a basic SchedMachineModel for Falkor. adds e6480e2 Bitcode: Introduce BitcodeWriter interface. adds fa5f3d1 Change Error unittest to use the LLVM_ENABLE_ABI_BREAKING_CHE [...] adds 2a4cea2 Add missing dependency. adds dc150d0 Add to llvm-objdump the -no-leading-headers option with the u [...] adds 649bcb9 [StructurizeCFG] Fix infinite loop in rebuildSSA. adds c67ca17 Add llvm-modextract tool. adds 10e4110 Bitcode: Add a more comprehensive multi-module test now that [...] adds 29916a1 Add documentation for the PDB Module Info stream. adds f4d1201 [AArch64] allow and-not-compare transform to form 'bics' adds f09dc03 [X86][AVX512DQVL] Improved testing of vcvtqq2ps/vcvtuqq2ps im [...] adds ae45a93 [GVN] Basic optimization remark support adds 68d9b14 [X86][AVX512VL] Improved testing of vcvtpd2ps, vcvtpd2dq/vcvt [...] adds f1f1223 Emit 'no line' information for interesting 'orphan' instructions. adds 0b07a5a Revert https://reviews.llvm.org/rL287679 adds 65c488a [lanai] Manually match 0/-1 with R0/R1. adds b31b2ec Revert r288212 due to lldb failure. adds e8971cb Add another missing dependency. adds 17f24fa [PowerPC] Improvements for BUILD_VECTOR Vol. 2 adds 502534b [PowerPC] Improvements for BUILD_VECTOR Vol. 2 adds db04d03 [RuntimeDyld] Skip undefined symbols when building the symbol table. adds d52ad61 Revert "[GVN] Basic optimization remark support" adds bc02eec Test commit as per developer policy adds fc89a6a Revert 'Test commit as per developer policy' adds bf60ce0 Apply clang-tidy's 'performance-faster-string-find' check to LLVM. adds bdf16bd [X86][SSE] Add tests demonstrating missed opportunities to co [...] adds 080d2a9 Updated test with -verify-machineinstrs to check for PR21931 adds 398063c [PowerPC] Preserve machine dominator tree in PPCVSXFMAMutate adds ec0235a [AArch64] use exact checks; NFC adds 731473a [Support] Use HAVE_DLOPEN to guard dlopen(3) usage adds 989c694 [SelectionDAG] Refactor TargetLowering::expandMUL (NFC) adds 3ed9686 [LibFuzzer] Add macro flags for Posix and Windows. adds b8f993f [X86][SSE] Add support for target shuffle constant folding adds 7a578c9 [WebAssembly] Add llvm-objdump support for wasm file format adds 88948ad [AArch64] Fix useful bits detection for BFM instructions adds 5ed39f2 [InstCombine] auto-generate checks for select+bitwise logic t [...] adds c02caf5 Fix some Clang-tidy and Include What You Use warnings; other [...] adds 3a87393 [X86][SSE] Added tests showing missed combines of ANDs with s [...] adds 785e64d [InstCombine] update test to use FileCheck and auto-generate [...] adds ee3dedb AMDGPU: Move mir tests into mir test directory adds 1a3900e [LibFuzzer] Split up some functions among different headers. adds 09d3a40 Fix macro check for ABI breacking check: should use #if inste [...] adds 19ef8ff [git-llvm] Use --force-interactive when commiting to enable S [...] adds acd3866 CODE_OWNERS: Take ownership of Loop Strenght Reduce. adds ba32f78 [InstCombine] add tests to show potentially missed logic+trun [...] adds b34fe0f [InstCombine] allow more narrowing transforms for logic ops adds 39c1e3d [LoopUnroll] Implement profile-based loop peeling adds 1288944 [LibFuzzer] Add Windows implementations of some IO functions. adds 297c443 [libFuzzer] extend -print_coverage to print the comma-separat [...] adds 76914be Clarify rules for reserved regs, fix aarch64 ones. adds e18cb89 Fix LSR best register search algorithm. adds 3143430 [AArch64] Refactor LSE support as feature separate from V8.1a [...] adds bcdc161 Only computeRelativePath() on new members adds b89fb12 [libFuzzer] extend -rss_limit_mb to crash instantly on a sing [...] adds 241e679 Recommit r288212: Emit 'no line' information for interesting [...] adds e615914 Fix some Clang-tidy modernize-use-default and Include What Yo [...] adds 561ad76 [PS4] Tighten up a triple check. adds 5c1bc63 llvm-lto2: Simpler workaround for PR30396. adds 26256fb MCStreamer: Use "cfi" for CFI related temp labels. adds 1425038 Move FrameInstructions from MachineModuleInfo to MachineFunction adds 40485c2 Move VariableDbgInfo from MachineModuleInfo to MachineFunction adds 29c7b3a Move most EH from MachineModuleInfo to MachineFunction adds a95cded [WebAssembly] Emit .import_global assembler directives adds aa77703 [libFuzzer] temporary disable a part of the test broken by r288283 adds 0719114 revert r288283 as it causes debug info (line numbers) to be l [...] adds 66a1cdb LTO: Remove Symbol::getIRName(). adds c22ac1d Use trigrams to speed up SpecialCaseList. adds 01ad70a [GVN] When merging blocks update LoopInfo if it's available adds 7c3f9d9 Test commit of whitespace to check permissions. adds bba2ee9 Revert previous whitespace change adds ca0a598 Bitcode: Correctly handle Fixed and VBR arrays in BitstreamCu [...] adds 11a8ec6 LTO: Remove ModuleLoader, make loadModuleFromBuffer static an [...] adds 51b7aa5 Bitcode: Introduce BitcodeModule::{has,get}Summary(). adds c0e425d Bitcode: The index used by ModuleSummaryIndexBitcodeReader is [...] adds dc61d3e Object: Extract a ModuleSymbolTable class from IRObjectFile. adds 71fc8a3 Object: Add SF_Executable symbol flag. adds e3134b8 Object: Set SF_Indirect in ModuleSymbolTable. adds e7b3959 Temporarily Revert "Move most EH from MachineModuleInfo to Ma [...] adds 236801e [SCCP] Prefer `auto` when the type is obvious. NFCI. adds 9217738 [SCCP] Switch over to DEBUG() and drop an #ifdef. adds 48b2ddb [X86][SSE] Added tests showing missed combines of shuffles wi [...] adds b5df2de [X86][SSE] Add support for combining ISD::AND with shuffles. adds a88ec27 [X86][SSE] Add support for combining target shuffles to AND b [...] adds 77151a0 [SelectionDAG] Rename and clarify visitFMULForFMADCombine (NFC) adds 7eefb7d Silence GCC's -Wenum-compare after r288335 in the same way it [...] adds 03aab94 [X86][SSE] Tidied up filecheck prefixes for uitofp fast-math tests. adds 400d54c [LMT] Restrict nop length to one not all lakemont MCU support [...] adds f8e7cdb Remove iostream include from WasmObjectFile adds 3160d05 [X86][SSE] Add support for combining AND bitmasks to shuffles. adds 25c80fb [X86][SSE] Classify AND bitmasks as variable shuffle masks adds d9c0875 [SLP] Additional tests with the cost of vector operations. adds d53651a [GVN] Basic optimization remark support adds 7d6a2cb Revert "[SLP] Additional tests with the cost of vector operations." adds a9d6e8b [SystemZ] Fix applyFixup for 12-bit fixups adds c35da94 [SLP] Additional tests with the cost of vector operations. adds 04e94f7 [GVN, OptDiag] Include the value that is forwarded in load el [...] adds 36dece4 [GVN, OptDiag] Print the interesting instructions involved in [...] adds 0be1dd2 Recommit r287403 (reverted in r287804): [lit] When setting SD [...] adds d0c8980 [libFuzzer] treat -rss_limit_mb=0 as no limit adds b76e6a7 [AsmParser] Diagnose empty symbol for .set directive adds a0c671e [SystemZ] Fix fallout from r288374 adds f833935 [libFuzzer] add a test for r288389 (-rss_limit_mb=0 means no limit). adds 16e0f15 [X86][SSE] Moved shuffle mask widening/narrowing helper funct [...] adds 017b7af [llvm] Implement support for -defsym assembler option adds 171807f [SLP] Fixed cost model for horizontal reduction. adds fc1fc8b This change removes the dependency on DwarfDebug that was use [...] adds 20e1df9 Fix module map to create a module for the configured header C [...] adds a849108 Fix unused variable warning in Release builds. NFC. adds eafdc6f Fix a bug with llvm-size and the -m option with multiple file [...] adds 347847b Move most EH from MachineModuleInfo to MachineFunction adds 38026e2 Remove unused header, NFC. adds 74ae925 [tablegen] Delete duplicates from a vector without skipping elements adds 6f328c7 Refactored X86InterleavedAccess into a class. NFCI. adds 1162e1b [WebAssembly] Define more wasm binary encoding constants. adds e126eb1 [SLP] Fix for PR6246: vectorization for scalar ops on vector [...] adds c0d2319 Factor out common parts of LVI and Float2Int into ConstantRan [...] adds ed79607 [PR29121] Don't fold if it would produce atomic vector loads [...] adds b5626bf Fix unused variable warning in Release builds. NFC. adds 963225e Improve documentation on MSVC workaround for AlignedCharArray (NFC) adds f016153 AArch64: fix 128-bit cmpxchg at -O0 (again, again). adds bc7dc48 [SelectionDAG] getRawSubclassData should not return HasDebugValue. adds e348b77 [debug info] Minor cleanup from D27170/r288399 adds 2af4e8b [dsymutil] Simplify a lazy-init condition/expression adds 9ed0c7a [ADT, Support, TableGen] Fix some Clang-tidy modernize-use-de [...] adds 1750ec9 Fix broken buildbots because of r288424 (NFC). adds c139fdb RegisterCoalscer: Only coalesce complete reserved registers. adds bc5dae7 Revert "[SLP] Fix for PR6246: vectorization for scalar ops on [...] adds c31c930 [ARM] Fix for 64-bit CAS expansion on ARM32 with -O0 adds a11b564 llvm-modextract: Call keep() on the output stream before exiting. adds 14b34de [MC] Refactor emitELFSize to make usage more consistent. NFC. adds c7cf225 [AArch64] Fold more spilled/refilled COPYs. adds d937b69 SDAG: Avoid a large, usually empty SmallVector in a recursive [...] adds 40c40ef When instructions are hoisted out of loops by MachineLICM, re [...] adds 2d19570 AMDGPU: Use wider scalar spills for SGPR spilling adds 7d2e3aa [ThinLTO] Stop importing constant global vars as copies in th [...] adds 89cbbcf [DWARF] Put linkage-name on abstract origin even when there's [...] adds 0611580 IR: Change the gep_type_iterator API to avoid always exposing [...] adds 749e583 ConstantFolding: Factor code into helper function adds f5bbb38 Fix GlobalISel build. adds 9c9ec72 IR: Change PointerType to derive from Type rather than Sequen [...] adds 2a9507e Change LoopUnrollPass cost from int to unsigned to make it co [...] adds a705e0e IR: Move NumElements field from {Array,Vector}Type to Sequent [...] adds 579edc5 [AVX-512] Add masked VINSERTF/VINSERTI instructions to load f [...] adds 9c40e33 [AVX-512] Add EVEX PSHUFB instructions to load folding tables. adds 1244527 [AVX-512] Add EVEX vpshuflw/vpshufhw/vpshufd instructions to [...] adds f0760b2 [SLPVectorizer][X86] Add tests for vectorization of buildvect [...] adds 3feaca6 [X86] Refactored getTargetConstantBitsFromNode to allow for e [...] adds a985f0f [SLP] Fix for PR6246: vectorization for scalar ops on vector [...] new 9c87009 Updating branches/google/stable to r288497

The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.

Summary of changes: CMakeLists.txt | 51 +- CODE_OWNERS.TXT | 16 +- CREDITS.TXT | 3 +- bindings/go/llvm/IRBindings.cpp | 28 - bindings/go/llvm/IRBindings.h | 9 - bindings/go/llvm/ir.go | 173 +- bindings/go/llvm/ir_test.go | 102 +- bindings/ocaml/llvm/llvm.ml | 207 +- bindings/ocaml/llvm/llvm.mli | 137 +- bindings/ocaml/llvm/llvm_ocaml.c | 161 +- cmake/config-ix.cmake | 4 +- cmake/modules/AddLLVM.cmake | 82 +- cmake/modules/CMakeLists.txt | 7 +- cmake/modules/CheckCompilerVersion.cmake | 8 +- cmake/modules/CrossCompile.cmake | 5 + cmake/modules/HandleLLVMOptions.cmake | 7 +- cmake/modules/TableGen.cmake | 7 +- docs/CMake.rst | 8 + docs/CommandLine.rst | 3 +- docs/CompileCudaWithLLVM.rst | 23 +- docs/CompilerWriterInfo.rst | 2 +- docs/GettingStarted.rst | 56 + docs/GettingStartedVS.rst | 4 +- docs/GlobalISel.rst | 672 ++ docs/LangRef.rst | 27 +- docs/LibFuzzer.rst | 29 +- docs/LinkTimeOptimization.rst | 42 +- docs/PDB/CodeViewSymbols.rst | 4 + docs/PDB/CodeViewTypes.rst | 4 + docs/PDB/DbiStream.rst | 445 ++ docs/PDB/GlobalStream.rst | 3 + docs/PDB/HashStream.rst | 3 + docs/PDB/ModiStream.rst | 80 + docs/PDB/MsfFile.rst | 121 + docs/PDB/PdbStream.rst | 80 + docs/PDB/PublicStream.rst | 3 + docs/PDB/TpiStream.rst | 3 + docs/PDB/index.rst | 167 + docs/ProgrammersManual.rst | 153 +- docs/ReleaseNotes.rst | 22 +- docs/TableGen/LangIntro.rst | 3 - docs/TableGen/LangRef.rst | 4 +- docs/XRay.rst | 232 + docs/index.rst | 12 + examples/BrainF/BrainFDriver.cpp | 2 +- examples/ExceptionDemo/ExceptionDemo.cpp | 103 +- .../BuildingAJIT/Chapter1/KaleidoscopeJIT.h | 1 - .../Kaleidoscope/BuildingAJIT/Chapter1/toy.cpp | 22 +- .../BuildingAJIT/Chapter2/KaleidoscopeJIT.h | 7 +- .../Kaleidoscope/BuildingAJIT/Chapter2/toy.cpp | 22 +- .../BuildingAJIT/Chapter3/KaleidoscopeJIT.h | 6 +- .../Kaleidoscope/BuildingAJIT/Chapter3/toy.cpp | 22 +- .../BuildingAJIT/Chapter4/KaleidoscopeJIT.h | 9 +- .../Kaleidoscope/BuildingAJIT/Chapter4/toy.cpp | 19 +- .../BuildingAJIT/Chapter5/KaleidoscopeJIT.h | 12 +- .../BuildingAJIT/Chapter5/RemoteJITUtils.h | 12 +- .../BuildingAJIT/Chapter5/Server/server.cpp | 16 +- .../Kaleidoscope/BuildingAJIT/Chapter5/toy.cpp | 35 +- examples/Kaleidoscope/Chapter2/toy.cpp | 6 +- examples/Kaleidoscope/Chapter3/toy.cpp | 13 +- examples/Kaleidoscope/Chapter4/toy.cpp | 13 +- examples/Kaleidoscope/Chapter5/toy.cpp | 15 +- examples/Kaleidoscope/Chapter6/toy.cpp | 16 +- examples/Kaleidoscope/Chapter7/toy.cpp | 19 +- examples/Kaleidoscope/Chapter8/toy.cpp | 33 +- examples/ModuleMaker/ModuleMaker.cpp | 2 +- include/llvm-c/Core.h | 81 - include/llvm/ADT/APFloat.h | 45 +- include/llvm/ADT/ArrayRef.h | 77 +- include/llvm/ADT/DAGDeltaAlgorithm.h | 6 +- include/llvm/ADT/DepthFirstIterator.h | 16 +- include/llvm/ADT/EpochTracker.h | 1 + include/llvm/ADT/EquivalenceClasses.h | 17 +- include/llvm/ADT/FoldingSet.h | 39 +- include/llvm/ADT/ImmutableSet.h | 35 +- include/llvm/ADT/IntervalMap.h | 49 +- include/llvm/ADT/IntrusiveRefCntPtr.h | 22 +- include/llvm/ADT/PointerSumType.h | 2 +- include/llvm/ADT/PointerUnion.h | 19 +- include/llvm/ADT/PostOrderIterator.h | 20 +- include/llvm/ADT/PriorityWorklist.h | 11 +- include/llvm/ADT/SCCIterator.h | 17 +- include/llvm/ADT/STLExtras.h | 91 +- include/llvm/ADT/SetVector.h | 14 +- include/llvm/ADT/SmallPtrSet.h | 17 + include/llvm/ADT/SmallSet.h | 11 +- include/llvm/ADT/SmallString.h | 8 +- include/llvm/ADT/SparseBitVector.h | 50 +- include/llvm/ADT/Statistic.h | 5 +- include/llvm/ADT/StringMap.h | 23 +- include/llvm/ADT/StringRef.h | 118 +- include/llvm/ADT/StringSwitch.h | 9 +- include/llvm/ADT/TinyPtrVector.h | 20 +- include/llvm/ADT/Triple.h | 1 + include/llvm/ADT/ilist_node_options.h | 1 + include/llvm/ADT/iterator.h | 7 +- include/llvm/Analysis/AliasAnalysis.h | 42 +- include/llvm/Analysis/AssumptionCache.h | 2 +- include/llvm/Analysis/BasicAliasAnalysis.h | 2 +- include/llvm/Analysis/BlockFrequencyInfo.h | 2 +- include/llvm/Analysis/BranchProbabilityInfo.h | 2 +- include/llvm/Analysis/CFLAndersAliasAnalysis.h | 7 +- include/llvm/Analysis/CFLSteensAliasAnalysis.h | 7 +- include/llvm/Analysis/CGSCCPassManager.h | 28 +- include/llvm/Analysis/CallGraph.h | 2 +- include/llvm/Analysis/DemandedBits.h | 2 +- include/llvm/Analysis/DependenceAnalysis.h | 2 +- include/llvm/Analysis/DominanceFrontier.h | 2 +- include/llvm/Analysis/EHPersonalities.h | 5 + include/llvm/Analysis/GlobalsModRef.h | 2 +- include/llvm/Analysis/IVUsers.h | 2 +- include/llvm/Analysis/InlineCost.h | 6 +- include/llvm/Analysis/LazyCallGraph.h | 28 +- include/llvm/Analysis/LazyValueInfo.h | 2 +- include/llvm/Analysis/LoopAccessAnalysis.h | 2 +- include/llvm/Analysis/LoopInfo.h | 26 +- include/llvm/Analysis/LoopPassManager.h | 14 +- include/llvm/Analysis/MemoryDependenceAnalysis.h | 4 +- include/llvm/Analysis/ModuleSummaryAnalysis.h | 2 +- include/llvm/Analysis/ObjCARCAliasAnalysis.h | 7 +- include/llvm/Analysis/OptimizationDiagnosticInfo.h | 18 +- include/llvm/Analysis/PostDominators.h | 2 +- include/llvm/Analysis/ProfileSummaryInfo.h | 6 +- include/llvm/Analysis/RegionInfo.h | 2 +- include/llvm/Analysis/ScalarEvolution.h | 12 +- .../llvm/Analysis/ScalarEvolutionAliasAnalysis.h | 2 +- include/llvm/Analysis/ScalarEvolutionExpressions.h | 25 + include/llvm/Analysis/ScopedNoAliasAA.h | 7 +- include/llvm/Analysis/TargetLibraryInfo.h | 53 +- include/llvm/Analysis/TargetTransformInfo.h | 17 +- include/llvm/Analysis/TargetTransformInfoImpl.h | 24 +- include/llvm/Analysis/TypeBasedAliasAnalysis.h | 7 +- include/llvm/Bitcode/BitCodes.h | 8 + include/llvm/Bitcode/BitcodeReader.h | 216 + include/llvm/Bitcode/BitcodeWriter.h | 80 + include/llvm/Bitcode/BitstreamReader.h | 128 +- include/llvm/Bitcode/BitstreamWriter.h | 1 + include/llvm/Bitcode/LLVMBitCodes.h | 17 +- include/llvm/Bitcode/ReaderWriter.h | 207 - include/llvm/CodeGen/AsmPrinter.h | 14 +- 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.../CodeView/TypeVisitorCallbackPipeline.h | 56 +- .../llvm/DebugInfo/CodeView/TypeVisitorCallbacks.h | 15 +- include/llvm/DebugInfo/DIContext.h | 26 +- .../DebugInfo/DWARF/DWARFAbbreviationDeclaration.h | 74 +- include/llvm/DebugInfo/DWARF/DWARFContext.h | 29 +- include/llvm/DebugInfo/DWARF/DWARFDebugInfoEntry.h | 11 +- include/llvm/DebugInfo/DWARF/DWARFDebugMacro.h | 9 +- include/llvm/DebugInfo/DWARF/DWARFFormValue.h | 71 +- include/llvm/DebugInfo/DWARF/DWARFUnit.h | 13 +- include/llvm/DebugInfo/MSF/ByteStream.h | 15 +- include/llvm/DebugInfo/MSF/IMSFFile.h | 12 +- include/llvm/DebugInfo/MSF/SequencedItemStream.h | 8 +- include/llvm/DebugInfo/MSF/StreamArray.h | 19 +- include/llvm/DebugInfo/MSF/StreamInterface.h | 4 +- include/llvm/DebugInfo/MSF/StreamRef.h | 13 +- include/llvm/DebugInfo/MSF/StreamWriter.h | 18 +- .../llvm/DebugInfo/PDB/ConcreteSymbolEnumerator.h | 14 +- include/llvm/DebugInfo/PDB/IPDBEnumChildren.h | 11 +- include/llvm/DebugInfo/PDB/IPDBSession.h | 2 +- include/llvm/DebugInfo/PDB/PDBContext.h | 22 +- include/llvm/DebugInfo/PDB/Raw/DbiStreamBuilder.h | 10 +- .../DebugInfo/PDB/Raw/ISectionContribVisitor.h | 8 +- include/llvm/DebugInfo/PDB/Raw/InfoStreamBuilder.h | 3 - include/llvm/DebugInfo/PDB/Raw/ModInfo.h | 10 +- include/llvm/DebugInfo/PDB/Raw/PDBFileBuilder.h | 3 - include/llvm/DebugInfo/PDB/Raw/TpiHashing.h | 13 +- include/llvm/DebugInfo/PDB/Raw/TpiStreamBuilder.h | 3 - include/llvm/ExecutionEngine/ExecutionEngine.h | 8 +- include/llvm/ExecutionEngine/JITEventListener.h | 18 +- include/llvm/ExecutionEngine/JITSymbol.h | 15 +- include/llvm/ExecutionEngine/ObjectCache.h | 12 +- .../ExecutionEngine/Orc/CompileOnDemandLayer.h | 44 +- .../llvm/ExecutionEngine/Orc/IndirectionUtils.h | 24 +- .../llvm/ExecutionEngine/Orc/LazyEmittingLayer.h | 22 +- .../llvm/ExecutionEngine/Orc/ObjectLinkingLayer.h | 29 +- include/llvm/ExecutionEngine/Orc/OrcError.h | 1 + .../ExecutionEngine/Orc/OrcRemoteTargetClient.h | 175 +- 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| 2 +- include/llvm/IR/GVMaterializer.h | 17 +- include/llvm/IR/GetElementPtrTypeIterator.h | 109 +- include/llvm/IR/GlobalValue.h | 8 +- include/llvm/IR/InstIterator.h | 12 +- include/llvm/IR/InstrTypes.h | 41 +- include/llvm/IR/Instruction.h | 5 + include/llvm/IR/Instructions.h | 14 +- include/llvm/IR/Intrinsics.td | 9 + include/llvm/IR/IntrinsicsAMDGPU.td | 9 +- include/llvm/IR/IntrinsicsPowerPC.td | 85 +- include/llvm/IR/IntrinsicsX86.td | 586 +- include/llvm/IR/LLVMContext.h | 2 +- include/llvm/IR/Module.h | 19 +- include/llvm/IR/ModuleSummaryIndex.h | 26 +- include/llvm/IR/NoFolder.h | 49 +- include/llvm/IR/Operator.h | 15 +- include/llvm/IR/PassManager.h | 364 +- include/llvm/IR/PassManagerInternal.h | 86 +- include/llvm/IR/Type.h | 17 +- include/llvm/IR/Verifier.h | 3 +- include/llvm/InitializePasses.h | 2 + include/llvm/LTO/LTO.h | 36 +- include/llvm/LTO/legacy/LTOCodeGenerator.h | 5 + include/llvm/MC/ConstantPools.h | 2 + include/llvm/MC/MCContext.h | 3 + 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| 19 +- include/llvm/Support/Printable.h | 2 +- include/llvm/Support/RWMutex.h | 23 +- include/llvm/Support/RandomNumberGenerator.h | 14 +- include/llvm/Support/SHA1.h | 9 +- include/llvm/Support/SMLoc.h | 6 +- include/llvm/Support/TargetParser.h | 3 +- include/llvm/Support/TargetRegistry.h | 3 + include/llvm/Support/TimeValue.h | 397 -- include/llvm/Support/Timer.h | 55 +- include/llvm/Support/TrigramIndex.h | 70 + include/llvm/Support/Wasm.h | 87 + include/llvm/Support/YAMLParser.h | 7 +- include/llvm/Support/YAMLTraits.h | 60 +- include/llvm/Support/raw_ostream.h | 38 +- include/llvm/TableGen/Record.h | 124 +- include/llvm/TableGen/SetTheory.h | 15 +- include/llvm/Target/TargetInstrInfo.h | 36 +- include/llvm/Target/TargetItinerary.td | 2 +- include/llvm/Target/TargetLowering.h | 36 +- include/llvm/Target/TargetMachine.h | 2 +- include/llvm/Target/TargetRegisterInfo.h | 29 +- include/llvm/Target/TargetSelectionDAG.td | 4 +- include/llvm/Transforms/IPO.h | 4 + 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+- lib/CodeGen/GlobalISel/RegisterBankInfo.cpp | 10 +- lib/CodeGen/GlobalMerge.cpp | 29 +- lib/CodeGen/ImplicitNullChecks.cpp | 23 +- lib/CodeGen/InlineSpiller.cpp | 11 +- lib/CodeGen/LiveRangeEdit.cpp | 3 +- lib/CodeGen/MIRParser/CMakeLists.txt | 5 +- lib/CodeGen/MIRParser/MIParser.cpp | 38 +- lib/CodeGen/MIRParser/MIParser.h | 4 + lib/CodeGen/MIRParser/MIRParser.cpp | 7 +- lib/CodeGen/MIRPrinter.cpp | 46 +- lib/CodeGen/MachineBlockPlacement.cpp | 6 +- lib/CodeGen/MachineFunction.cpp | 187 + lib/CodeGen/MachineInstr.cpp | 6 + lib/CodeGen/MachineLICM.cpp | 5 + lib/CodeGen/MachineModuleInfo.cpp | 245 +- lib/CodeGen/MachinePipeliner.cpp | 3 +- lib/CodeGen/MachineRegisterInfo.cpp | 11 - lib/CodeGen/MachineScheduler.cpp | 143 +- lib/CodeGen/MachineVerifier.cpp | 10 - lib/CodeGen/ParallelCG.cpp | 5 +- lib/CodeGen/PrologEpilogInserter.cpp | 15 +- lib/CodeGen/RegAllocBase.cpp | 6 +- lib/CodeGen/RegAllocBase.h | 1 + lib/CodeGen/RegAllocGreedy.cpp | 59 +- lib/CodeGen/RegisterCoalescer.cpp | 50 +- lib/CodeGen/ScheduleDAG.cpp | 16 +- lib/CodeGen/ScheduleDAGInstrs.cpp | 89 +- lib/CodeGen/SelectionDAG/CMakeLists.txt | 5 +- lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 287 +- lib/CodeGen/SelectionDAG/FastISel.cpp | 7 +- lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp | 60 +- lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 4 +- lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp | 8 +- lib/CodeGen/SelectionDAG/LegalizeTypes.cpp | 4 +- lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp | 70 +- lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp | 25 +- lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 124 +- lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 31 +- lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 49 +- lib/CodeGen/SelectionDAG/StatepointLowering.cpp | 2 +- lib/CodeGen/SelectionDAG/TargetLowering.cpp | 201 +- lib/CodeGen/ShadowStackGCLowering.cpp | 116 +- lib/CodeGen/SplitKit.cpp | 14 +- lib/CodeGen/SplitKit.h | 10 +- lib/CodeGen/StackColoring.cpp | 3 +- lib/CodeGen/TargetFrameLoweringImpl.cpp | 2 +- lib/CodeGen/TargetInstrInfo.cpp | 29 +- lib/CodeGen/TargetLoweringObjectFileImpl.cpp | 21 +- lib/CodeGen/TargetRegisterInfo.cpp | 30 + lib/CodeGen/TargetSubtargetInfo.cpp | 54 + lib/CodeGen/WinEHPrepare.cpp | 4 +- lib/CodeGen/XRayInstrumentation.cpp | 2 + lib/DebugInfo/CodeView/CMakeLists.txt | 7 +- lib/DebugInfo/CodeView/CVTypeVisitor.cpp | 65 +- lib/DebugInfo/CodeView/CodeViewRecordIO.cpp | 41 +- lib/DebugInfo/CodeView/FieldListRecordBuilder.cpp | 132 - lib/DebugInfo/CodeView/ListRecordBuilder.cpp | 103 - lib/DebugInfo/CodeView/MemoryTypeTableBuilder.cpp | 46 - lib/DebugInfo/CodeView/MethodListRecordBuilder.cpp | 49 - lib/DebugInfo/CodeView/TypeDumper.cpp | 4 +- lib/DebugInfo/CodeView/TypeRecordBuilder.cpp | 119 - lib/DebugInfo/CodeView/TypeRecordMapping.cpp | 100 +- lib/DebugInfo/CodeView/TypeSerializer.cpp | 243 + lib/DebugInfo/CodeView/TypeStreamMerger.cpp | 15 +- lib/DebugInfo/CodeView/TypeTableBuilder.cpp | 300 - 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lib/DebugInfo/PDB/Raw/RawSession.cpp | 25 +- lib/DebugInfo/PDB/Raw/TpiStream.cpp | 15 +- lib/DebugInfo/PDB/Raw/TpiStreamBuilder.cpp | 46 +- lib/Demangle/ItaniumDemangle.cpp | 195 +- lib/ExecutionEngine/Interpreter/CMakeLists.txt | 5 +- lib/ExecutionEngine/Interpreter/Execution.cpp | 5 +- lib/ExecutionEngine/Interpreter/Interpreter.cpp | 8 +- lib/ExecutionEngine/Orc/CMakeLists.txt | 1 - lib/ExecutionEngine/Orc/OrcError.cpp | 2 + lib/ExecutionEngine/Orc/OrcMCJITReplacement.h | 31 +- lib/ExecutionEngine/Orc/OrcRemoteTargetRPCAPI.cpp | 53 - lib/ExecutionEngine/RuntimeDyld/RuntimeDyld.cpp | 4 + .../RuntimeDyld/RuntimeDyldChecker.cpp | 4 +- lib/Fuzzer/CMakeLists.txt | 4 +- lib/Fuzzer/FuzzerCorpus.h | 2 + lib/Fuzzer/FuzzerDefs.h | 70 +- lib/Fuzzer/FuzzerDictionary.h | 5 +- lib/Fuzzer/FuzzerDriver.cpp | 36 +- lib/Fuzzer/FuzzerExtFunctionsWeak.cpp | 1 + lib/Fuzzer/FuzzerFlags.def | 8 +- lib/Fuzzer/FuzzerIO.cpp | 57 +- lib/Fuzzer/FuzzerIO.h | 62 + lib/Fuzzer/FuzzerIOPosix.cpp | 87 + lib/Fuzzer/FuzzerIOWindows.cpp | 147 + lib/Fuzzer/FuzzerInternal.h | 3 + lib/Fuzzer/FuzzerLoop.cpp | 23 +- lib/Fuzzer/FuzzerMutate.cpp | 3 +- lib/Fuzzer/FuzzerSHA1.cpp | 22 +- lib/Fuzzer/FuzzerSHA1.h | 31 + lib/Fuzzer/FuzzerTracePC.cpp | 23 +- lib/Fuzzer/FuzzerTracePC.h | 4 +- lib/Fuzzer/FuzzerTraceState.cpp | 6 +- lib/Fuzzer/FuzzerUtil.cpp | 15 +- lib/Fuzzer/FuzzerUtil.h | 65 + lib/Fuzzer/FuzzerUtilDarwin.cpp | 1 + lib/Fuzzer/FuzzerUtilLinux.cpp | 2 +- lib/Fuzzer/test/CMakeLists.txt | 1 + .../test/OutOfMemorySingleLargeMallocTest.cpp | 28 + lib/Fuzzer/test/coverage.test | 1 + lib/Fuzzer/test/fuzzer-leak.test | 1 + lib/Fuzzer/test/fuzzer-oom-with-profile.test | 4 +- lib/Fuzzer/test/fuzzer-oom.test | 11 +- lib/Fuzzer/test/ulimit.test | 2 + lib/IR/AsmWriter.cpp | 7 + lib/IR/AttributeImpl.h | 6 - lib/IR/Attributes.cpp | 134 - lib/IR/AutoUpgrade.cpp | 674 +- lib/IR/CMakeLists.txt | 5 +- lib/IR/ConstantFold.cpp | 97 +- lib/IR/ConstantFold.h | 7 +- lib/IR/ConstantRange.cpp | 79 + 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lib/MC/WinCOFFObjectWriter.cpp | 2 +- lib/Object/Archive.cpp | 6 +- lib/Object/ArchiveWriter.cpp | 17 +- lib/Object/Binary.cpp | 2 + lib/Object/CMakeLists.txt | 2 + lib/Object/COFFObjectFile.cpp | 8 +- lib/Object/Error.cpp | 21 +- lib/Object/IRObjectFile.cpp | 248 +- lib/Object/MachOObjectFile.cpp | 93 +- lib/Object/MachOUniversal.cpp | 82 +- lib/Object/ModuleSummaryIndexObjectFile.cpp | 51 +- lib/Object/ModuleSymbolTable.cpp | 189 + lib/Object/ObjectFile.cpp | 6 +- lib/Object/SymbolSize.cpp | 18 +- lib/Object/SymbolicFile.cpp | 10 +- lib/Object/WasmObjectFile.cpp | 313 + lib/Passes/CMakeLists.txt | 5 +- lib/Passes/PassBuilder.cpp | 17 +- lib/Passes/PassRegistry.def | 1 + lib/ProfileData/Coverage/CoverageMappingReader.cpp | 2 +- lib/Support/APFloat.cpp | 64 +- lib/Support/CMakeLists.txt | 3 +- lib/Support/CommandLine.cpp | 6 + lib/Support/DynamicLibrary.cpp | 4 +- lib/Support/Error.cpp | 15 + lib/Support/FormatVariadic.cpp | 156 + lib/Support/MD5.cpp | 40 +- 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lib/Target/AArch64/AArch64FrameLowering.cpp | 14 +- lib/Target/AArch64/AArch64ISelDAGToDAG.cpp | 58 +- lib/Target/AArch64/AArch64ISelLowering.cpp | 378 +- lib/Target/AArch64/AArch64ISelLowering.h | 16 +- lib/Target/AArch64/AArch64InstrFormats.td | 11 +- lib/Target/AArch64/AArch64InstrInfo.cpp | 55 +- lib/Target/AArch64/AArch64InstrInfo.h | 8 +- lib/Target/AArch64/AArch64InstrInfo.td | 26 + lib/Target/AArch64/AArch64InstructionSelector.cpp | 132 +- lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp | 291 +- lib/Target/AArch64/AArch64RegisterInfo.cpp | 21 +- lib/Target/AArch64/AArch64SchedFalkor.td | 26 + lib/Target/AArch64/AArch64SchedVulcan.td | 13 +- lib/Target/AArch64/AArch64Subtarget.cpp | 3 + lib/Target/AArch64/AArch64Subtarget.h | 7 +- lib/Target/AArch64/AArch64TargetMachine.cpp | 19 +- lib/Target/AArch64/AArch64TargetObjectFile.cpp | 4 +- lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp | 360 +- lib/Target/AArch64/CMakeLists.txt | 5 +- .../MCTargetDesc/AArch64ELFObjectWriter.cpp | 6 +- .../AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp | 13 +- lib/Target/AMDGPU/AMDGPU.td | 8 + lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp | 312 +- lib/Target/AMDGPU/AMDGPUAsmPrinter.h | 4 - lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | 20 +- lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 96 +- lib/Target/AMDGPU/AMDGPUISelLowering.h | 6 +- lib/Target/AMDGPU/AMDGPUInstrInfo.cpp | 4 - lib/Target/AMDGPU/AMDGPUInstrInfo.h | 2 - lib/Target/AMDGPU/AMDGPUInstructions.td | 7 +- lib/Target/AMDGPU/AMDGPUMCInstLower.cpp | 6 + lib/Target/AMDGPU/AMDGPUPTNote.h | 42 + lib/Target/AMDGPU/AMDGPURuntimeMetadata.h | 15 +- lib/Target/AMDGPU/AMDGPUSubtarget.cpp | 2 + lib/Target/AMDGPU/AMDGPUSubtarget.h | 4 + lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 9 + lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 67 +- lib/Target/AMDGPU/BUFInstructions.td | 51 +- lib/Target/AMDGPU/DSInstructions.td | 10 +- .../AMDGPU/Disassembler/AMDGPUDisassembler.cpp | 27 +- .../AMDGPU/Disassembler/AMDGPUDisassembler.h | 7 +- lib/Target/AMDGPU/FLATInstructions.td | 32 +- lib/Target/AMDGPU/GCNHazardRecognizer.cpp | 6 +- .../AMDGPU/InstPrinter/AMDGPUInstPrinter.cpp | 4 +- .../AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.h | 13 + .../AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp | 378 +- .../AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.h | 49 +- lib/Target/AMDGPU/MCTargetDesc/LLVMBuild.txt | 2 +- .../AMDGPU/MCTargetDesc/R600MCCodeEmitter.cpp | 7 +- lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp | 5 +- lib/Target/AMDGPU/MIMGInstructions.td | 141 +- lib/Target/AMDGPU/R600Packetizer.cpp | 2 +- lib/Target/AMDGPU/SIFixSGPRCopies.cpp | 112 +- lib/Target/AMDGPU/SIFoldOperands.cpp | 208 +- lib/Target/AMDGPU/SIISelLowering.cpp | 200 +- lib/Target/AMDGPU/SIISelLowering.h | 13 + lib/Target/AMDGPU/SIInsertWaits.cpp | 65 +- lib/Target/AMDGPU/SIInstrFormats.td | 70 +- lib/Target/AMDGPU/SIInstrInfo.cpp | 306 +- lib/Target/AMDGPU/SIInstrInfo.h | 6 + lib/Target/AMDGPU/SIInstrInfo.td | 25 +- lib/Target/AMDGPU/SIInstructions.td | 227 +- lib/Target/AMDGPU/SILoadStoreOptimizer.cpp | 24 +- lib/Target/AMDGPU/SILowerControlFlow.cpp | 100 +- lib/Target/AMDGPU/SILowerI1Copies.cpp | 28 +- lib/Target/AMDGPU/SIMachineScheduler.cpp | 10 +- lib/Target/AMDGPU/SIRegisterInfo.cpp | 485 +- lib/Target/AMDGPU/SIRegisterInfo.h | 19 +- lib/Target/AMDGPU/SIRegisterInfo.td | 35 +- lib/Target/AMDGPU/SIShrinkInstructions.cpp | 1 + lib/Target/AMDGPU/SIWholeQuadMode.cpp | 2 +- lib/Target/AMDGPU/SMInstructions.td | 23 +- lib/Target/AMDGPU/SOPInstructions.td | 37 +- lib/Target/AMDGPU/VIInstructions.td | 4 + lib/Target/AMDGPU/VOP1Instructions.td | 84 +- lib/Target/AMDGPU/VOP2Instructions.td | 146 +- lib/Target/AMDGPU/VOP3Instructions.td | 51 +- lib/Target/AMDGPU/VOPCInstructions.td | 370 +- lib/Target/AMDGPU/VOPInstructions.td | 8 +- lib/Target/ARM/ARM.td | 2 +- lib/Target/ARM/ARMAsmPrinter.cpp | 8 + lib/Target/ARM/ARMAsmPrinter.h | 2 +- lib/Target/ARM/ARMBaseInstrInfo.cpp | 6 +- lib/Target/ARM/ARMBaseRegisterInfo.cpp | 20 +- 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lib/Target/ARM/LLVMBuild.txt | 2 +- lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp | 9 +- lib/Target/ARM/Thumb1FrameLowering.cpp | 16 +- lib/Target/AVR/AVRAsmPrinter.cpp | 2 + lib/Target/AVR/AVRCallingConv.td | 7 - lib/Target/AVR/AVRExpandPseudoInsts.cpp | 1431 ++++ lib/Target/AVR/AVRTargetMachine.cpp | 13 +- lib/Target/AVR/CMakeLists.txt | 6 +- lib/Target/AVR/InstPrinter/AVRInstPrinter.cpp | 5 +- lib/Target/BPF/BPF.td | 6 + lib/Target/BPF/BPFInstrInfo.td | 114 +- lib/Target/BPF/CMakeLists.txt | 2 + lib/Target/BPF/Disassembler/BPFDisassembler.cpp | 154 + lib/Target/BPF/Disassembler/CMakeLists.txt | 4 + lib/Target/BPF/Disassembler/LLVMBuild.txt | 23 + lib/Target/BPF/InstPrinter/BPFInstPrinter.cpp | 18 +- lib/Target/BPF/LLVMBuild.txt | 3 +- lib/Target/BPF/MCTargetDesc/BPFELFObjectWriter.cpp | 8 +- lib/Target/BPF/MCTargetDesc/BPFMCAsmInfo.h | 9 + lib/Target/BPF/MCTargetDesc/BPFMCCodeEmitter.cpp | 19 +- lib/Target/CMakeLists.txt | 1 - lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp | 2 +- lib/Target/Hexagon/CMakeLists.txt | 1 + lib/Target/Hexagon/Hexagon.td | 1 + lib/Target/Hexagon/HexagonAsmPrinter.cpp | 20 +- lib/Target/Hexagon/HexagonBitSimplify.cpp | 102 +- lib/Target/Hexagon/HexagonBitTracker.cpp | 8 +- lib/Target/Hexagon/HexagonCommonGEP.cpp | 2 + lib/Target/Hexagon/HexagonConstPropagation.cpp | 18 +- lib/Target/Hexagon/HexagonCopyToCombine.cpp | 11 +- lib/Target/Hexagon/HexagonExpandCondsets.cpp | 15 +- lib/Target/Hexagon/HexagonFrameLowering.cpp | 24 +- lib/Target/Hexagon/HexagonGenInsert.cpp | 19 +- lib/Target/Hexagon/HexagonGenPredicate.cpp | 2 +- lib/Target/Hexagon/HexagonHardwareLoops.cpp | 10 +- lib/Target/Hexagon/HexagonISelDAGToDAG.cpp | 274 +- lib/Target/Hexagon/HexagonISelLowering.cpp | 36 +- lib/Target/Hexagon/HexagonISelLowering.h | 4 - lib/Target/Hexagon/HexagonInstrFormats.td | 2 +- lib/Target/Hexagon/HexagonInstrFormatsV60.td | 4 +- lib/Target/Hexagon/HexagonInstrInfo.cpp | 134 +- lib/Target/Hexagon/HexagonInstrInfo.td | 1004 +-- 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.../Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp | 4 + .../Hexagon/MCTargetDesc/HexagonMCCodeEmitter.h | 5 + .../Hexagon/MCTargetDesc/HexagonMCDuplexInfo.cpp | 2 +- lib/Target/Hexagon/RDFGraph.cpp | 3 +- lib/Target/Hexagon/RDFGraph.h | 1 - lib/Target/Lanai/LanaiISelDAGToDAG.cpp | 24 +- lib/Target/Lanai/LanaiInstrInfo.td | 5 - lib/Target/MSP430/MSP430BranchSelector.cpp | 306 +- lib/Target/Mips/AsmParser/MipsAsmParser.cpp | 281 +- lib/Target/Mips/Disassembler/MipsDisassembler.cpp | 4 +- lib/Target/Mips/MicroMips32r6InstrInfo.td | 4 + lib/Target/Mips/MicroMipsInstrInfo.td | 6 + lib/Target/Mips/Mips16FrameLowering.cpp | 4 +- lib/Target/Mips/MipsAsmPrinter.cpp | 2 +- lib/Target/Mips/MipsFastISel.cpp | 8 +- lib/Target/Mips/MipsISelLowering.cpp | 54 +- lib/Target/Mips/MipsISelLowering.h | 5 +- lib/Target/Mips/MipsInstrInfo.td | 34 + lib/Target/Mips/MipsMSAInstrInfo.td | 50 + lib/Target/Mips/MipsMachineFunction.cpp | 2 +- lib/Target/Mips/MipsRegisterInfo.td | 6 + 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test/CodeGen/X86/avx2-intrinsics-x86.ll | 1173 ++-- test/CodeGen/X86/avx2-vbroadcast.ll | 118 +- test/CodeGen/X86/avx512-calling-conv.ll | 50 +- test/CodeGen/X86/avx512-cvt.ll | 120 +- test/CodeGen/X86/avx512-ext.ll | 35 +- test/CodeGen/X86/avx512-extract-subvector.ll | 276 + test/CodeGen/X86/avx512-fsel.ll | 2 +- test/CodeGen/X86/avx512-insert-extract.ll | 42 +- test/CodeGen/X86/avx512-intrinsics-upgrade.ll | 831 +++ test/CodeGen/X86/avx512-intrinsics.ll | 6024 ++++++++-------- test/CodeGen/X86/avx512-load-store.ll | 169 + test/CodeGen/X86/avx512-mask-op.ll | 54 +- test/CodeGen/X86/avx512-mask-spills.ll | 10 +- test/CodeGen/X86/avx512-regcall-Mask.ll | 195 + test/CodeGen/X86/avx512-regcall-NoMask.ll | 38 + test/CodeGen/X86/avx512-vbroadcast.ll | 4 +- test/CodeGen/X86/avx512-vec-cmp.ll | 6 +- test/CodeGen/X86/avx512-vpermv3-commute.ll | 87 +- test/CodeGen/X86/avx512bw-intrinsics-upgrade.ll | 248 +- test/CodeGen/X86/avx512bw-intrinsics.ll | 616 +- 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