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from a2a29167556 Daily bump. new b218c425328 [RISC-V] add implied extension repeatly until stable new 2d7dda84730 RISC-V: Use tu policy for first-element vec_set [PR115725]. new c32995c4453 [PATCH] RISC-V: Fix unrecognizable pattern in riscv_expand_ [...] new 87346ed74cc RISC-V: Bugfix vec_extract vls mode iterator restriction mismatch new 4db38759dca RISC-V: Bugfix vec_extract v mode iterator restriction mismatch new c38dbfc1ce7 RISC-V: Fix missing boolean_expression in zmmul extension new 68ef0c321a7 RISC-V: Bugfix ICE for RVV intrinisc vfw on _Float16 scalar new 92003fad999 RISC-V: Fix parsing of Zic* extensions new 3a7e796b48b RISC-V: Add -X to link spec new 937713a5235 RISC-V: Do not allow v0 as dest when merging [PR115068]. new 0abce4116a5 RISC-V: Split vwadd.wx and vwsub.wx and add helpers.

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Summary of changes: gcc/common/config/riscv/riscv-common.cc | 22 ++++-- gcc/config/riscv/autovec.md | 5 +- gcc/config/riscv/elf.h | 1 + gcc/config/riscv/freebsd.h | 1 + gcc/config/riscv/linux.h | 1 + gcc/config/riscv/riscv-protos.h | 4 ++ gcc/config/riscv/riscv-subset.h | 3 + gcc/config/riscv/riscv-vector-builtins.cc | 51 ++++++++++++++ gcc/config/riscv/riscv.cc | 5 +- gcc/config/riscv/riscv.opt | 4 +- gcc/config/riscv/vector-iterators.md | 6 ++ gcc/config/riscv/vector.md | 82 +++++++++++++++++----- .../riscv/rvv/autovec/vls-vlmax/vec_set-1.c | 12 ++-- .../riscv/rvv/autovec/vls-vlmax/vec_set-2.c | 12 ++-- .../riscv/rvv/autovec/vls-vlmax/vec_set-3.c | 12 ++-- .../riscv/rvv/autovec/vls-vlmax/vec_set-4.c | 12 ++-- .../gcc.target/riscv/rvv/base/pr114988-1.c | 9 +++ .../gcc.target/riscv/rvv/base/pr114988-2.c | 9 +++ .../gcc.target/riscv/rvv/base/pr115068-run.c | 6 ++ gcc/testsuite/gcc.target/riscv/rvv/base/pr115068.c | 55 +++++++++++++++ .../gcc.target/riscv/rvv/base/pr115456-1.c | 31 ++++++++ .../gcc.target/riscv/rvv/base/pr115456-2.c | 31 ++++++++ .../gcc.target/riscv/rvv/base/pr115456-3.c | 31 ++++++++ .../gcc.target/riscv/rvv/base/vwaddsub-1.c | 48 +++++++++++++ .../riscv/{zicond-ice-1.c => zicond-ice-5.c} | 12 ++-- gcc/testsuite/gcc.target/riscv/zmmul-3.c | 8 +++ 26 files changed, 402 insertions(+), 71 deletions(-) create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/pr114988-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/pr114988-2.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/pr115068-run.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/pr115068.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/pr115456-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/pr115456-2.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/pr115456-3.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/vwaddsub-1.c copy gcc/testsuite/gcc.target/riscv/{zicond-ice-1.c => zicond-ice-5.c} (65%) create mode 100644 gcc/testsuite/gcc.target/riscv/zmmul-3.c