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from 119507f [AVR] Add MIR tests for a few pseudo instructions new 4f38f40 [X86][SSE] Add vector test for (shl (or x, c1), c2) -> (or (s [...]

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Summary of changes: test/CodeGen/X86/combine-shl.ll | 36 ++++++++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+)