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from e9ea407c474 RISC-V: Optimize vsetvl AVL for VLS VLMAX auto-vectorization new 676d33f95ee aarch64: PR target/99195 annotate qabs,qneg patterns for ve [...] new e90791e5a02 aarch64: PR target/99195 annotate vector compare patterns f [...]

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Summary of changes: gcc/config/aarch64/aarch64-simd.md | 16 ++-- gcc/testsuite/gcc.target/aarch64/simd/pr99195_4.c | 10 +++ gcc/testsuite/gcc.target/aarch64/simd/pr99195_7.c | 96 +++++++++++++++++++++++ 3 files changed, 114 insertions(+), 8 deletions(-) create mode 100644 gcc/testsuite/gcc.target/aarch64/simd/pr99195_7.c