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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_llvm_apm/llvm-master-arm-spec2k6-Oz in repository toolchain/ci/llvm-project.

from a3d0b5805e5f [analyzer] Fix deprecated plistlib functions adds 727a359979ec [NFC][X86][LV] Improve costmodel test coverage for interle [...] adds 657e1e316b71 [NFC][X86][Codegen] Add test coverage for interleaved i8 l [...] adds d908118b8a26 [llvm-jitlink] Fix a FIXME. adds b82683b2eb36 [libc++] [test] Remove "// -*- C++ -*-" comments from gene [...] adds d4b59a05fc75 [libc++] Remove "// -*- C++ -*-" comments from all .cpp fi [...] adds 957b4c57501b [OpenMP][testing] increase threshold for omp_get_wtime test adds 343b9e8590db [OpenMP][host runtime] Introduce kmp_cpuinfo_flags_t to re [...] adds f98a918d3495 [TrivialDeadness] Update function comment adds c333505fa5d6 [libc++] [test] Remove filenames from copyright headers. NFCI. adds bd21257bf5af [lldb] [Host] Fix flipped logic in TerminalState::Save() adds 907d5da3da19 [NFC][Codegen][X86] Drop unused check prefixes in newly ad [...] adds 5b44c716ee0f [AIX]implement the --syms and using "symbol index and qual [...] adds 4f0225f6d21b [Transforms] Migrate from getNumArgOperands to arg_size (NFC) adds 6aeed7b19c41 [ORC] Remove OrcRPCExecutorProcessControl ad OrcRPCTPCServer. adds 2a6b99d5f823 [libc++] Revert the part of my b82683b that affected <version>. adds fd8e99700de6 [DetectDeadLanes] Enable machine verification after this pass adds 2bfe777a45ce [ProcessImplicitDefs] Enable machine verification after this pass adds 08d41f75d985 [UnreachableMachineBlockElim] Enable machine verification [...] adds 04787239c930 [LiveVariables] Skip verification of kills inside bundles adds 31c92d515dd2 [MachineLoopInfo] Enable machine verification after this pass adds a7b4ce9cfd11 [NFC][AttributeList] Replace index_begin/end with an iterator adds a3f425946d33 [mlir][linalg] Include InitTensorOp in tiling canonicalization adds 33dd98e9e499 [ORC] Remove ORC RPC. adds 06cea95a5a19 [gn build] Port 33dd98e9e499 adds 3fabd98e5b3e [InstCombine] fold (trunc (X>>C1)) << C to shift+mask directly adds f8537895b9a6 [lldb] [Host] Sync TerminalState::Data to struct type adds 00e2306734b7 [ORC] Fix LLVM modulemap after removal of ORC RPC in 33dd98e9e49. adds 0e8862901ca5 revert tsan part for investigation adds 3da95b68cd1e [fir][NFC] Move fir.global printer to cpp file adds 04a6f80e9b23 [BasicAA] Add additional 32-bit truncation test (NFC) adds 9c31969e8df2 [AIX] Don't pass namedsects in LTO mode adds 53d7bdbfbf3e [NFC][X86][LV] Improve costmodel test coverage for interle [...] adds 3c407196034f [NFC][X86][Codegen] Add test coverage for interleaved i8 l [...] adds 61ecfc6f9dc5 [TwoAddressInstruction] Pre-commit a test case for D110944 adds dff3454bda09 [TwoAddressInstruction] Tweak constraining of tied operands adds df672f66b669 [DAG] scalarizeExtractedVectorLoad - replace getABITypeAli [...] adds c8c2b4629f75 [Demangle][Rust] Parse non-ASCII identifiers adds 4cdee8de6bad [gn build] Port c8c2b4629f75 adds 782a97a9776a [mlir][capi] Add TypeID to MLIR C-API adds b7ff0489158c [BasicAA] Add additional truncation tests (NFC) adds b084b98abe07 [BasicAA] Make test more robust (NFC) adds ca010347145d [mlir][sparse] Factoring out getZero() and avoiding unnece [...] adds 14fffda979ae [mlir][sparse] Factoring out allocaIndices() adds af7ac1d95b7d [mlir][sparse] Sharing calls to adaptor.getOperands()[0] adds bdd52e8baedd [Test] Add a test exposing a miscompile in SimpleLoopUnswitch. adds 45bd8d947780 [SimpleLoopUnswitch] Don't unswitch constant conditions adds 86046516e4f4 [DomTree] Assert that blocks in queries aren't from anothe [...] adds ab694cd8453e [Profile] Add a warning when lock file failed in __llvm_pr [...] adds 2df1019576db Revert "tsan: print a meaningful frame for stack races" adds 8b1984bb8ca4 Revert "tsan: fix tls_race3 test on darwin" adds 103c1bd11892 Revert "tsan: fix and test detection of TLS races" adds a67c7deae72a Revert "[DomTree] Assert that blocks in queries aren't fro [...] adds 40f382ad107a [NFC][PowerPC] Add test case for byval store. adds 96843d220dd8 [AArch64][GlobalISel] Change G_ANYEXT fed by scalar G_ICMP [...] adds d0bca006bbfe [test] split flags-from-poison.ll to allow ease of autogen update adds 24cde2f6023a [SCEV] Remove invariant requirement from isSCEVExprNeverPoison adds 2ca8a3f2132e [SCEV] Stop blindly propagating flags from inbound geps to [...] adds 91dfc0840ddf [test] add coverage for a SCEVUnknown scoped value in isSC [...] adds 657f02d45804 Revert "Extract LC_CODE_SIGNATURE related implementation o [...] adds e420164f40a9 [gn build] Port 657f02d45804 adds 237e9059f781 [libc++][Docs] Update benchmark doc wrt monorepo adds 063c5bc31b89 [flang][OpenMP] Added OpenMP 5.0 specification based seman [...] adds a1d1c31746eb Add a `check-mlir-build-only` build target that only build [...] adds 237d18a61a97 Fix memory leaks in mlir/test/CAPI/ir.c adds 0b8c50812b59 [DWARF][NFC] add ParentIdx and SiblingIdx to DWARFDebugInf [...] adds f41a9cf859a1 [AArch64][GlobalISel] Lower G_SMULH/G_UMULH unless its one [...] adds f33274c7bf44 [llvm-cxxfilt] Replace isalnum with isAlnum from StringExtras adds ac7031b2b2fa [libc++][format] Implement Unicode support. adds 8a3c64c3a239 [X86][Costmodel] Load/store i8 Stride=3 VF=2 interleaving costs adds f1df2d8eaf18 [X86][Costmodel] Load/store i8 Stride=3 VF=4 interleaving costs adds d1460c88a6d8 [X86][Costmodel] Load/store i8 Stride=3 VF=8 interleaving costs adds 448c93983999 [X86][Costmodel] Load/store i8 Stride=3 VF=32 interleaving costs adds 935b9693aea1 [X86][Costmodel] Load/store i8 Stride=4 VF=2 interleaving costs adds ae08362cb8e6 [X86][Costmodel] Load/store i8 Stride=4 VF=4 interleaving costs adds 74e4a0e32757 [X86][Costmodel] Load/store i8 Stride=4 VF=8 interleaving costs adds 0e71ae6da8f3 [X86][Costmodel] Load/store i8 Stride=4 VF=16 interleaving costs adds acb459574afc [X86][Costmodel] Load/store i8 Stride=4 VF=32 interleaving costs adds 8e7f6039fa05 [X86] Atom SSE shift-by-variable take 2uops/3uops not 1uop adds bb42cc2090a2 [X86] decomposeMulByConstant - decompose legal vXi32 multi [...] adds 02c601f442e0 [libc++][doc] Update format status. adds 09b51451da45 [NFC][libc++] Use TEST_HAS_NO_EXCEPTIONS in tests. adds dd3caa99bd87 [clang-format] [docs] [NFC] improve clarity in the Qualifi [...] adds 3d209c76ddb5 [clang-format] Constructor initializer lists format with p [...] adds 9452ec722ce0 [X86][SSE] Fix typo + infinite-loop in HOP(HOP'(X,X),HOP'( [...] adds db79f4a2e9c9 Free memory leak on duplicate interface registration adds ac21e3922b12 [clang-format] NFC 1% improvement in the overall clang-for [...] adds 33d20977b7a6 Revert "[RISCV] Add an GPR def to the Zvlseg SPILL/RELOAD [...] adds 7cae0daee630 [X86][Atom] Fix BSR/BSF uops + port usage adds d9152a85712a [llvm-jitlink] Sink getPageSize call in Session::Create. adds c1e32b3fc021 [Target] Migrate from getNumArgOperands to arg_size (NFC) adds 26223af256bb [SCEV] Split isSCEVExprNeverPoison reasoning explicitly in [...] adds 107198fe7de8 Fix memory leaks in mlir/unittests/MLIRTableGenTests adds 57d9adefa04d Fix memory leaks in MLIR unit-tests (NFC) adds 9312cb6f2092 Fix Undefined Behavior in MLIR Diagnostic: don't call memc [...] adds fe48ecb047fa Fix memory leak in mlir-cpu-runner/sgemm_naive_codegen.mlir (NFC) adds 4b28638bcc7a Fix multiple memory leaks in mlir-cpu-runner tests (NFC) adds bac4529b4397 Fix/disable more MLIR tests exposing leaks in ASAN builds (NFC) adds 2da3facd864c Fix memory leak in MLIR SPIRV ModuleCombiner adds 8320017b79eb [libc++] [ranges] Uncomment operator<=> in transform and i [...] adds e8806d748643 Re-apply the fix on DwarfEHPrepare and add a test adds 060a96a7b5d5 [LLVM][IR] Fixed input arguments for Verifier getter adds 51b9f0b82ab1 Fix memory leaks in MLIR integration tests for vector dial [...] adds 5de44d25213c Disable leak check for the MLIR Sparse CPU integration tes [...] adds 903facd96b1d Disable leak check for the MLIR Linalg CPU integration tes [...] adds 0b83a35caf22 [MLIR][NFC] Drop unnecessary use of OpBuilder in build tri [...] adds d6a4294d1362 Use standard separator for TSan options in `stress.cpp` te [...] adds b2d078fb0cac [IR]PATCH 1/2: Add AsmWriterContext into AsmWriter adds 475de8da011c [IR]PATCH 2/2: Add MDNode::printTree and dumpTree adds cb2e0eb68e67 Fix last leaky MLIR integration test (NFC) adds 86f50288989a Exclude MLIR python binding tests from Sanitizer tests for now adds bce0c6429ee3 Fix ASAN execution for the MLIR Python tests adds 93769e81ed2e [mlir] [test] Include mlir_tools_dir in PATH to fix mlir-reduce adds c274384cff1b [NFC][RISCV] Update test cases through update_cc_test_checks.py. adds cf284f6c5ef3 [LSV] Change the default value of InstertElement to poison adds f62d18ff140f [Clang] Extend -Wbool-operation to warn about bitwise and [...] adds a4933f57f3f0 Revert "[Clang] Extend -Wbool-operation to warn about bitw [...] adds b1fcca388441 Fixed warnings in LLVM produced by -Wbitwise-instead-of-logical adds f59cc9542bfb Reland "[Clang] Extend -Wbool-operation to warn about bitw [...] adds 5aca8bb963a4 [clang-format] allow clang-format to be passed a file of f [...] adds a76355d570a9 Unbreak hexagon-check-builtins.c due to rGb1fcca388441 adds 31d0c8f35556 [X86] Add SSE2/AVX1/AVX512BW test coverage to interleaved [...] adds e311cdd18d21 [NFC][X86][LV] Add costmodel test coverage for interleaved [...] adds 9505fe29112c [NFC][X86][Codegen] Add test coverage for interleaved i8 l [...] adds 5f2f6118800f Fixed more warnings in LLVM produced by -Wbitwise-instead- [...] adds fb84aa2a8f52 Fixed warnings in target/parser codes produced by -Wbitwis [...] adds f3c6c76cfd0d [NFC][X86][LV] Add costmodel test coverage for interleaved [...] adds a834849aacad [NFC][X86][Codegen] Add test coverage for interleaved i32 [...] adds 3be4acbaa356 [InstSimplify] Add additional load from constant test (NFC) adds 88a9c1827e8d [InstCombine] add test for shl + demanded bits; NFC adds f32c0fe8e505 [InstCombine] fold cast of right-shift if high bits are no [...] adds 025ce154356f [NFC][X86][LV] Add costmodel test coverage for interleaved [...] adds 9afec8890743 [NFC][X86][Codegen] Add test coverage for interleaved i64 [...] adds d34cd75d890a [Analysis, CodeGen] Migrate from arg_operands to args (NFC) adds d6482df683b9 [ARM] Tests for constant hoisting -1 immediates adds b85bf520dcd9 [CostModel][X86] X86TTIImpl::getCmpSelInstrCost - try to u [...] adds 164cc2781fb1 [X86] Split Cannonlake + Icelake Tuning. NFC adds 20b1a16a696a [ARM] Mark <= -1 immediate constant as cheap adds 0f567f0e3ed8 [mlir] [test] Add missing tool substitutions adds a944f801cacd [Clang][NFC] Fix the comment for Sema::DiagIfReachable adds 396b95e5c9ed [X86][Costmodel] Load/store i8 Stride=6 VF=2 interleaving costs adds 6fe4cce55816 [X86][Costmodel] Load/store i8 Stride=6 VF=4 interleaving costs adds 0b27f9c0886f [X86][Costmodel] Load/store i8 Stride=6 VF=8 interleaving costs adds bd5ba437fd8f [X86][Costmodel] Load/store i8 Stride=6 VF=16 interleaving costs adds a5e5883ef515 [X86][Costmodel] Load/store i8 Stride=6 VF=32 interleaving costs adds 8e8fb77aa40c [X86][Costmodel] Load/store i16 Stride=3 VF=2 interleaving costs adds 04f1469cb4ca [X86][Costmodel] Load/store i16 Stride=3 VF=4 interleaving costs adds 72f8a9244a64 [X86][Costmodel] Load/store i16 Stride=3 VF=8 interleaving costs adds 3cbc0a07f92b [X86][Costmodel] Load/store i16 Stride=3 VF=16 interleaving costs adds 67f1ee2e38e8 [X86][Costmodel] Load/store i16 Stride=3 VF=32 interleaving costs adds dec2257f354d [openmp] Fix a typo in a test REQUIRES line adds 5ddf49b90668 [AttrBuilder] Make handling of int attribtues more generifc (NFC) adds f39978b84f1d [SCEV] Correctly propagate nowrap flags across scopes when [...] adds d02db32644b7 [SCEV] Use full logic when infering flags on add and gep adds 35ab211c3753 [SCEV] Use trivial bound on defining scope of all SCEVs wh [...] adds 5f7a5353301b [SCEV] Cap the number of instructions scanned when infering flags adds 601168e42037 [lldb] Refactor variable parsing adds b06df223826e [clangd] Follow-up on rGdea48079b90d adds 32a7d6051633 [mli][linalg] Change tensor size in unit test (NFC). adds 71ad0f9d4e5b [LLDB] Skip TestClangREPL.py on Arm/AArch64 Linux adds 0873b9bef4e0 [openmp] [elf_common] Fix linking against LLVM dylib adds a9bceb2b059d [APInt] Stop using soft-deprecated constructors and method [...] adds d933adeaca7b [APInt] Stop using soft-deprecated constructors and method [...] adds 28388645a39e [NFC] Simple tidy-up in LoopVectorizationCostModel::select [...] adds 4288b6520a8e [LoopBoundSplit] Use SCEVAddRecExpr instead of SCEV for Ad [...] adds c7bd6435993f [libFuzzer] Use octal instead of hex escape sequences in P [...] adds ed9e52f3af4e [mlir][python] Usability improvements for Python bindings adds 3a3a09f65412 [mlir][python] Provide more convenient wrappers for std.Co [...] adds 255a690971cb [mlir][python] Provide more convenient constructors for st [...] adds 39f3f7c08fb6 [ELF][test] Fix several LLD ICF tests adds d023298b61b3 [MLIR] Fix unused tablegen template arg warnings adds 14bcd8bfdae9 [X86] Add tests for enabling slow-mulld on AVX2 targets adds 45f9795085ee [lldb] [test] Terminate "process connect" connections via kill adds 566690b067c8 [APFloat] Remove BitWidth argument from getAllOnesValue adds fab634b4e2a5 [mlir] Tighten strided layout specification. adds c95584cd7421 [APFloat] Common up some assertions. NFC. adds 4fc2f4979cf5 [PowerPC] Fix __builtin_ppc_load2r to return short instead [...] adds 3e93fcdfc893 [X86][Costmodel] Load/store i32/f32 Stride=3 VF=2 interlea [...] adds a93411c3afc7 [X86][Costmodel] Load/store i32/f32 Stride=3 VF=4 interlea [...] adds 198aa84973e6 [X86][Costmodel] Load/store i32/f32 Stride=3 VF=8 interlea [...] adds 4ca5bc07af06 [X86][Costmodel] Load/store i32/f32 Stride=3 VF=16 interle [...] adds d3bbe781ea8e [X86][Costmodel] Load/store i64/f64 Stride=3 VF=2 interlea [...] adds eb9a694c1744 [X86][Costmodel] Load/store i64/f64 Stride=3 VF=4 interlea [...] adds ede0611e792c [X86][Costmodel] Load/store i64/f64 Stride=3 VF=8 interlea [...] adds cef0a693b637 [X86][Costmodel] Load/store i64/f64 Stride=3 VF=16 interle [...] adds e77959cba777 [lldb] Add unit tests for Terminal API adds fd9bc13803ee [lldb] Fix a stray array access in Editline adds bf30c48419d8 [X86] SimplifyDemandedVectorEltsForTargetNode - simplify P [...] adds f074a6a04193 [OpenMP] Add options to change Attributor max iterations i [...] adds 7f84fa4ad41a [TargetLibraryInfo] Refactor size_t checks in isValidProto [...] adds 99ec54853047 [AArch64] Test for Store Pair Suppress under minsize. adds 92ac146bb99c [demangle] Add a unittest for _Float16 demangling. NFC adds bfc8f9e9b0bd [clang] Fix computation of number of dependencies using Op [...] adds a90d57b6cc5f [clangd] Improve PopulateSwitch tweak adds 6bc9a767390a [libc++][NFC] Qualify usage of nullptr_t in the format tests adds 8692d07e5811 [llvm-objdump] Fix common symbol output on 32 bit platforms adds f38cbd785985 [NFC][X86][LV] Add costmodel test coverage for interleaved [...] adds 6bba2bd76896 [NFC][X86][Codegen] Add test coverage for interleaved i32 [...] adds b8c7d5229c15 [NFC][X86][LV] Add costmodel test coverage for interleaved [...] adds c63a9a79afdd [NFC][X86][Codegen] Add test coverage for interleaved i64 [...] adds 811b1736d91b [analyzer] Add InvalidPtrChecker adds 72abda418e38 [gn build] Port 811b1736d91b adds c0824a7044f2 [libc++][NFC] Qualify nullptr_t in test adds 933e2469a2a8 [PowerPC][NFC] Remove reg name option in int128 test

No new revisions were added by this update.

Summary of changes: .../clang-tidy/bugprone/StringConstructorCheck.cpp | 2 +- clang-tools-extra/clangd/CodeComplete.cpp | 4 +- clang-tools-extra/clangd/Headers.cpp | 27 +- clang-tools-extra/clangd/Headers.h | 69 +- clang-tools-extra/clangd/ParsedAST.cpp | 2 +- clang-tools-extra/clangd/Preamble.cpp | 4 +- .../clangd/refactor/tweaks/PopulateSwitch.cpp | 23 +- .../clangd/unittests/HeadersTests.cpp | 10 +- .../clangd/unittests/ParsedASTTests.cpp | 8 +- .../clangd/unittests/PreambleTests.cpp | 2 +- .../unittests/tweaks/PopulateSwitchTests.cpp | 34 + clang/docs/ClangFormatStyleOptions.rst | 6 +- clang/docs/ClangFormattedStatus.rst | 2002 ++--- clang/docs/analyzer/checkers.rst | 57 +- clang/docs/tools/clang-formatted-files.txt | 7925 ++++++++++++++++++++ clang/docs/tools/generate_formatted_state.py | 23 +- clang/include/clang/Basic/BuiltinsPPC.def | 2 +- clang/include/clang/Basic/DiagnosticGroups.td | 3 +- clang/include/clang/Basic/DiagnosticSemaKinds.td | 4 + clang/include/clang/Format/Format.h | 6 +- clang/include/clang/Sema/Sema.h | 12 +- .../clang/StaticAnalyzer/Checkers/Checkers.td | 9 + clang/lib/AST/ExprConstant.cpp | 6 +- clang/lib/AST/OpenMPClause.cpp | 5 +- clang/lib/AST/Type.cpp | 4 +- clang/lib/CodeGen/CGBuiltin.cpp | 6 + clang/lib/CodeGen/CGExpr.cpp | 6 +- clang/lib/CodeGen/CGExprScalar.cpp | 2 +- clang/lib/CodeGen/CGOpenMPRuntime.cpp | 7 +- clang/lib/Driver/ToolChains/AIX.cpp | 5 +- clang/lib/Format/UnwrappedLineParser.cpp | 11 + clang/lib/Lex/LiteralSupport.cpp | 2 +- clang/lib/Lex/PPExpressions.cpp | 4 +- clang/lib/Sema/SemaChecking.cpp | 22 +- clang/lib/Sema/SemaExpr.cpp | 6 +- clang/lib/Sema/SemaOpenMP.cpp | 5 +- clang/lib/StaticAnalyzer/Checkers/CMakeLists.txt | 1 + .../Checkers/cert/InvalidPtrChecker.cpp | 279 + clang/lib/StaticAnalyzer/Core/MemRegion.cpp | 2 +- .../StaticAnalyzer/Core/RangeConstraintManager.cpp | 2 +- .../lib/StaticAnalyzer/Core/SimpleSValBuilder.cpp | 6 +- clang/test/Analysis/cert/env31-c.c | 73 + clang/test/Analysis/cert/env34-c-cert-examples.c | 101 + clang/test/Analysis/cert/env34-c.c | 331 + .../RISCV/rvv-intrinsics-overloaded/vaadd.c | 88 - .../CodeGen/RISCV/rvv-intrinsics-overloaded/vadc.c | 88 - .../CodeGen/RISCV/rvv-intrinsics-overloaded/vadd.c | 176 + .../RISCV/rvv-intrinsics-overloaded/vamoadd.c | 140 - .../RISCV/rvv-intrinsics-overloaded/vamoand.c | 140 - .../RISCV/rvv-intrinsics-overloaded/vamomax.c | 140 - .../RISCV/rvv-intrinsics-overloaded/vamomin.c | 140 - .../RISCV/rvv-intrinsics-overloaded/vamoor.c | 140 - .../RISCV/rvv-intrinsics-overloaded/vamoswap.c | 210 - .../RISCV/rvv-intrinsics-overloaded/vamoxor.c | 140 - .../CodeGen/RISCV/rvv-intrinsics-overloaded/vand.c | 88 - .../RISCV/rvv-intrinsics-overloaded/vasub.c | 88 - .../CodeGen/RISCV/rvv-intrinsics-overloaded/vdiv.c | 88 - .../RISCV/rvv-intrinsics-overloaded/vfabs.c | 9 - .../RISCV/rvv-intrinsics-overloaded/vfadd.c | 29 + .../RISCV/rvv-intrinsics-overloaded/vfclass.c | 18 - .../RISCV/rvv-intrinsics-overloaded/vfcvt.c | 54 - .../RISCV/rvv-intrinsics-overloaded/vfdiv.c | 18 - .../RISCV/rvv-intrinsics-overloaded/vfirst.c | 14 - .../RISCV/rvv-intrinsics-overloaded/vfmacc.c | 36 - .../RISCV/rvv-intrinsics-overloaded/vfmadd.c | 36 - .../RISCV/rvv-intrinsics-overloaded/vfmax.c | 18 - .../RISCV/rvv-intrinsics-overloaded/vfmerge.c | 9 - .../RISCV/rvv-intrinsics-overloaded/vfmin.c | 18 - .../RISCV/rvv-intrinsics-overloaded/vfmsac.c | 36 - .../RISCV/rvv-intrinsics-overloaded/vfmsub.c | 36 - .../RISCV/rvv-intrinsics-overloaded/vfmul.c | 18 - .../CodeGen/RISCV/rvv-intrinsics-overloaded/vfmv.c | 18 - .../RISCV/rvv-intrinsics-overloaded/vfncvt.c | 52 - .../RISCV/rvv-intrinsics-overloaded/vfneg.c | 9 - .../RISCV/rvv-intrinsics-overloaded/vfnmacc.c | 36 - .../RISCV/rvv-intrinsics-overloaded/vfnmadd.c | 36 - .../RISCV/rvv-intrinsics-overloaded/vfnmsac.c | 36 - .../RISCV/rvv-intrinsics-overloaded/vfnmsub.c | 36 - .../RISCV/rvv-intrinsics-overloaded/vfrdiv.c | 9 - .../RISCV/rvv-intrinsics-overloaded/vfrec7.c | 9 - .../RISCV/rvv-intrinsics-overloaded/vfredmax.c | 18 - .../RISCV/rvv-intrinsics-overloaded/vfredmin.c | 18 - .../RISCV/rvv-intrinsics-overloaded/vfredsum.c | 36 - .../RISCV/rvv-intrinsics-overloaded/vfrsqrt7.c | 9 - .../RISCV/rvv-intrinsics-overloaded/vfrsub.c | 9 - .../RISCV/rvv-intrinsics-overloaded/vfsgnj.c | 54 - .../RISCV/rvv-intrinsics-overloaded/vfslide1down.c | 9 - .../RISCV/rvv-intrinsics-overloaded/vfslide1up.c | 9 - .../RISCV/rvv-intrinsics-overloaded/vfsqrt.c | 9 - .../RISCV/rvv-intrinsics-overloaded/vfsub.c | 18 - .../RISCV/rvv-intrinsics-overloaded/vfwadd.c | 16 - .../RISCV/rvv-intrinsics-overloaded/vfwcvt.c | 38 - .../RISCV/rvv-intrinsics-overloaded/vfwmacc.c | 16 - .../RISCV/rvv-intrinsics-overloaded/vfwmsac.c | 16 - .../RISCV/rvv-intrinsics-overloaded/vfwmul.c | 8 - .../RISCV/rvv-intrinsics-overloaded/vfwnmacc.c | 16 - .../RISCV/rvv-intrinsics-overloaded/vfwnmsac.c | 16 - .../RISCV/rvv-intrinsics-overloaded/vfwredsum.c | 20 - .../RISCV/rvv-intrinsics-overloaded/vfwsub.c | 16 - .../CodeGen/RISCV/rvv-intrinsics-overloaded/vid.c | 22 - .../RISCV/rvv-intrinsics-overloaded/viota.c | 22 - .../RISCV/rvv-intrinsics-overloaded/vloxei.c | 191 - .../RISCV/rvv-intrinsics-overloaded/vluxei.c | 191 - .../RISCV/rvv-intrinsics-overloaded/vmacc.c | 176 - .../RISCV/rvv-intrinsics-overloaded/vmadc.c | 176 - .../RISCV/rvv-intrinsics-overloaded/vmadd.c | 176 - .../RISCV/rvv-intrinsics-overloaded/vmand.c | 14 - .../CodeGen/RISCV/rvv-intrinsics-overloaded/vmax.c | 88 - .../RISCV/rvv-intrinsics-overloaded/vmerge.c | 97 - .../RISCV/rvv-intrinsics-overloaded/vmfeq.c | 36 - .../RISCV/rvv-intrinsics-overloaded/vmfge.c | 36 - .../RISCV/rvv-intrinsics-overloaded/vmfgt.c | 36 - .../RISCV/rvv-intrinsics-overloaded/vmfle.c | 36 - .../RISCV/rvv-intrinsics-overloaded/vmflt.c | 36 - .../RISCV/rvv-intrinsics-overloaded/vmfne.c | 36 - .../CodeGen/RISCV/rvv-intrinsics-overloaded/vmin.c | 88 - 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| 88 + .../Analysis/CostModel/X86/interleaved-load-i8.ll | 98 - .../X86/interleaved-store-f32-stride-3.ll | 76 + .../X86/interleaved-store-f32-stride-4.ll | 80 + .../X86/interleaved-store-f64-stride-3.ll | 76 + .../X86/interleaved-store-f64-stride-4.ll | 76 + .../X86/interleaved-store-i16-stride-3.ll | 10 +- .../X86/interleaved-store-i32-stride-3.ll | 76 + .../X86/interleaved-store-i32-stride-4.ll | 80 + .../X86/interleaved-store-i64-stride-3.ll | 76 + .../X86/interleaved-store-i64-stride-4.ll | 76 + .../CostModel/X86/interleaved-store-i8-stride-3.ll | 77 + .../CostModel/X86/interleaved-store-i8-stride-4.ll | 81 + .../CostModel/X86/interleaved-store-i8-stride-6.ll | 89 + .../Analysis/CostModel/X86/interleaved-store-i8.ll | 85 - .../multidim_ivs_and_integer_offsets_3d.ll | 2 +- .../multidim_ivs_and_parameteric_offsets_3d.ll | 2 +- .../memcheck-wrapping-pointers.ll | 4 +- .../ScalarEvolution/flags-from-poison-noautogen.ll | 61 + .../Analysis/ScalarEvolution/flags-from-poison.ll | 263 +- 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| 798 ++ .../X86/vector-interleaved-load-i64-stride-2.ll | 277 +- .../X86/vector-interleaved-load-i64-stride-3.ll | 653 ++ .../X86/vector-interleaved-load-i64-stride-4.ll | 412 + .../X86/vector-interleaved-load-i8-stride-2.ll | 250 +- .../X86/vector-interleaved-load-i8-stride-3.ll | 764 ++ .../X86/vector-interleaved-load-i8-stride-4.ll | 1073 +++ .../X86/vector-interleaved-load-i8-stride-6.ll | 2669 +++++++ .../X86/vector-interleaved-store-i16-stride-2.ll | 253 +- .../X86/vector-interleaved-store-i16-stride-3.ll | 611 +- .../X86/vector-interleaved-store-i16-stride-4.ll | 1043 ++- .../X86/vector-interleaved-store-i16-stride-5.ll | 707 +- .../X86/vector-interleaved-store-i16-stride-6.ll | 518 +- .../X86/vector-interleaved-store-i32-stride-2.ll | 329 +- .../X86/vector-interleaved-store-i32-stride-3.ll | 717 ++ .../X86/vector-interleaved-store-i32-stride-4.ll | 692 ++ .../X86/vector-interleaved-store-i64-stride-2.ll | 280 +- .../X86/vector-interleaved-store-i64-stride-3.ll | 654 ++ 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